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    Pipelining

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    prathz182
    The document discusses pipelining, which refers to decomposing a sequential process into sub-operations that are executed concurrently in distinct segments or stages of a pipeline. This allows multiple computations to be in progress simultaneously. Pipelining is applicable to both arithmetic and instruction processing. An example arithmetic pipeline multiplies and adds a stream of numbers by decomposing it into input, multiply, and add stages. An instruction pipeline typically divides the instruction cycle into fetch, decode, address calculation, operand fetch, and execute stages, allowing a new instruction to begin processing every cycle.

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    Pipelining

    Uploaded by

    prathz182
    9 views5 pages
    The document discusses pipelining, which refers to decomposing a sequential process into sub-operations that are executed concurrently in distinct segments or stages of a pipeline. This allows multiple computations to be in progress simultaneously. Pipelining is applicable to both arithmetic and instruction processing. An example arithmetic pipeline multiplies and adds a stream of numbers by decomposing it into input, multiply, and add stages. An instruction pipeline typically divides the instruction cycle into fetch, decode, address calculation, operand fetch, and execute stages, allowing a new instruction to begin processing every cycle.

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    The document discusses pipelining, which refers to decomposing a sequential process into sub-operations that are executed concurrently in distinct segments or stages of a pipeline. This allows multiple computations to be in progress simultaneously. Pipelining is applicable to both arithmetic and instruction processing. An example arithmetic pipeline multiplies and adds a stream of numbers by decomposing it into input, multiply, and add stages. An instruction pipeline typically divides the instruction cycle into fetch, decode, address calculation, operand fetch, and execute stages, allowing a new instruction to begin processing every cycle.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    9 views5 pages

    Pipelining

    Uploaded by

    prathz182
    The document discusses pipelining, which refers to decomposing a sequential process into sub-operations that are executed concurrently in distinct segments or stages of a pipeline. This allows multiple computations to be in progress simultaneously. Pipelining is applicable to both arithmetic and instruction processing. An example arithmetic pipeline multiplies and adds a stream of numbers by decomposing it into input, multiply, and add stages. An instruction pipeline typically divides the instruction cycle into fetch, decode, address calculation, operand fetch, and execute stages, allowing a new instruction to begin processing every cycle.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 5

    Pipelining

    The term Pipelining refers to a technique of decomposing a sequential process into


    sub-operations, with each sub-operation being executed in a dedicated segment that
    operates concurrently with all other segments.

    The most important characteristic of a pipeline technique is that several computations


    can be in progress in distinct segments at the same time. The overlapping of
    computation is made possible by associating a register with each segment in the
    pipeline. The registers provide isolation between each segment so that each can
    operate on distinct data simultaneously.

    The structure of a pipeline organization can be represented simply by including an input


    register for each segment followed by a combinational circuit.

    Let us consider an example of combined multiplication and addition operation to get a


    better understanding of the pipeline organization.

    The combined multiplication and addition operation is done with a stream of numbers
    such as:

    Ai* Bi + Ci for i = 1, 2, 3, ......., 7

    The operation to be performed on the numbers is decomposed into sub-operations with


    each sub-operation to be implemented in a segment within a pipeline.

    The sub-operations performed in each segment of the pipeline are defined as:

    R1 ← Ai, R2 ← Bi Input Ai, and Bi


    R3 ← R1 * R2, R4 ← Ci Multiply, and input Ci
    R5 ← R3 + R4 Add Ci to product

    The following block diagram represents the combined as well as the sub-operations
    performed in each segment of the pipeline.
    Registers R1, R2, R3, and R4 hold the data and the combinational circuits operate in a
    particular segment.

    The output generated by the combinational circuit in a given segment is applied as an


    input register of the next segment. For instance, from the block diagram, we can see
    that the register R3 is used as one of the input registers for the combinational adder
    circuit.

    In general, the pipeline organization is applicable for two areas of computer design
    which includes:

    1. Arithmetic Pipeline

    2. Instruction Pipeline
    Instruction Pipeline
    Pipeline processing can occur not only in the data stream but in the instruction stream
    as well.

    Most of the digital computers with complex instructions require instruction pipeline to
    carry out operations like fetch, decode and execute instructions.

    In general, the computer needs to process each instruction with the following sequence
    of steps.

    1. Fetch instruction from memory.

    2. Decode the instruction.

    3. Calculate the effective address.

    4. Fetch the operands from memory.

    5. Execute the instruction.

    6. Store the result in the proper place.

    Each step is executed in a particular segment, and there are times when different
    segments may take different times to operate on the incoming information. Moreover,
    there are times when two or more segments may require memory access at the same
    time, causing one segment to wait until another is finished with the memory.

    The organization of an instruction pipeline will be more efficient if the instruction cycle
    is divided into segments of equal duration. One of the most common examples of this
    type of organization is a Four-segment instruction pipeline.

    A four-segment instruction pipeline combines two or more different segments and


    makes it as a single one. For instance, the decoding of the instruction can be combined
    with the calculation of the effective address into one segment.

    The following block diagram shows a typical example of a four-segment instruction


    pipeline. The instruction cycle is completed in four segments.
    Segment 1:

    The instruction fetch segment can be implemented using a first in, first out (FIFO)
    buffer.

    Segment 2:

    The instruction fetched from memory is decoded in the second segment, and eventually,
    the effective address is calculated in a separate arithmetic circuit.
    Segment 3:

    An operand from memory is fetched in the third segment.

    Segment 4:

    The instructions are finally executed in the last segment of the pipeline organization.

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