ELECTRONIC DEVICES AND CIRCUITS

Subject Code: (EC301PC)

Regulations : R18JNTUH
Class :II Year B.Tech ECE I Semester

Department of Electronics and communication Engineering

BHARAT INSTITUTE OF ENGINEERING AND TECHNOLOGY

Ibrahimpatnam -501 510, Hyderabad

 ELECTRONIC DEVICES AND CIRCUITS (EC301PC)
COURSE PLANNER
I. COURSE OVERVIEW:
The course has been designed to introduce fundamental principles of Electronic Devices and
Circuits.The students completing this course will understand basic Electronic Devices and
Circuits, including semiconductor properties, operational amplifiers,. Finally, students will gain
experience in with the design of analog amplifiers, power supplies and logic devices.

II. PREREQUISITS:
1. Semiconductor Physics
2. Basic Electronics

III. COURSE OBJECTIVES:

1. To introduce components such as diodes, BJTs and FETs.

2. To know the applications of components.
3. To know the switching characteristics of components.
4. To give understanding of various types of amplifier circuits.

IV. COURSE OUTCOMES:

S.No. Description Bloom’s Taxonomy
Level
1. Know the characteristics of various components. Knowledge, Understand
(Level1, Level2)
2. Understand the utilization of components. Apply, Create (Level 3,
Level 6)
3. Understand the biasing techniques. Knowledge, Understand
(Level1, Level2)
4. Design and analyze small signal amplifier circuits. Analyze (Level 4)

V. HOW PROGRAM OUTCOMES ARE ASSESSED:

Proficiency
Program Outcomes (PO) Level
assessed by
Engineering Knowledge: Apply the knowledge of mathematics, science,
PO1 engineering fundamentals, and an engineering specialization to the 3 Assignments
solution of complex engineering problems.
Problem Analysis: Identify, formulate, review research literature, and
analyze complex engineering problems reaching substantiated
PO2 2 Examples
conclusions using first principles of mathematics, natural sciences, and
engineering sciences.

IV Year B.Tech ECE – II Sem 2

 Proficiency
Program Outcomes (PO) Level
assessed by
Design/ Development of Solutions: Design solutions for complex
engineering problems and design system components or processes that
Assignments,
PO3 meet the specified needs with appropriate consideration for the public 3
Exercises
health and safety, and the cultural, societal, and environmental
considerations.
Conduct Investigations of Complex Problems: Use research-based
knowledge and research methods including design of experiments,
PO4 - -
analysis and interpretation of data, and synthesis of the information to
provide valid conclusions.
Modern Tool Usage: Create, select, and apply appropriate techniques,
resources, and modern engineering and IT tools including prediction and
PO5 - -
modeling to complex engineering activities with an understanding of the
limitations.
The Engineer and Society: Apply reasoning informed by the contextual
knowledge to assess societal, health, safety, legal and cultural issues and
PO6 - -
the consequent responsibilities relevant to the professional engineering
practice.
Environment and Sustainability: Understand the impact of the
professional engineering solutions in societal and environmental contexts,
PO7 - -
and demonstrate the knowledge of, and need for sustainable
development.
Ethics: Apply ethical principles and commit to professional ethics and
PO8 - -
responsibilities and norms of the engineering practice.
Individual and Team Work: Function effectively as an individual, and Oral
PO9 1
as a member or leader in diverse teams, and in multidisciplinary settings. Discussions
Communication: Communicate effectively on complex engineering
activities with the engineering community and with society at large, such
Document
PO10 as, being able to comprehend and write effective reports and design 2
Preparation,
documentation, make effective presentations, and give and receive clear
Presentation
instructions.
Project management and finance: Demonstrate knowledge and
understanding of the engineering and management principles and apply
PO11 2 Assignments
these to one’s own work, as a member and leader in a team, to manage
projects and in multidisciplinary environments.
Life-Long Learning: Recognize the need for, and have the preparation
PO12 and ability to engage in independent and life-long learning in the broadest 2 Assignments
context of technological change.
1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High) - : None

VI. HOW PROGRAM SPECIFIC OUTCOMES ARE ASSESSED:

II Year B.Tech ECE – I Sem 3

 Proficiency
Program Specific Outcomes Level
assessed by
Professional Skills: An ability to understand the basic
concepts in Electronics & Communication Engineering and to apply
Lectures,
PSO 1 them to various areas, like Electronics, Communications, Signal 2
Assignments
processing, VLSI, Embedded systems etc., in the design and
implementation of complex systems.
Problem-Solving Skills: An ability to solve complex
Electronics and communication Engineering problems, using latest
PSO 2 1 Tutorials
hardware and software tools, along with analytical skills to arrive cost
effective and appropriate solutions.
Successful Career and Entrepreneurship: An understanding of social-
awareness & environmental-wisdom along with ethical responsibility to
PSO 3 have a successful career and to sustain passion and zeal for real-world - -
applications using optimal resources as an Entrepreneur.
1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High) - : None

VII. SYLLABUS:

UNIT - I: Diode and Applications: Diode - Static and Dynamic resistances, Equivalent circuit, Load
line analysis, Diffusion and Transition Capacitances, Diode Applications: Switch-Switching times.
Rectifier - Half Wave Rectifier, Full Wave Rectifier, Bridge Rectifier, Rectifiers with Capacitive and
Inductive Filters, Clippers-Clipping at two independent levels, Clamper-Clamping Circuit Theorem,
Clamping Operation, Types of Clampers.

UNIT - II: Bipolar Junction Transistor (BJT): Principle of Operation, Common Emitter, Common
Base and Common Collector Configurations, Transistor as a switch, switching times, Transistor
Biasing and Stabilization - Operating point, DC & AC load lines, Biasing - Fixed Bias, Self Bias, Bias
Stability, Bias Compensation using Diodes.

UNIT - III: Junction Field Effect Transistor (FET): Construction, Principle of Operation, Pinch-
Off Voltage, Volt-Ampere Characteristic, Comparison of BJT and FET, Biasing of FET, FET as
Voltage Variable Resistor.
Special Purpose Devices: Zener Diode - Characteristics, Voltage Regulator. Principle of Operation -
SCR, Tunnel diode, UJT, Varactor Diode.

UNIT – IV: Analysis and Design of Small Signal Low Frequency BJT Amplifiers: Transistor
Hybrid model, Determination of h-parameters from transistor characteristics, Typical values of h-
parameters in CE, CB and CC configurations, Transistor amplifying action, Analysis of CE, CC, CB
Amplifiers and CE Amplifier with emitter resistance, low frequency response of BJT Amplifiers,
effect of coupling and bypass capacitors on CE Amplifier.

UNIT – V: FET Amplifiers: Small Signal Model, Analysis of JFET Amplifiers, Analysis of CS, CD,
CG JFET Amplifiers. MOSFET Characteristics in Enhancement and Depletion mode, Basic Concepts
of MOS Amplifiers.

TEXT BOOKS:
1. Electronic Devices and Circuits- Jacob Millman, McGraw Hill Education

II Year B.Tech ECE – I Sem 4

 2. Electronic Devices and Circuits theory– Robert L. Boylestead, Louis Nashelsky, 11th Edition,
2009, Pearson.

REFERENCE BOOKS:
1. The Art of Electronics, Horowitz, 3rd Edition Cambridge University Press
2. Electronic Devices and Circuits, David A. Bell – 5th Edition, Oxford.
3. Pulse, Digital and Switching Waveforms –J. Millman, H. Taub and Mothiki S. Prakash Rao,
2Ed., 2008, Mc Graw Hill.

NPTEL Web Course: https://nptel.ac.in/courses/117108107/9,

https://nptel.ac.in/courses/117103063

NPTEL Video Course: https://nptel.ac.in/courses/117108107/9,

https://nptel.ac.in/courses/117103063

GATE SYLLABUS:
Energy bands in intrinsic and extrinsic silicon; Carrier transport current, drift current, mobility and
resistivity; Generation and recombination of carriers; Poisson and continuity equations; P-N junction,
Zener diode, BJT, MOS capacitor, MOSFET, LED etc.

ESE/ IES SYLLABUS:

Basics of semiconductors; Diode/Transistor basics and characteristics; Diodes for different
uses; Junction & Field Effect Transistors (BJTs, JFETs, MOSFETs); Transistor amplifiers of
different types, oscillators and other circuits; Basics of Integrated Circuits (ICs); Bipolar,
MOS and CMOS ICs; Basics of linear ICs, operational amplifiers and their applications-
linear/non-linear; Optical sources/detectors; Basics of Opto electronics and its applications.

VIII. COURSE PLAN (WEEK-WISE): Methodolo

Teaching

Reference
Session

Week

Unit

gy

Topics Course Learning Outcomes

Know the physics of P-N Chalk and T1,

1 Unit-I: Introduction
junction. Talk T2
Diode - Static and Dynamic Understand the Diode - Static Chalk and T1,
2
resistances and Dynamic resistances Talk T2
1
Understand the diode Chalk and T1,
3 P-N junction Equivalent circuit
Equivalent circuit Talk T2
1
Load line Understand the Load line Chalk and T1,
4
analysis analysis Talk T2
Effect of temperature, diode Understand the temperature Chalk and T1,
5
resistance effects and diode resistance Talk T2
2
Diffusion Capacitance, Know about drift and diffusion Chalk and T1,
6
**. Drift Capacitance capacitances. Talk T2

II Year B.Tech ECE – I Sem 5

 Understand diode switching T1,
7 Diode switching times Discussion
times. T2
Understand the concept of
8 Rectifier - Half Wave Rectifier Rectifier - Half Wave Rectifier Chalk and T1,
Talk T2

Understand the operation,

Full Wave Rectifier, Bridge characteristics and applications Chalk and T1,
9
Rectifier of Full Wave Rectifier, Bridge Talk T2
Rectifier
Understand the operation,
Rectifiers with Capacitive and characteristics and applications Chalk and T1,
10
Inductive Filters of Rectifiers with Capacitive Talk T2
3 and Inductive Filters.
Understand the operation,
Rectifiers with Capacitive and characteristics and applications Chalk and T1,
11
Inductive Filters of Rectifiers with Capacitive Talk, PPTs T2
and Inductive Filters.
Understand how the diode
Clippers-Clipping at two Chalk and T1,
12 acts as Clippers-Clipping at
independent levels Talk, PPTs T2
two independent levels
Understand how the diode
Clamper-Clamping Circuit Chalk and T1,
13 acts as Clamper-Clamping
Theorem Talk, PPTs T2
Circuit Theorem
Understand the general
Clamping Operation, Types of Chalk and T1,
14 conditions for Clamping
4 Clampers. Talk, PPTs T2
Operation, Types of Clampers..
Understand the general
Clamping Operation, Types of Chalk and
15 conditions for Clamping
Clampers. Talk, PPTs
Operation, Types of Clampers..
16 Mock Test-I
Unit-II: Transistor Understand the basics of
Chalk and T1,
17 characteristics: The junction transistors.
Talk, PPTs T2
transistor
Study the operation of Chalk and T1,
18 Principle of Operation
5 transistor Talk, PPTs T2
Common Emitter Study the characteristics of CE Chalk and T1,
19
Configurations configurations. Talk, PPTs T2
Study the characteristics of CB Chalk and T1,
20 Common Base Configurations
2 configurations. Talk, PPTs T2
21 Bridge Class
Common Collector Study the characteristics of CC Chalk and T1,
22
configurations configurations. Talk T2
Understand the concept of PPTs, T1,
23 6 Transistor as a switch Transistor as a switch discussions T2
Study about switching times. Chalk and T1,
24 switching times
Talk T2

II Year B.Tech ECE – I Sem 6

 Explain the operation of T1,
Chalk and
25 Transistor Biasing Transistor Biasing. T2,
Talk
R1
Explain the operation of T1,
Stabilization Chalk and
26 Stabilization T2,
7 Talk, PPTs
R1
27 Bridge Class
Understand the operation of
Operating point, DC & AC Chalk and T1,
28 Operating point, DC & AC
load lines Talk T2
load lines.
Biasing - Fixed Bias, Bias Biasing - Fixed Bias, Bias Chalk and T1,
29
Stability Stability Talk T2
Understand the operation, Chalk and T1,
30 Self Bias, Bias Stability
Self Bias, Bias Stability Talk, PPTs T2
8 Understand the operation,
Bias Compensation using
Bias Compensation using Chalk and T1,
31 Diodes.
Diodes. Talk, PPTs T2

32 Bridge Class
Understand the operation of
3 Unit-III: JFET Construction, Chalk and T1,
33 JFET Construction, Principle
Principle of Operation Talk, PPTs T2
of Operation
Understand the Pinch-Off
Pinch-Off Voltage, Volt- Voltage, Volt-Ampere Chalk and T1,
34
9 Ampere Characteristic Characteristic Talk, PPTs T2

Understand Comparison of
BJT and FET Chalk and T1,
35 Comparison of BJT and FET
Talk, PPTs T2

36 I Mid Examinations (Week 9)

Understand the Biasing of
FET Chalk and T1,
37 Biasing of FET
Talk, PPTs T2

FET as Voltage Variable Understand the FET as Chalk and T1,

38 10
3 Resistor Voltage Variable Resistor. Talk, PPTs T2
Understand the Zener Diode - Chalk and T1,
39 Zener Diode - Characteristics
Characteristics Talk, PPTs T2
Understand the Voltage Chalk and T1,
40 Voltage Regulator
Regulator Talk, PPTs T2
41 Bridge Class
Understand the Principle of Chalk and T1,
42 Principle of Operation - SCR Operation - SCR Talk, PPTs T2
11 Understand the Tunnel diode Chalk and T1,
43 4 Tunnel diode Understand the UJT Talk, PPTs T2
Chalk and T1,
44 UJT
Talk, PPTs T2

II Year B.Tech ECE – I Sem 7

45 Bridge Class
Understand the Varactor
Varactor Diode. Chalk and T1,
46 Diode.
Talk, PPTs T2

12 UNIT – IV Analysis and Analysis and Design of Small

Chalk and T1,
47 Design of Small Signal Low Signal Low Frequency BJT
Talk, PPTs T2
Frequency BJT Amplifiers: Amplifiers:
Chalk and T1,
48 Transistor Hybrid model
Talk, PPTs T2
Design Determination of h-
Determination of h-parameters Chalk and T1,
49 parameters from transistor
from transistor characteristics Talk, PPTs T2
characteristics
Understand Typical values of
Typical values of h- parameters Chalk and T1,
50 h- parameters in CE
13 in CE configurations Talk, PPTs T2
configurations
Understand Typical values of
Typical values of h- parameters Chalk and T1,
51 h- parameters in CB
in CBconfigurations Talk, PPTs T2
configurations
52 Bridge Class
Typical values of h- parameters Understand Typical values of Chalk and T1,
53
in CC configurations h- parameters in CC Talk, PPTs T2
configurations Chalk and T1,
54 14 Transistor amplifying action
Talk, PPTs T2
55 Analysis of CE Amplifiers
Analyze the design of Analysis Chalk and T1,
56 Analysis of CB Amplifiers
of CE,CB,CC Amplifiers Talk, PPTs T2
57 Analysis of CC Amplifiers
58 Bridge Class
Analyze the design of Analysis
CE Amplifier with emitter Chalk and T1,
59 of CE Amplifier with emitter
16 resistance Talk, PPTs T2
resistance
Analyze the design of Analysis
low frequency response of BJT Chalk and T1,
60 of low frequency response of
Amplifiers Talk, PPTs T2
BJT Amplifiers
Analyze the design of Analysis
effect of coupling and bypass of effect of coupling and Chalk and T1,
61
capacitors on CE Amplifier. bypass capacitors on CE Talk, PPTs T2
Amplifier.
5 UNIT – V FET Amplifiers, Analyze the design of Analysis
17 Chalk and T1,
62 JFET Small Signal Model, of JFET Small Signal Model
Talk, PPTs T2
Analysis of JFET Amplifiers
Analysis of CS,CG,CD JFET Analyze the design of CS
63
Amplifiers CG,CD JFET Amplifiers
Analysis of CS,CG,CD JFET Analyze the design of CS Chalk and T1,
64
Amplifiers CG,CD JFET Amplifiers Talk, PPTs T2
Analyze the design of
MOSFET Characteristics in
MOSFET Characteristics in Chalk and T1,
65 18 Enhancement and Depletion
Enhancement and Depletion Talk, PPTs T2
mode
mode

II Year B.Tech ECE – I Sem 8

 Analyze the design of Basic
Basic Concepts of MOS T1,
65 Concepts of MOS PPTs
Amplifiers. T2
Amplifiers.
II Mid Examinations (Week 18)

IX. MAPPING COURSE OUTCOMES LEADING TO THE ACHIEVEMENT OF

PROGRAM OUTCOMES AND PROGRAM SPECIFIC OUTCOMES:

Course Program Outcomes Program Specific

Outcom Outcomes
es PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9
PO PO PO PSO PSO PSO
10 11 12 1 2 3
CO1 3 2 3 - - - - - 1 - - 2 2 1 -
CO2 3 2 2 - - - - - - - - 2 2 - -
CO3 3 2 3 - - - - - - 2 3 - - - -
CO4 3 2 2 - - - - - - 2 1 - 2 - -
Average 3 2 2.5 - - - - - 1 2 2 2 2 1 -
Average
(Rounde 3 2 3 - - - - - 1 2 2 2 2 1 -
d)

1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High) - : None

X. JUSTIFICATIONS FOR CO-PO MAPPING:

Mapping Low (1), Justification
Medium (2),
High(3)
Students will be able to Students will be able to understand open
CO1-PO1 3
circuited P-N junction.
Students will be able to understand how the diode acts as rectifier
CO1-PO2 2
and study the characteristics of rectifiers.
Students will be able to understand the V-I characteristics of P-N
CO1-PO3 3
junction.
Students will be able to understand the temperature effects and
CO1-PO9 1
diode resistance
CO1-PO12 2 Know about drift and diffusion capacitances.
CO1-PSO1 2 Students will be able to understand diode switching times.
Students will be able to understand the concept of breakdown in
CO1-PSO2 2
diodes and study the operation and characteristics of Zener diode.
Students will be able to understand the operation, characteristics
CO2-PO1 3
and applications of tunnel diode
Students will be able to understand the operation, characteristics
CO2-PO2 2
and applications of photo diode and LED.
CO2-PO3 2 To explain clipping circuits and comparators.

II Year B.Tech ECE – I Sem 9

 Students will be able to understand how the diode acts as rectifier
CO2-PO12 2
and study the characteristics of rectifiers.
Students will be able to understand the general conditions for filters
CO2-PSO1 2
and study the rectifier with capacitor filter.
CO3-PO1 3 To study the operation of transistor as an amplifier.
CO3-PO2 2 To study the characteristics of CB,CE,CC configurations.
CO3-PO3 3 Compare various configurations of transistors.
CO3-PO10 2 Understand the concept of operating point and purpose of biasing.
Study about bias compensation,
CO3-PO11 3
thermal runaway and stability.
CO4-PO1 3 Explain the operation of transistor at low frequencies.
Explain the operation of CE amplifier, study its frequency response
CO4-PO2 2
and gain bandwidth product.
CO4-PO3 2 Understand the operation of emitter follower.
Explain the operation of RC coupled two cascaded CE and
CO4-PO10 2
multistage CE amplifiers.
Students will be able to understand the operation, V-I
CO4-PO11 1
characteristics of JFET.
Students will be able to understand the operation, V-I
CO4-PSO1 2
characteristics of MOSFFET.

XI. QUESTION BANK (JNTUH) :

UNIT - I
Long Answer Questions:

S.No. Question Blooms Course

Taxonomy Outco
Level me
1. Explain the formation of PN junction diode. Remember 1
2. Discuss the operation of PN junction diode as rectifier. Understand 1
Define biasing. Briefly describe the operation of PN diode
3. Understand 1
under forward and reverse bias conditions.
Sketch the V-I characteristics of p-n junction diode for forward
4. bias voltages. Distinguish between the incremental resistance Evaluation 1
and the apparent resistance of the diode?
Explain the temperature dependence of VI characteristics of Comprehension
5. 1
PN diode?
Derive an expression for total diode current starting from Knowledge
6. 1
Boltzmann relationship in terms of the applied voltage?
Explain the V-I characteristics of Zener diode and distinguish Understand
7. 1
between Avalanche and Zener Break downs?
Explain the concept of diode capacitance. Derive expression Understand
8. 1
for transition capacitance?
Define depletion region at p-n junction? What is the effect of
9. forward and reverse biasing of p-n junction on the depletion Remember 1
region? Explain with necessary diagrams?

II Year B.Tech ECE – I Sem 10

 Explain the tunneling phenomenon. Explain the characteristics Understand
10. of tunnel diode with the help of necessary energy band 1
diagrams?
What is the photo diode? Explain its principle of operation and Remember
11. 1
applications in detail?
12. Explain the construction and working of LED? Understand 1
13. Discuss the applications of diode as clipper circuits. Remember 1
14. Briefly explain the operation of a comparator. Remember 1
Draw the block diagram of a regulated power supply and Understand
15. 1
explain its operation?
Draw the circuit of a half-wave-rectifier and find out the ripple Analyze
16. 1
factor, % regulation? Efficiency and PIV?
Draw the circuit of bridge rectifier and explain its operation Analyze
17. 1
with the help of input and output waveforms?
With suitable diagrams, explain the working of centre-tapped Understand
18. full wave rectifier. Derive expressions for VDC, IDC, Vrms and 1
Irms for it?
19. Explain the relative merits and demerits of all the rectifiers? Understand 1
Mention the need for filter circuits in rectifiers. Explain the
20. Understand 1
working of capacitor filter.

Short Answer Questions:

S.No. Question Blooms Course

Taxonomy Outcome
Level
1. Define Electronics? Remember 1

2. Explain about forward bias of diode? Understand 1

3. Explain about reverse bias of diode? Understand 1

Comprehen
4. Write the applications of diode? 1
sion
Draw the V-I characteristics of diode? Comprehen
5. sion 1

6. List the differences between ideal diode and practical diode? Remember 1

7. Define diffusion capacitance? Knowledge 1

8. Define transition capacitance? Remember 1

9. Define static resistance? Remember 1

10. Define dynamic resistance Remember 1

II Year B.Tech ECE – I Sem 11

 11. Write the equation of diode current Remember 1

12. Define cut-in voltage? Remember 1

Write the differences between avalanche and zener breakdown
13. mechanisms? Knowledge 1

14. Define zener breakdown mechanism? Remember 1

15. Define depletion region? Remember 1

Explain the temperature dependence of VI characteristics of
16. PN diode? Understand 1

17. Define doping? Remember 1

18. Explain about extrinsic semiconductor Understand 1

19. Explain about unbiased PN junction? Understand 1

20. Write down the expression for diode current? Knowledge 1

21. Define drift current? Remember 1

22. List the applications of Zener diode? Analyze 1

23. Define forbidden energy gap? Remember 1

With appropriate circuit diagram explain the DC load line
24. analysis of semiconductor diode? Analyze 1

25. Define Peak Inverse voltage of a diode? Remember 1

26. What is the principle of operation of photodiode? Knowledge 1

27. Give the principle of operation of Light Emitting Diode? Analyze 1

28. Define diffusion current? Remember 1

29. List the applications of LED. Analyze 1

30. Define photodiode? Remember 1

UNIT - II
Long Answer Questions:
S.No. Question Blooms Course
Taxonomy Level Outco
me
With a neat diagram explain the various current components in an
1. NPN bipolar junction transistor & hence derive general equation Understand 2
for collector current, IC?
Define Early-effect; explain why it is called as base-width
2. modulation? Discuss its consequences in transistors in detail? Remember 2

II Year B.Tech ECE – I Sem 12

 3. How transistor acts as an amplifier? Remember 2
Draw the input and output characteristics of a transistor in Comprehension
4. common emitter configurations? 2
Draw the input and output characteristics of a transistor in Evaluate
5. common base configurations? 2
Draw the input and output characteristic of a transistor in common Comprehension
6. collector configurations? 2
7. Explain the constructional details of Bipolar Junction Transistor? Understand 2
8. Derive the relation among α, β and γ? Evaluation 2
What is thermal runaway in transistors? Obtain the condition for
9. thermal stability in transistors? Remember 2
Analyze general transistor amplifier circuit using h parameter Analyze
10. 2
model. Derive the expressions for AI, AV, Ri, Ro, AIs, AVs.
Draw the circuit of an emitter follower, and derive the Remember
11. 2
expressions for AI, AV, Ri, Ro in terms of CE parameters.
Write the analysis of a CE amplifier circuit using h parameters. Analyze
12. 2
Derive the expressions for AI, AV, Ri, Ro, AIs, AVs.
Define h-parameter of a transistor in a small signal Remember
13. 2
amplifier. What are the benefits of h-parameters?
Compare the different types of coupling methods used in Remember
14. 2
multistage amplifiers.
Sketch two RC-coupled CE transistor stages. Show the middle Remember
15. and low frequency model for one stage. Write the expressions for 2
current gains.
Explain about different methods of Inter stage coupling in Understand
amplifiers. When two stages of identical amplifiers are cascaded,
16. 2
obtain the expressions for overall voltage gain, current gain and
power gain.

Short Answer Questions:

S.No. Question Blooms Course
Taxonomy Level Outcome
1. What is meant by operating point Q? Comprehension 2
2. Draw the symbols of NPN and PNP transistor? Comprehension 2
3. Explain the operation of BJT and its types? Understand 2
4. Explain the breakdown in transistor? Understand 2
5. Explain the transistor switching times? Understand 2
6. Define Transistor current? Remember 2
7. Define early effect or base width modulation? Remember 2
8. Explain about transistor amplifier? Understand 2
9. Define current amplification factor? Remember 2

II Year B.Tech ECE – I Sem 13

 10. When does a transistor act as a switch? Comprehension 2
11. Explain about the various regions in a transistor? Understand 2
12. Draw the small signal model of a CE configuration? Knowledge 2
Draw the output characteristics of NPN transistor in CE
13. configuration? Comprehension 2
14. Define hie and hfe in CE configuration? Remember 2
15. Define hoe and hre in CB configuration? Remember 2
16. Define saturation region? Remember 2
17. Write the relation between IC, β, IB and ICBO in a BJT? Knowledge 2
18. Define cutoff region? Remember 2
19. Define active region? Remember 2
20. Describes the various current components in a BJT? Knowledge 2
21. Define amplifier? Remember 2
22. Draw the hybrid model of a CB configuration? Knowledge 2
23. List the classification of amplifiers. Remember 2
List the classification of amplifiers based on frequency Remember
24. of operation 2
25. Define various hybrid parameters. Remember 2
26. Draw the hybrid equivalent model of CE Amplifier Understand 2
In a multistage amplifier, what is the coupling method Remember
27. 2
required to amplify dc signals?
Write the expression for lower 3 – dB frequency of an n Remember
28. 2
– stage amplifier with non – interacting stages.
Two stages of amplifier are connected in cascade. If the Evaluate
first stage has a decibel gain of 40 and second stage has
29. 2
an absolute gain of 20 then what is the overall gain in
decibels.
Why the overall gain of multistage amplifier is less than Understand
30. 2
the product of gains of individual stages.
What are the main characteristics of a Darlington Understand
31. 2
amplifier?
Why direct coupling is not suitable for amplification of Understand
32. high frequency 2

UNIT - III
Long Answer Questions:
S.No. Question Blooms Taxonomy Cour
Level se
Outc
ome

II Year B.Tech ECE – I Sem 14

 Explain the operation of FET with its characteristics and explain the
1. different regions in transfer characteristics? Comprehension 2
Define pinch-off voltage and trans conductance in field effect
2. transistors? Comprehension 2
With the help of neat sketches and characteristic curves explain the
3. construction & operation of a JFET and mark the regions of Application 2
operation on the characteristics?
4. Explain how a FET can be made to act as a switch? Knowledge 2
Bring out the differences between BJT and FET. Compare the three
5. configurations of JFET amplifiers? Knowledge 2
6. Create a relation between the three JFET parameters, µ, r d and gm? Creating 2
7. How a FET can be used as a voltage variable Resistance (VVR)? Remember 2
Explain the construction & operation of a P-channel MOSFET in
8. enhancement and depletion modes with the help of static drain Understand 2
characteristics and transfer characteristics?
Sketch the drain characteristics of MOSFET for different
9. values of VGS& mark different regions of operation. Comprehension 2
Explain the principle of CS amplifier with the help of circuit
10. diagram. Derive the expressions for AV, input impedance and Understand 2
output Impedance?
11. Discuss the high frequency response of CD Configuration? Knowledge 2
Draw the small-signal model of common drain FET amplifier.
12. Derive expressions for voltage gain and output resistance? Analyze 2

Short Answer Questions:

S.No. Question Blooms Course
Taxonomy Level Outcome
Write the expressions for mid-frequency gain of a FET Common
1. Source? Knowledge 2
2. Discuss the high frequency response of CD Configuration? Knowledge 2
What is the effect of external source resistance on the voltage
3. gain of a common source amplifier? Explain with necessary Remember 2
derivations?
Draw the small-signal model of common drain FET amplifier.
4. Derive expressions for voltage gain and output resistance? Analyze 2
5. Draw the small-signal model of common source FET amplifier. Analyze 2
6. Why FET is called a voltage operated device? Evaluation 2
7. List the important features of FET? Knowledge 2
8. Write short notes on millers theorem? Knowledge 2
9. Give the classifications of FETs and their application areas? Knowledge 2
10. Define pinch off voltage? Comprehension 2
1. Draw the structure of an n-channel JFET? Knowledge 2
12. Define rd and Gm? Remember 2

II Year B.Tech ECE – I Sem 15

 13. Draw the static characteristics curves of an n-channel JFET? Comprehension 2
14. Draw the drain characteristics of depletion type MOFET? Knowledge 2
15. Draw the small signal model of JFET? Knowledge 2
16. Draw the transfer characteristics for P-channel JFET? Comprehension 2
17. Draw the Drain V-I characteristics for p-channel JFET? Knowledge 2
18. Explain about ohmic and saturation regions? Understand 2
Draw the drain characteristics of an n-channel enhancement
19. type MOSFET? Knowledge 2
Write the expressions for mid-frequency gain of a FET Common
20. Source? Knowledge 2

UNIT - IV
Long Answer Questions:
S.No. Question Blooms Course
Taxonomy Outcom
Level e
Draw the circuit diagram & small signal equivalent of CB
1. amplifier using accurate h-parameter model. Derive expressions Application 3
for AV, AI, Ri and R0?
Draw the circuit diagram of CC amplifier using hybrid 3
2. parameters and derive expressions for AI, AV, Ri, RO? Application
What are the compensation techniques used for VBE and 3
3. ICO. Explain with help of suitable circuits? Remember
Define the stability factors with respect to the changes in ICO, 3
4. VBE and β. Why is the stability with respect to changes in VCE Remember
not considered?
3
Justify statement “Potential divider bias is the most commonly
5. used biasing method” for BJT circuits. Explain how bias Evaluate

compensation can be done in such biasing through diodes?

Determine the significance of operating point, DC and AC load Evaluate 3
6. lines to ensure active region operation of a BJT in CE amplifier
application?
A bipolar junction transistor with hie = 1100Ω, hfe = 50, hre = Evaluate 3
2.4x10-4, hoe = 25 µA/V, is to drive a load of 1KΩ in CB
7.
amplifier arrangement.
Estimate AV, AI, Ri& R0?
Design a fixed bias circuit using silicon transistor, with the Evaluate 3
8. following specifications: VCC = 16V, VBE = 0.7V, VCEQ =
8V, ICQ = 4 mA & β= 50?
Design a self bias circuit using silicon transistor to achieve a Evaluate 3
stability
9. factor of 10, with the following specifications: VCC = 16V,
VBE = 0.7V, VCEQ = 8V, ICQ = 4 mA & β = 50?

II Year B.Tech ECE – I Sem 16

 Design a self bias circuit for the following specifications: Evaluating 3
10. VCC = 12 V; VCE = 2V; IC = 4mA; hfe = 80. Assume any parameters
other design required. Draw the designed circuit.

Short Answer Questions:

S.No. Question Blooms Course
Taxonomy Outcome
Level
Which biasing method provides more stabilization amongst the
1. three types of biasing methods? Knowledge 3
Compare the advantages and disadvantages of biasing
2. schemes? Understand 3
Draw the circuit diagram of a collector to base bias circuit of
3. CE amplifier? Knowledge 3
4. Write down advantages of fixed bias circuity? Understand 3
Draw the circuit diagram of a fixed bias circuit of CE
5. amplifier? Understand 3
6. Draw a circuit employing a sensistor compensation? Understand 3
7. Write down disadvantages of fixed bias circuit? Understand 3
8. Define thermal runaway? Understand 3
9. Define thermal resistance? Understand 3
10. Define stability factors s’ and s’’? Understand 3

UNIT - V
Long Answer Questions:
S.No. Question Blooms Course
Taxonomy Outcome
Level
1. Write short notes on millers theorem? Understand 4
2. Give the classifications of FETs and their application areas? Understand 4
3. Define pinch off voltage? Understand 4
4. Draw the structure of an n-channel JFET? Knowledge 4
5. Define rd and Gm? Understand 4
6. Draw the static characteristics curves of an n-channel JFET? Understand 4
7. Draw the drain characteristics of depletion type MOFET? Understand 4
8. Draw the small signal model of JFET? Understand 4
9. Draw the transfer characteristics for P-channel JFET? Understand 4
10. Draw the Drain V_I characteristics for p-channel JFET? Understand 4

II Year B.Tech ECE – I Sem 17

Short Answer Questions:
S.No. Question Blooms Course
Taxonomy Outcome
Level
Draw the small-signal model of common gate FET amplifier.
1. Derive expressions for voltage gain and output resistance? Apply 4
List any four merits of MOSFET to show that they are more
2. suitable than JFETS in Integrated circuits? Understand 4
Compare enhancement and depletion modes of a
3. MOSFET with the help of its characteristics and construction? Apply 4
With a neat schematic, explain how amplification takes place in
4. a common drain amplifier? Knowledge 4
The P-channel FET has a |IDS|=-12mA, |Vp|=5V, VGS is 1.6 V. Evaluate
5. DetermineID ,Gm and Gm0 ? 4
Data sheet for a JFET indicates that IDS=10mA and VGS(off)= Evaluate
6. -4V. Determine the drain current for VGS=0V, -1V and -4V. 4
In an n-channel FET, the effective channel width is 3x 10-4cm Evaluate
7. and the donor impurity concentration is 1015 electrons/cm3. 4
Find the pinch-off voltage?
A Common Source FET amplifier circuit with un- bypassed RS
has the following circuit parameters: Rd = 15K, RS = 0.5K, Rg
8. Evaluate 4
= 1M, rd = 5K, gm= 5mS and VDD = 20 V. Calculate AV, AI,
Ri and R0?
A Common Source FET amplifier circuit with un bypassed RS Evaluate
has the following circuit parameters: Rd = 15K, RS = 0.5K, Rg
9. = 1M, rd = 5K, gm= 5mS and VDD = 20 V. Determine AV& 4
RO?
Evaluate
A self biased p – channel JFET has a pinch – off voltage of VP
10. = 5 V and IDSS = 12 mA. The supply voltage is 12 V. 4
Determine the values of RD and RS so that ID = 5 mA and
VDS = 6V?

OBJECTIVE QUESTIONS:

UNIT-I
1. The conventional current in a PN junction diode flows: [ ]
(a) From positive to negative (b) From negative to positive
(c) In the direction opposite to the electron flow. (d) Both (a) and (c) above
2. The cut in voltage (or knee voltage) of a silicon diode is [ ]
(a) 0.2V (b) 0.6V (c) 0.8 V (d) 1.0V
3. When a diode is reverse biased, it is equivalent to [ ]
(a) An OFF switch (b) an ON switch
(c) A high resistance (d) none of the above
4. The resistance of a diode is equal to [ ]
(a) Ohmic resistance of the P- and N- semiconductors (b) Junction resistance
(c) Reverse resistance (d) Algebraic sum of (a) and (b) above
5. For a silicon diode, the value of the forward - bias voltage typically [ ]
(a) Must be greater than 0.3V (b) Must be greater than 0.7V

II Year B.Tech ECE – I Sem 18

 (c) Depends on the width of the depletion region
(d) Depends on the concentration of majority carriers
6. When forward biased, a diode [ ]
(a) Blocks current (b) conducts current
(c) Has a high resistance (d) drops a large voltage.
7. A PN junction diode’s dynamic conductance is directly proportional to [ ]
(a) The applied voltage (b) the temperature
(c) The current (d) the thermal voltage
8. The forward region of a semiconductor diode characteristic curve is where diode appears as
[ ]
(a) Constant current source (b) a capacitor
(c) An OFF switch (d) an ON switch
9. At room temperature of25 °C, the barrier potential for silicon is 0.7 V. lts value at 125° C is[]
(a) 0.5V (b) 0.3V (c) 0.9V (d) 0.7V
10. Junction breakdown of a PN junction occurs [ ]
(a) With forward bias (b) with reverse bias
(c) Because of manufacturing defect (d) None of these
11. Reverse saturation current in a silicon PN junction diode nearly doubles for every
[ ]
(a) 2° C rise in temperature (b) 5° C rise in temperature
(c) 6° C rise in temperature (d) 10° C rise in temperature

12. The transition capacitance of a diode is 1nF and it can withstand a reverse potential of 400V.
A capacitance of 2nF which can withstand a reverse potential of 1 kV is obtained by
connecting [ ]
(a) two 1nF diodes in series
(b) six parallel branches with each branches comprising there 1nF diodes in series
(c) two 1nF diodes in series
(d) three parallel branches with each branch comprising 1nF diodes in series
13. A zener diode [ ]
(a) has a high forward-voltage rating
(b) has a sharp breakdown at low reverse voltage
(c) is useful as an amplifier
(d) has a negative resistance
14. A tunnel- diode is [ ]

(a) a very heavily-doped PN junction diode

(b) a high resistivity PN junction diode
(c) a slow switching device
(d) used with reverse bias
15. The light-emitting diode (LED) [ ]
(a) is usually made from silicon
(b) uses a reverse-biased junction
(c) gives a light output which increases with the increase in temperature
(d) depends on the recombination of holes and electrons
16. LED’s do not require [ ]
(a) heating (b) warm-up time
(c) Both (a) and (b) above (d) non of above
17. The sensitivity of a photodiode depends upon [ ]
(a) light intensity and depletion region width
(b) depletion region width and excess carrier life time

II Year B.Tech ECE – I Sem 19

 (c) Excess carrier life time and forward bias current.
(d) Forward bias current and light intensity.
18. LEDs are commonly fabricated from gallium compounds like gallium arsenide and gallium
phosphide because they [ ]
(a) Are cheap (b) are easily available
(c) Emit more heat (d) emit more light.
19. A LED is basically a _______________ P-N junction. [ ]
(a) forward-biased (b) reverse-biased
(c) lightly-doped (d) heavily-doped
20. As compared to a LED display, the distinct advantage of an LCD display is that it requires
[ ]
(a) No illumination (b) extremely-bias
(c) No forward-bias (d) a solid crystal

UNIT-II

1. The "cut-in" voltage of a silicon small-signal transistor is [ ]

(a) 0V (b) 0.2V (c) 0.5V (d) 0.8V
2. When the collector junction in transistors is biased in the reverse direction and the emitter
junction in the forward direction, the transistor is said to be in the [ ]
(a) Active region (b) cut-off region
(c) Saturation region (d) none of them.
3. The transistor is said to be in saturation region when [ ]
a. both collector and emitter junctions are forward biased
b. both collector and emitter junctions are reversed biased ·
c. emitter junction is forward biased, but the collector junction is reverse biased
d. emitter junction is reverse biased, but the collector junction is forward biased
4. For a silicon transistor in the common emitter configuration the cut-off condition is achieved
by applying a minimum reverse voltage across the emitter junction of the order of
[ ]
(a) 0V (b) 0.7 V (c) 1.5V (d) 5V
5. A transistor connected in common base configuration has [ ]
(a) a high input resistance and a low output resistance
(b) a low input resistance and high output resistance
(c) a low input resistance and a low output resistance
(d) a high input resistance and a high output resistance
6. Which of the following is not a time varying quantity? [ ]
(a) vce (b) VCE (c) vCE (d) Vce
7. In the Ebbers-Model of a bipolar transistor, the parameter is the [ ]
a. Forward transmission from emitter to collector
b. Reverse transmission from collector to emitter
c. Common base current gain
d. Both (a) and (c) above
8. The value of trans-conductance of a bipolar transistor for a collector current of 1.5 mA is
[ ]
(a) 0.05Ω (b) 0.05 x 103 Ω (c) 37.5 Ω (d) None of the above
9. The resistance rbb’ in the low frequency hybrid-π model of a bipolar transistor represents
[ ]
a. Base spreading resistance
b. A.C. resistance for forward biased emitter-base junction

II Year B.Tech ECE – I Sem 20

 c. The effect of feedback between the emitter-base junction and collector-base junction due to
Early effect
d. None of the above
10. The capacitance Ce in the high frequency hybrid-π model of a bipolar transistor represents the
[ ]
(a) Depletion region capacitance (b) Emitter diffusion capacitance
(c) Emitter-base junction capacitance (d) Sum of the (b) and (c) above
11. For a common emitter amplifier having a small un bypassed emitter resistance (RE) the input
resistance is approximately equal to [ ]
(a) RE (b) hfe (c) hfe RE (d) RE /hfe
12. The voltage gain of a common base amplifier is [ ]
(a) zero (b) less than unity (c) unity (d) greater than unity
13. For a common base transistor amplifier having input resistance (Ri) and output resistance
(R0), which of the following statements holds good [
]
(a) Ri is low, R0 is high (b) Ri is high, R0 is low
(c) Ri and R0 are both medium (d) None of these
14. The current gain of an emitter follower is [ ]
(a) zero (b) greater than unity (c) less than unity (d) all of them
15. Which of the following transistor amplifiers has the highest voltage gain? [ ]
(a) common-base (b) common-collector
(c) common-emitter (d) none of them
16. In an ac amplifier, larger the internal resistance of the ac signal source [ ]
(a) Greater the overall voltage gain (b) greater the input impedance
(c) Smaller the current gain (d) smaller the circuit voltage gain.
17. The main use of an emitter follower is as [ ]
(a) power amplifier (b) impedance matching device
(c) low-input impedance circuit (d) follower of base signal.
18. An ideal amplifier is one which [ ]
(a) has infinite voltage gain (b) responds only to signal at its input terminals
(c) has positive feedback (d) gives uniform frequency response.
19. The voltage gain of a single-stage amplifier is increased when [ ]
(a) its ac load is decreased (b)resistance of signal source is increased
(c) emitter resistance RE is increased. (d) as load resistance is increased.
20. When emitter bypass capacitor in a common-emitter amplifier is removed, its _______ is
considerably reduced. [ ]
(a) input resistance (b) output load resistance
(c) emitter current (d) voltage gain
21. Unique features of a CC amplifier circuit is that it [ ]
(a) steps up the impedance level (b) does not increases signal voltage
(c) acts as an impedance matching device (d) all of the above.
22. The h-parameters are called hybrid parameters because they [ ]
(a) are different from y- and z - parameters.
(b) are mixed with other parameters
(c) apply to circuits contained in a box
(d) are defined by using both open-circuit and short-circuit terminations
23. Which of the following statement is not correct regarding the h-parameters of a transistor
[ ]
(a) The values of h-parameters can be obtained from transistor characteristics.
(b) their values depends upon the transistor configuration
(c) their values depend on operating point

II Year B.Tech ECE – I Sem 21

 (d) they are four in number
24. Which of the following four h-parameters of a transistor has a greatest value [ ]
(a) hi (b) hr (c) h0 (d) hf
26. Which of the following four h-parameters of a transistor has a smallest value? [ ]
(a) hi (b) hr (c) h0 (d) hf
27. The typical value hic is [ ]
(a) l KΩ (b) 40 KΩ (c) 100KΩ (d) 2MΩ
28. The h-parameters of a transistor depend on its [ ]
(a) Configuration (b) operating point
(c) Temperature (d) all of the above
29. The output admittance h0 of an ideal transistor connected is common-base configuration is
____________ Siemens [ ]
(a) 0 (b) Error! Reference source not found. (c) Error!
Reference source not found. (d) -1
30. A transistor has hfe = 100, hie = 5.2 KΩ, and rbb = 0. At room temperature, VT= 26 mV. The
collector current, IC will be [ ]
(a) 10 mA (b) 5 mA (c) l mA (d) 0.5 mA

UNIT-III

1. A field effect transistor (FET) operates on [ ]

(a) Majority carriers only (b) Minority carriers only
(c) Positively charged ions only
2. In JFET operating above pinch-off voltage, the [ ]
(a) Drain current remains practically constant
(b) Drain current starts decreasing
(c) Drain current increases rapidly
(d) Depletion region becomes smaller
3. The JFET is oftenly called square law device because its [ ]
(a) Trans-conductance curve is parabolic
(b) A.C. resistance from drain-to-source varies inversely as square of the drain current
(c) Drain current varies as square of drain voltage for a fixed gate- to-source voltage
(d) Reverse gate leakage current varies as a square of the reverse gate voltage
4. For the operation of depletion-type MOSFET, the gate voltage has to be [ ]
(a) Low positive (b) High positive
(c) High negative (d) Zero
5. The N-channel MOSFET devices are preferred more than P-channel’s because [ ]
(a) N-channel devices are faster than P-channel devices
(b) N-channel devices consumes less power than P-channel devices
(c) N-channel devices have higher packing density than P-channe1 devices
(d) Both (a) and (c) above
6. As compared to N-channel MOS switch, the P-channel MOS switch has [ ]
(a) Same ON resistance (b) Less ON resistance
(a) More ON resistance (d) either (a) or (b)
7. Thermal runway is not possible in FET because as the temperature of the FET increases
[ ]
(a) the mobility decreases (b) the trans-conductance increases
(c) the drain current increases (d) the mobility increases

II Year B.Tech ECE – I Sem 22

8. Before illuminating a P-N junction photodiode, it has to be [ ]
(a) Reverse-biased (b) forward-biased
(c) Switched ON (d) switched OFF.

9. A LED emits visible light when its ______________ [ ]

(a) P-N junction is reverse-biased (b) depletion region widens
(c) Holes and electrons recombine (d) P-N junction becomes hot.

10. In LED, light is emitted because [ ]

(a) Recombination of charge carriers takes place
(b) Diode gets heated up
(c) Light falling on the diode gets amplified
(d) Light gets reflected due to lens action.

UNIT-IV
1.The "cut-in" voltage of a silicon small-signal transistor is [ ]
(a) 0V (b) 0.2V (c) 0.5V (d) 0.8V
2.When the collector junction in transistors is biased in the reverse direction and the emitter
junction in the forward direction, the transistor is said to be in the []
(a) Active region (b) cut-off region
(c) Saturation region (d) none of them.
3.The transistor is said to be in saturation region when [ ]
a.both collector and emitter junctions are forward biased
b.both collector and emitter junctions are reversed biased ·
c.emitter junction is forward biased, but the collector junction is reverse biased
d.emitter junction is reverse biased, but the collector junction is forward biased
4.For a silicon transistor in the common emitter configuration the cut-off condition is
achieved by applying a minimum reverse voltage across the emitter junction of the order of
[ ]
(a) 0V (b) 0.7 V (c) 1.5V (d) 5V
5.A transistor connected in common base configuration has [ ]
(a)a high input resistance and a low output resistance
(b)a low input resistance and high output resistance
(c)a low input resistance and a low output resistance
(d)a high input resistance and a high output resistance
6.Which of the following is not a time varying quantity? [ ]
(a) vce (b) VCE (c) vCE (d) Vce
7.In the Ebbers-Model of a bipolar transistor, the parameter is the [ ]
a.Forward transmission from emitter to collector
b.Reverse transmission from collector to emitter
c.Common base current gain
d.Both (a) and (c) above
8.The value of trans-conductance of a bipolar transistor for a collector current of 1.5 mA is
[ ]
(a) 0.05Ω (b) 0.05 x 103 Ω (c) 37.5 Ω (d) None
9.The resistance rbb’ in the low frequency hybrid-π model of a bipolar transistor represents

II Year B.Tech ECE – I Sem 23

 [ ]
a.Base spreading resistance
b.A.C. resistance for forward biased emitter-base junction
c.The effect of feedback between the emitter-base junction and collector-base junction due to
Early effect
d.None of the above
10.The capacitance Ce in the high frequency hybrid-π model of a bipolar transistor represents
the [ ]
(a) Depletion region capacitance (b) Emitter diffusion capacitance
(c) Emitter-base junction capacitance (d) Sum of the (b) and (c) above
11. For a common emitter amplifier having a small un bypassed emitter resistance (RE) the
input resistance is approximately equal to [ ]
(a) RE (b) hfe (c) hfe RE (d) RE /hfe
12.The voltage gain of a common base amplifier is [ ]
(a) zero (b) less than unity (c) unity (d) greater than unity
13.For a common base transistor amplifier having input resistance (Ri) and output resistance
(R0), which of the following statements holds good [ ]
(a) Ri is low, R0 is high (b) Ri is high, R0 is low
(c) Ri and R0 are both medium (d) None of these
14.The current gain of an emitter follower is [ ]
(a) zero (b) greater than unity (c) less than unity (d) all of them
15.Which of the following transistor amplifiers has the highest voltage gain? [ ]
(a) common-base (b) common-collector
(c) common-emitter (d) none of them
16.In an ac amplifier, larger the internal resistance of the ac signal source [ ]
(a) Greater the overall voltage gain (b) greater the input impedance
(c) Smaller the current gain (d) smaller the circuit voltage gain.
17.The main use of an emitter follower is as [ ]
(a) power amplifier (b) impedance matching device
(c) low-input impedance circuit (d) follower of base signal.
18.An ideal amplifier is one which [ ]
(a) has infinite voltage gain (b) responds only to signal at its input terminals
(c) has positive feedback (d) gives uniform frequency response.
19.The voltage gain of a single-stage amplifier is increased when [ ]
(a) its ac load is decreased (b)resistance of signal source is increased
(c) emitter resistance RE is increased. (d) as load resistance is increased.
20.When emitter bypass capacitor in a common-emitter amplifier is removed, its _______ is
considerably reduced. [ ]
(a) input resistance (b) output load resistance
(c) emitter current (d) voltage gain

UNIT-V
1.Which of the following statement is not true in case of FET. [ ]
(a) It has high input impedance (b) It is less noisy than bipolar transistor.
(c) It has a large gain band width product (d) all of the above.
2.The JFET is a [ ]

II Year B.Tech ECE – I Sem 24

a.current controlled device with high input resistance
b.voltage controlled device with high input resistance
c.voltage controlled device with low input resistance
d.current controlled device with low input resistance
3. The input impedance of a JFET is in the range of [ ]
(a) above 2 MΩ (b) 200 to 400 KΩ (c) 20 to 40 KΩ (d) below 2 KΩ
4. FET is [ ]
(a) current controlled device (b) voltage controlled device
(c) resistance controlled device (d) reactance controlled device
5. In a FET, 10 volts reverse voltage is applied. If gate current is 0.1µA, the input resistance
is [ ]
(a) 1 MΩ (b) 10 MΩ (c) 100 MΩ (d) none of these
6.The best location for setting a Q-point on d.c. load line of an FET amplifier is at [ ]
(a) saturation point (b) cut-off point
(c) mid-point (d) none of these
7.Which of the following bias methods provides a solid Q-point in JFET, amplifiers? [ ]
(a) Gate bias (b) Self-bias
(c) Voltage divider bias (d) Current source bias
8.Which of the following technique is used for biasing the enhancement type
MOSFET`s? [ ]
(a) Voltage divider bias (b) Collector feedback bias
(c) Current source bias (d) Self-bias
9.The threshold voltage of an n-channel enhancement mode MOSFET is 0.5 V, when the
device is biased at a gate voltage of 3V, pinch-of would occur at a drain voltage of [ ]
(a) l.5 V (b) 2.5 V (c) 3.5V (d) 4.5V
10.The zero gate bias channel resistance of a junction field-effect transistor is 750 and the
inch-off voltage is 3V. For a gate bias of 1.5 V and very low drain voltage, the device would
behave as a resistance of [ ]
(a) 320Ω (b) 816 Ω (c) l000 Ω (d) 1270 Ω
11.If properly biased, JFET with act as a [ ]
(a) current controlled current source (b) voltage controlled voltage source
(c) voltage controlled current source (d) current controlled voltage source
12 . The best location for setting a Q-point on d.c. load line of an FET amplifier is at[ ]
(a) Saturation point (b) cut-off point
(c) Mid-point (d) none of these
13. Which of the following bias methods provides a solid Q-point in JFET amplifiers? [ ]
(a) Gate bias (b) Self-bias
(c) Voltage divider bias (d) Current source bias
14. Which of the following technique is used for biasing the enhancement type MOSFET?[]
(a) Voltage divider bias (b) Collector feedback bias
(c) Current source bias (d) Self-bias
15. The voltage gain of a common source JFET amplifier depends upon its [ ]
(a) trans-conductance (gm) (b) amplification factor(µ)
(c) external load resistance (RD) (d) both (a) and (c) above
16. A common gate amplifier has [ ]
(a) high input resistance and high output resistance

II Year B.Tech ECE – I Sem 25

(b) low input resistance and high output resistance
(c) low input resistance and low output resistance
(d) high input resistance and low output resistance
17. The trans-conductance ‘gm’ of a JFET is equal to [ ]
(a) (b) (c) (d)
18. A trans-conductance amplifier has [ ]
(a) High input impedance and low output impedance
(b) Low input impedance and high output impedance
(c) High input and output impedances
(d) Low input and output impedances
19. The threshold voltage of an-n-channel enhancement mode MOSFET is 0.5 V, when the
device is biased at a gate voltage of 3 V, pinch-of would occur at a drain voltage of [ ]
(a) 1.5 V (b) 2.5 V (c) 3.5 V (d) 4.5 V
20. The zero gate bias channel resistance of a junction field-effect transistor is 750 and the
pinch-off voltage is 3V. For a gate bias of 1.5 V and very low drain voltage, the device would
behave as a resistance of [ ]
(a) 320 Ω (b) 816 Ω (c) 1000 Ω (d) l270 Ω

XII. WEBSITES:
1. http://www.onsemi.com
2. http://www.kpsec.freeuk.com/symbol.htm
3. http://buildinggadgets.com/index_circuitlinks.htm
4. http://www.guidecircuit.com

XIII. EXPERT DETAILS:

1. Mr. S. Srinivasan, Professor, Indian Institute of Technology, Madras
2. Dr. P. V. D. Somasekhar Rao (JNTUH)
3. Dr. T.Satya Savithri (JNTUH)
4. Mrs N Mangala Gouri (JNTUH)
5. Dr.D.Rama Krishna (O.U)
6. Dr.K.Chandra Bhushana Rao (JNTUK)
7. Dr. V. Sumalatha (JNTUA)
8. Dr. M.N Giriprasad (JNTUA)

XIV. JOURNALS:

INTERNATIONAL
1. IEEE Transaction on Electronic Devices
2. International Journal of Micro and Nano Electronics, Circuits and Systems
3. Active and Passive Electronic Components (ISSN: 0882-7516)
4. International Journal Of Circuits And Architecture Design (IJCAD)

NATIONAL
1. Journal of Active and Passive Electronic Devices
2. Journal of Electronic Testing
3. IETE Journal of Research

II Year B.Tech ECE – I Sem 26

4. Journal of Electrical Engineering and Electronic Technology

XV. LIST OF TOPICS FOR STUDENT SEMINARS:

1. Formation of depletion layer in PN junction diode
2. Zener diode as voltage regulator
3. Common Collector Configuration
4. Need for biasing
5.Thermal runaway, thermal stability
6. Design of CE amplifier

XVII. CASE STUDIES / SMALL PROJECTS:

1. Voltage regulator
2. Regulated power supply
3. Single stage amplifier
4. SCR acts as fastest switch
5. FET act as a variable resistor

II Year B.Tech ECE – I Sem 27