Development of Virtual Machine For Programmable Logic Controller (PLC) by Using STEPS Programming Method
Development of Virtual Machine For Programmable Logic Controller (PLC) by Using STEPS Programming Method
Abstract—Programmable Logic Controller (PLC) is widely Referring to The Fig. 1, LD is one of low level
used in manufacturing industries for automation and language programming for PLC as well as Boolean
became one of the essential subjects in the language and it is still widely used in many PLC
university.Learning theory in class alone is not enough to applications. Hence this paper is focussing on ladder
acquire the knowledge of PLC. Therefore in this paper a diagram as programming language for the PLC
PLC Integrated Development Environment (IDE) tool suit is applications.
developed to assist students’ learning in the class. It consists
of ladder diagram editor, simulator and compiler. It also
provides an interactive learning in class as well as hand-on
activities for laboratories. This software package is
developed using Object Oriented Programming (OOP)
language Visual Basic 6 to create a virtual microcontroller
environment in simulation process.
I. INTRODUCTION
Programmable logic controllers (PLCs) have
progressed rapidly since their inception in the early 1970s,
and are now widely used in the manufacturing, process
and utility industries.[1]PLC is special-purpose industrial
computers designed for use in the control of wide variety
Fig. 1: Ladder diagram.
of manufacturing machine and system. PLC also can be
defined as a specialized electronic device based on one or Theoretical learning alone is not enough to acquire
more microprocessors that are used to control industrial PLC knowledge until they experience themselves. In
machinery. The term “industrial” on the definition implies UiTM specifically for Electrical Engineering majoring in
that PLCs are computer designed to operate in harsh System, PLC is taught in Industrial Instrumentation course.
physical and electrical noise environment present in Basically in this course, undergraduates are exposed with a
production plants.[2] fundamental of PLC by having a theoretical class. As a
result, almost 65% of them having a problem in mastering
The definition defined that PLCs are computers; hence PLC based on unofficial survey that conducted to
they must be programmed using a programming language. undergraduates.
There are five standard programming languages
standardize by IEC 62232-3 that are available for There are several software-based PLC simulators have
programming new applications including Ladder Diagrams been developed since 20th century. Amongst is PLC
(LD), Function Block Diagrams (FBD), Structured Text Simulator, tri PLC, SOLPICA [3], Estevez et al [4] and
(ST), Instruction List (IL) and Sequential Function Charts Whimori CDK [5]. The PLC Simulator and tri PLC is an
(SFC)[2],[6],[7]. In this paper, only ladder diagram will be online simulator which is available for student access.
covered. However, these online simulators are not provided with the
‘save’ function as they are free software and thus, the
designed project cannot be retrieved.
Analyse the
The [3], [4] and [5] are a complete PLC tool with a
variety range of features and designed based industrial Problems
needs. Therefore, the user interface is not user friendly for
students’ usage. Furthermore, there are too many settings
and parameters must be considered during designing the Design the
ladder diagram. Those settings are very technical and Program
require a broad knowledge about specific PLC.
LD Scan Line
A. Ladder Diagram Editor
Simulation
Initialization Ladder Diagram Editor is the area where the entire
ladder diagram will be designed. The LD designed by
Translate to selecting the element such as contact, coil, timer or
Pseudo Code counter from the toolbar on the left screen. The selected
element then placed on the rung by clicking the location
where the element decided to be placed. The Fig. 4 shows
the Ladder Diagram Editor.
Update IO
Simulation Registers
Process
Execute Pseudo
Code Line by Line
The simulation process begins when the user press Fig. 4: Ladder Diagram Editor
RUN button. The software will start to scan the LD from
the first to the last rung. In each rung, the scanner scans Basically, the design area is developed using User
throughout the columns. Each column that connected with Control ActiveX (OCX) control object where the element
branch will be scanned throughout the branch before placed or clicked on the control object is varies according
continuing on the next column. to selected element. All properties of the elements such as
state, name, type and id can be updated during program
LD Compiler is the key to PLC simulation. This runtimes.
module interpret or translate the LD to pseudo code
understand by the code executor. Pseudo mean “false”
where what is read is not an actual word means. Hence, B. Table of Elements
pseudo code is not essential for human understanding. All elements that will be placed on the rung should be
The pseudo code is used to create the algorithm which ‘registered’ into Table of Elements first. All the elements
help programmer (author) to understand the process flow. are classified into five types which are Input, Output,
Timer, Counter and Relay. The Fig. 5(a) shows the table
After translation process is finished, the simulator will of elements.
update all the input and output (IO) register. This is very
important to initialize the state of inputs and outputs.
IV. CONCLUSION
In conclusion, the fundamental of PLC is very useful to
the electrical engineering students before they embark into
the industrial world. Interactive learning is one of the
effective methods of teaching where student involved in
hand-on activities besides learning theory alone. Author
believed that this software is very useful to help student to
get better comprehension about PLC. It is believed that
Fig. 6: Offline Simulator the objectives of this project are achieved.
D. Simulation Results
V. FUTURE WORK
In order to verify that the system developed is fully
functioned, simulation test are performed. A test file is This project is developed with simple and basic
designed to perform AND, NAND, OR and timing based functions of PLC. It is recommended that few features
operation. The design contains eight contacts and three such as arithmetic operation that enable user to include
coils (one virtual coil and two relay coils). The Fig. 7 mathematic function in their design to be added in future.
shows the ladder diagram designed. Furthermore, the simulation process can be improved by
reducing the usage of memory and processors which lead
to system crash or process lagging. A hardware or training
kit should be developed as well as the communication
protocol with the PLC IDE to provide the students with
the online simulation and real application.
REFERENCES
[1] J. J. Blakley and D. A. Irvine, "Teaching Programmable Logic
Controllers Using Multimedia-based Courseware."
[2] J. A. Rehg and G. J. Sartori, Programmable Logic
Controllers: Pearson Prentice Hall, 2007.
[3] V. Pinto et al,PLC Controlled Industrial Process on-line
Simulator, IEEE International Symposium on Industrial
Electronics 2007, ISIE 2007, 4-7 June 2007, pg 2954 - 2957.
[4] E. Estevez et al, Graphical Modelling of PLC-based Industrial
Fig. 7: Basic ladder diagram with timer design. Control Applications, Proceesing of the 2007 American
Control Conference, New York, 11-13 July 2007, pg 220 -
225.
[5] S. Shin et al, Whimori CDK: A Control Program Development
Kit, International Conference on Computing, Engineering and
Information, ICC'09, 2-4 April 2009, pg 115 - 118.
[6] J. George L. Batten, Programmable Controllers: Hardware,
Software and Applications, 2nd Edition ed.: MacGraw-Hill,
1994.
[7] T. I. E. Committee, "IEC 61131-3, Programmable Controllers,
Programming Languages," ed, 1993.
[8] G. Brue and R. G. Launsby, Design For Six Sigma: McGraw-
Hill Company, 2003.
[9] (2011, 19 March 2011). Systems Development Life Cycle.
Available:
http://en.wikipedia.org/wiki/Systems_Development_Life_Cyc
le
[10] H. M. Deitel, et al., Visual Basic 6. How to Program: Prentice
Hall, Inc., 1999.
[11] B. ı. Zoubek, et al., "Towards Automatic Verification of
Ladder Logic Programs," 2003.
[12] S. F. Barret and D. J. Pack, Microcontrollers Fundamentals
For Engineers and Scientists, 1st ed.: Morgan & Claypool
Publisher, 2006.