CSE 321

Microprocessors

Assignment- 1
Mohd Ammar
2021bcs0082
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1. Explain the difference between the following: a.
Microprocessor and Microcontroller
b. Assembler and Compiler
c. High Level and Low-Level Languages

a) Microprocessor and Microcontroller

b) Compiler and Assembler

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c) High level and low level language

2. Explain the block diagram of the below microprocessors in detail:

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a. 8085

ALU (Arithmetic and Logic Unit): Performs arithmetic and logical operations on 8-bit
data fetched from the accumulator and temporary register. Accumulator: An 8-bit
register that supplies data to the ALU for operations and also stores new data.

General Purpose Registers: Six 8-bit registers (B, C, D, E, H, L) for storing data,
which can also be combined to store 16-bit data.
Flag Register: An 8-bit register that stores flags indicating conditions resulting
from ALU operations.
Temporary Register: An 8-bit register used to temporarily store data during program
execution, providing support to the ALU.
Instruction Register and Decoder: Instruction register stores fetched instructions,
and the decoder interprets these instructions to execute tasks.

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Program Counter: A 16-bit register storing the memory address of the next
instruction to be executed.
Stack Pointer: A 16-bit register managing the stack, used for push and pop
operations, typically incremented or decremented by 2.
Timing and Control Unit: A combination of circuits providing clock signals and
control signals to coordinate tasks within the microprocessor and with external
components.
Interrupt Control: Manages interrupts during program execution, allowing the

microprocessor to pause its current task to handle external or internal interrupts.

Serial Input/Output Control: Controls serial communication between the

microprocessor and external devices through serial input and output ports. Data Bus
and Address Bus: The 8085 microprocessor features an 8-bit bidirectional data bus
for transferring data and a 16-bit unidirectional address bus for carrying memory
addresses.
In summary, the 8085 microprocessor comprises various registers, units, and buses
working together to execute instructions, perform arithmetic and logical operations,
manage interrupts, and facilitate communication with external devices.

b) 8086

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Prominent Features of 8086

The most prominent features of a 8086 microprocessor are as follows −
It has an instruction queue, which is capable of storing six instruction bytes from the
memory resulting in faster processing.
It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data bus,
and 16-bit external data bus resulting in faster processing.
It is available in 3 versions based on the frequency of operation −
8086 → 5MHz
8086-2 → 8MHz
8086-1 → 10 MHz
It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which
improves performance.
Fetch stage can prefetch up to 6 bytes of instructions and stores them in the queue.

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Execute stage executes these instructions.
It has 256 vectored interrupts.
It consists of 29,000 transistors.

Comparison between 8085 & 8086 Microprocessor

Size − 8085 is an 8-bit microprocessor, whereas 8086 is a 16-bit
microprocessor.
Address Bus − 8085 has a 16-bit address bus while 8086 has a 20-bit address bus.

Memory − 8085 can access up to 64Kb, whereas 8086 can access up to 1 Mb of

memory.
Instruction − 8085 doesn’t have an instruction queue, whereas 8086 has an
instruction queue.
Pipelining − 8085 doesn’t support a pipelined architecture while 8086 supports
a pipelined architecture.
I/O − 8085 can address 2^8 = 256 I/O's, whereas 8086 can access 2^16 = 65,536
I/O's.
Cost − The cost of 8085 is low whereas that of 8086 is high.

3. Explain the following interfacing concepts for 8085:

a) Memory

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b) 8255
c) 8279
d) ADC and DAC

Memory Interfacing
The 8085 microprocessor communicates with memory devices such as RAM

(Random Access Memory) and ROM (Read-Only Memory) to store and retrieve data
and instructions.
Address lines (A0-A15) of the microprocessor are connected to the address inputs of

the memory device, allowing the microprocessor to select specific memory locations.

Data lines (D0-D7) of the microprocessor are connected to the data inputs and outputs
of the memory device for data transfer.
Control signals such as Read (RD) and Write (WR) are used to control the direction of
data flow between the microprocessor and memory device.

Interfacing with 8255 (Programmable Peripheral Interface):

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The 8255 is a programmable I/O (Input/Output) device that provides parallel I/O
capabilities.
It can be interfaced with the
8085 microprocessor to
extend its I/O capabilities for
connecting peripherals such
as keyboards, displays, and
sensors.

The microprocessor
communicates with the 8255
through its address and data
bus.
Control signals such as Chip Select (CS) and Read/Write (RD/WR) are used to select
the 8255 and control data transfer.

Interfacing with 8279 (Keyboard/Display Controller):

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The 8279 is a Keyboard/Display controller used for interfacing keyboards and displays
with microprocessors.
It can be connected to the 8085
microprocessor to facilitate input from
keyboards and output to displays.

The microprocessor communicates with

the 8279 through its address and data
bus.
Control signals such as Chip Select (CS)
and Read/Write (RD/WR) are used to
select the 8279 and control data transfer.

Interfacing with ADC (Analog-to-Digital Converter) and DAC

(Digital-to-Analog Converter):
ADCs and DACs convert analog signals to digital and digital signals to analog,
respectively, enabling the microprocessor to interface with analog devices. ADCs
convert analog signals (e.g., from sensors) into digital form for processing by the
microprocessor.
DACs convert digital signals generated by the microprocessor into analog form for
output to devices such as actuators or displays.
The microprocessor communicates with ADCs and DACs through its digital I/O ports,
often using parallel or serial communication protocols.
Control signals such as Start Conversion and Chip Select may be used to initiate and
control data transfer between the microprocessor and ADC/DAC.
4. Write notes on:
a. Instruction format in 8086

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b. Interrupts in 8086
c. 8086 Bus configuration and timing d.
Basic I/O interfacing for 8086.

Instruction format in 8086

The instruction format in the 8086 microprocessor is variable in length, ranging
from one to six bytes.

Instructions are typically composed of an operation code (opcode), optional

operands, and prefixes that modify the behaviour of the instruction.
The opcode specifies the operation to be performed by the processor. Operands
can include immediate values, memory addresses, or registers. Prefixes such as
segment override, repeat, and lock can be used to modify the behaviour of
instructions.

Interrupts in 8086
The 8086 microprocessor supports a variety of interrupts, including hardware interrupts
and software interrupts.

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Hardware interrupts are initiated by external devices and are used to signal the

processor to interrupt its current execution and handle the interrupt request.

Software interrupts, also known as interrupts generated by software

instructions, are used for system calls and other software-controlled
interrupts.
Interrupts are prioritised using an interrupt vector table, with lower interrupt numbers
having higher priority.
When an interrupt occurs, the processor saves the current state of execution, disables
further interrupts, and transfers control to the appropriate interrupt service routine
(ISR).
After servicing the interrupt, the processor restores the saved state and resumes
execution of the interrupted program.

8086 Bus configuration and timing

The 8086 microprocessor uses a multiplexed address and data bus.
It has a 20-bit address bus, allowing it to address up to 1 MB of memory.

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The data bus is 16 bits wide, allowing it to transfer data in 16-bit chunks. The
bus interface unit (BIU) handles bus operations, including fetching instructions
and accessing memory.
Bus cycles in the 8086 are typically divided into machine cycles and clock cycles,

with each instruction requiring a specific number of clock cycles to execute.

Memory access and I/O operations have specific timing requirements,

including setup time, hold time, and access time.

Basic I/O Interfacing for 8086

Interfacing with input/output (I/O) devices in the 8086 microprocessor involves using
dedicated I/O instructions and I/O ports.
I/O devices are typically connected to the
microprocessor through specific I/O ports,
which are addressed using port numbers. IN
and OUT instructions are used to transfer data
between the microprocessor and I/O ports.

The microprocessor generates control signals

such as WR (Write) and RD (Read) to control
data transfer between the processor and I/O
devices.
Basic I/O interfacing involves configuring the microprocessor's I/O instructions and ports

to communicate with external devices, such as keyboards, displays, and sensors.

5. Distinguish between Minimum mode and Maximum Mode for 8086.

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Minimum Mode
In Minimum mode, the 8086 processor operates as a standalone unit without the
presence of other processors or co-processors.
It typically interacts with memory and I/O devices directly without the need for
additional control from external devices.
The control signals such as
the status and control signals
(S0, S1, IO/M, RD, WR, etc.)
are generated by the
processor itself.
Address lines (A0-A15), data
lines (D0-D15), and control
lines are directly connected to

the memory and I/O devices.

Minimum mode is simpler

and suitable for
applications where only one processor is used, and no external co-processors
are involved.

Maximum Mode:

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In Maximum mode, the 8086 processor operates in a multiprocessor environment

where it may be part of a system with other processors or co-processors.

It requires an external bus

controller, such as an 8288
bus controller, to manage
bus activities
and coordinate
communication between
multiple processors and
peripherals.
The control of bus cycles,
arbitration, and control
signals is managed by the
external bus controller
rather than the processor itself.
The 8086 processor in Maximum mode generates the address, data, and status
signals, while the external bus controller manages the bus cycles and control
signals.
Maximum mode allows for more complex system configurations, including
symmetric multiprocessing (SMP) systems where multiple processors share
access to memory and I/O devices.
It requires additional hardware components and is typically used in more
sophisticated systems where multiple processors need to work together
efficiently.

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