V Semester B.Tech (Electrical & Electronics Engineering) Make Up Examinations, January 2018
V Semester B.Tech (Electrical & Electronics Engineering) Make Up Examinations, January 2018
V Semester B.Tech (Electrical & Electronics Engineering) Make Up Examinations, January 2018
1A. With the help of neat internal block schematic, explain the architecture (internal
organization) of 8051 microcontroller. (04)
1B. Briefly explain the various unconditional jump instructions of 8051. With the help of relevant
examples, illustrate clearly how target branch address is determined in these instructions. (03)
1C. Write the instruction/s to perform the following operations
i. Mask bit D7 of R2 of register bank 1
ii. Set upper 3 bits of the data at RAM address 30H
iii. Exchange the nibbles of R3 register of RAM register bank 3 (03)
2A. Describe the functions of all the pins (signals) of 8051 microcontroller used while accessing
external memory. (03)
2B. Write an 8051 ALP to find the address of a given byte 50H in an array of numbers stored in
external RAM starting at address 1001H. Size of the array is stored in memory location
1000H. Display the address in Port 0 & Port 1 ten times with a 4 µsec. delay. Use NOP
instruction/s to provide the delay. Assume crystal frequency to be 12MHz. (04)
2C. A push button (switch) is connected to P1.0 pin. A set of 8 LED’s are connected to port ‘2’.
Write an 8051 ALP to blink the 8 LED’s one after the other with a delay of 1 secs continuously
when the switch is in ‘ON’ state,. Show the interfacing circuit. Use timer ‘1’ in mode 2 to obtain
the required time delay. (03)
3A. Ten 8 bit numbers are stored in external RAM locations starting at 5000H. Write an 8051 ALP
to transfer these numbers to another set of locations in external memory starting at 6000H. (03)
3B Write 8051 program to receive 15 data bytes serially at 19200 baud and store the result in
memory locations starting at 60H. Assume XTAL= 11.0592MHz. (03)
3C. Interface a 16 X 2 LCD to 8051 microcontroller and write an 8051 ALP to display “MAKE UP
EXAM” in line 1 starting at position 4 and “2017” at the center of the second line. (04)
4A. Write a note on priority of 8051 interrupts. List the default priority order. Describe the role
of IP register in modifying the priority levels and order of 8051 interrupts. Illustrate with an
example. (03)
5A. Highlight the architecture features of Berkley RISC – I processor architecture and compare it
with CISC processor architecture. (03)
5B. Explain the following instructions of ARM7TDMI processor. Illustrate with an example.
i. BIC R6, R6, # Immediate operand.
ii. LDRH R2, [R1, - R3, LSL #03]!
iii. ADCS R5, R5, R5 (04)
5C. A 64 bit number is stored in little endian format in successive memory locations starting at
0X00007000. Write an ARM7 ALP to obtain the 2’s compliment of the number and store the
result in next ‘8’ memory locations. (03)