Computer Network

AKC Notes
Module 13

1. Types of Errors
i. Single-Bit Error
The term single-bit error means that only 1 bit of a given data unit (such as a byte, character, or
packet) is changed from 1 to 0 or from 0 to 1.
Single-bit errors are the least likely type of error in serial data transmission. To understand why,
imagine data sent at 1 Mbps. This means that each bit lasts only 1/1,000,000 s, or 1μs. For a single-
bit error to occur, the noise must have a duration of only 1μs, which is very rare and noise normally
lasts much longer than this.

ii. Burst Error

The term burst error means that 2 or more bits in the data unit have changed from 1 to 0 or from 0
to 1.
A burst error is more likely to occur than a single-bit error. The duration of noise is normally longer
than the duration of 1 bit, which means that when noise affects data, it affects a set of bits. The
number of bits affected depends on the data rate and duration of noise.

2. Redundancy
The central concept in detecting or correcting errors is redundancy. To be able to detect or correct errors,
we need to send some extra bits with our data. These redundant bits are added by the sender and removed
by the receiver. Their presence allows the receiver to detect or correct corrupted bits.
Detection Versus Correction: In error detection, we are looking only to see if any error has occurred. We
are not interested in the number of errors. A single-bit error is the same for as a burst error.
In error correction, we need to know the exact number of bits that are corrupted and more importantly,
their location in the message. The number of the errors and the size of the message are important factors.

Forward Error Correction Versus Retransmission: There are two main methods of error correction.
Forward error correction is the process in which the receiver tries to guess the message by using redundant
bits.

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 Correction by retransmission is a technique in which the receiver detects the occurrence of an error and
asks the sender to resend the message. Resending is repeated until a message arrives that the receiver
believes is error-free.

3. Block Coding
In block coding, we divide our message into blocks, each of k bits, called datawords. We add r redundant
bits to each block to make the length n = k + r. The resulting n-bit blocks are called codewords.

With k bits, we can create a combination of 2k datawords; with n bits, we can create a combination of 2n
codewords.

4. Error Detection
Errors can be detected using block coding if the following two conditions are met:
i. The receiver has (or can find) a list of valid codewords.
ii. The original codeword has changed to an invalid one.

5. Vertical Redundancy Check (VRC)

In VRC, often called Parity Check, a redundant bit called parity bit is appended to every data unit so that the
total number of 1’s in the unit becomes even.
For example, if we want to transmit the binary data unit 1100001, we can see that the number of 1’s is 3
which is an odd number. Before transmitting we pass the data unit through a parity generator. The parity
generator counts the number of 1’s and appends the parity bit to the end. For our data unit the parity
generator will append a 1 to make the count of 1’s even.

Performance
i. It can detect all single bit errors.

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 ii. It can detect burst errors as long as the total number of bits changed is odd. For example: if we have
an even-parity data unit where the total number of 1’s, including the parity bit is 6: 1000111011. If
any three bits change value, the resulting parity will be odd and error will be detected.

6. Longitudinal Redundancy Check (LRC)

In LRC a block of bits is organized in a table of rows and columns. We then calculate the parity bit for each
column and create a new row of eight bits, which are the parity bits for the whole block.

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 Performance
i. LRC increases the likelihood of detecting burst errors.
ii. If two bits in one data units are damaged and two bits in exactly the same positions in another
data unit are also damaged, the LRC checker will not detect an error. For example, two data units
11110000 and 11000011. If the first and the last bits in each of them are changed, making the
data units read 01110001 and 01000010, the errors cannot be detected by LRC.

7. Cyclic Redundancy Check (CRC)

In the encoder, the dataword has k bits (4 here), the codeword has n bits (7 here). The size of the
dataword is augmented by adding n - k (3 here) 0s to the right-hand side of the word. The n-bit result is fed
into the generator. The generator uses a divisor of size n - k + 1 (4 here), predefined and agreed upon. The
generator divides the augmented dataword by the divisor (modulo-2 division). The quotient of the division
is discarded; the remainder (r2r1r0) is appended to the dataword to create the codeword.
The decoder receives the possibly corrupted codeword. A copy of all n bits is fed to the checker
which is a replica of the generator. The remainder produced by the checker is a syndrome of n - k (3 here)
bits, which is fed to the decision logic analyzer. The analyser has a simple function. If the syndrome bits are
all as, the 4 leftmost bits of the codeword are accepted as the dataword (interpreted as no error), otherwise,
the 4 bits are discarded (error).
Encoder / CRC Generator: The encoder takes the dataword and augments it with n - k number of as. It
then divides the augmented dataword by the divisor, as shown in Figure.

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The process of modulo-2 binary division is the same as the familiar division process we use for decimal
numbers. We use the XOR operation to do subtraction. If the leftmost bit of the dividend (or the part used
in each step) is 0, the step cannot use the regular divisor; we need to use an all-0s divisor.

Decoder / CRC Checker: The codeword can change during transmission. The decoder does the same
division process as the encoder. The remainder of the division is the syndrome. If the syndrome is all 0s,
there is no error; the dataword is separated from the received codeword and accepted. Otherwise,
everything is discarded.

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Polynomials
The CRC generator is most often represented not as a string of 1’s and 0’s but as an algebraic polynomial.
The polynomial format is useful for two reasons: It is short and it can be used to prove the concept
mathematically.

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 A polynomial should be selected to have at least the following properties:
i. It should not be divisible by x.
ii. It should be divisible by (x + 1).
The first condition guarantees that all burst errors of a length equal to the degree of the polynomial are
detected. The second condition guarantees that all burst errors affecting an odd number of bits are
detected.

Performance
CRC is a very effective error detection method. If the divisor is chosen according to the rules, then
i. CRC can detect all burst errors that affect an odd number of bits.
ii. CRC can detect all burst errors of length less than or equal to the degree of the polynomial.
iii. CRC can detect with a very high probability burst errors of length greater than the degree of the
polynomial.

8. Checksum
Checksum Generator [At Sender Side]
i. The unit is divided into k sections, each of n bits.
ii. All sections are added together using one’s complement to get the sum.
iii. The sum is complemented and becomes the checksum.
iv. The checksum is sent with the data

Checksum Checker [At the Receiver Side]

i. The unit is divided into k sections, each of n bits.
ii. All sections are added together using one’s complement to get the sum.
iii. The sum is complemented.
iv. If the result is zero, the data are accepted: otherwise, they are rejected.

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 Example:

Performance
i. The checksum detects all errors involving an odd number of bits.
ii. It detects most errors involving an even number of bits.
iii. If one or more bits of a segment are damaged and the corresponding bit or bits of opposite value
in a second segment are also damaged, the sums of those columns will not change and the receiver
will not detect a problem.

9. Error Correction [Single-Bit Error Correction]

To correct an error, the receiver reverses the value of the altered bit. To do so, it must know which bit is in
error. The secret of error correction is to locate the invalid bit or bits.

Redundancy Bits
To calculate the number of redundancy bits (r) required to correct a given number of data bits (m), a
relationship must be established between the two so that the resulting code is m + r.
If the total number of bits in a transmittable unit is m + r, then r must be able to indicate at least
m + r + 1 different states.
Of these on state means no error and m + r states indicate the location of an error in each of the
m + r positions.

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So m + r + 1 states must be discoverable by r bits and r bits can indicate 2r different states. So 2r must be
equal to or greater than m + r + 1:
2r ≥ m + r + 1

Positioning the redundant bits

The redundancy bits are placed at the positions which correspond to the power of 2.
For example:
The number of data bits = 7
The number of redundant bits = 4
The total number of bits = 11
The redundant bits are placed at positions corresponding to power of 2- 1, 2, 4, and 8

Suppose the data to be transmitted is 1011001, the bits will be placed as follows:

Determining the Parity bits

R1 bit is calculated using parity check at all the bits positions whose binary representation includes a 1 in
the least significant position. R1: bits 1, 3, 5, 7, 9, 11.

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To find the redundant bit R1, we check for even parity. Since the total number of 1’s in all the bit positions
corresponding to R1 is an even number the value of R1 (parity bit’s value) = 0

R2 bit is calculated using parity check at all the bits positions whose binary representation includes a 1 in
the second position from the least significant bit. R2: bits 2,3,6,7,10,11

To find the redundant bit R2, we check for even parity. Since the total number of 1’s in all the bit positions
corresponding to R2 is odd the value of R2(parity bit’s value) = 1

R4 bit is calculated using parity check at all the bits positions whose binary representation includes a 1 in
the third position from the least significant bit. R4: bits 4, 5, 6, 7

To find the redundant bit R4, we check for even parity. Since the total number of 1’s in all the bit positions
corresponding to R4 is odd the value of R4(parity bit’s value) = 1

R8 bit is calculated using parity check at all the bits positions whose binary representation includes a 1 in
the fourth position from the least significant bit. R8: bit 8,9,10,11

To find the redundant bit R8, we check for even parity. Since the total number of 1’s in all the bit
positions corresponding to R8 is an even number the value of R8(parity bit’s value) = 0.

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Thus, the data transferred is:

Error detection and correction

Suppose for the data unit 10101001110 the 6th bit is changed from 0 to 1 during data transmission, then it
gives new parity values in the binary number:

The bits give the binary number as 0110 whose decimal representation is 6. Thus, the bit 6 contains an
error. To correct the error, the 6th bit is changed from 1 to 0.

Hamming Distance
the Hamming distance between the received codeword and the sent codeword is the number of bits that
are corrupted during transmission. For example, if the codeword 00000 is sent and 01101 is received, 3 bits
are in error and the Hamming distance between the two is d(00000, 01101) = 3.

If our code is to detect up to s errors, the minimum distance between the valid codes must be s + 1, so that
the received codeword does not match a valid codeword.

Note: To guarantee the detection of up to s errors in all cases, the minimum Hamming distance in a block
code must be dmin = s + 1,
Where s is the hamming distance

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