ES & IOT UNIT 1 - Notes
ES & IOT UNIT 1 - Notes
ES & IOT UNIT 1 - Notes
LECTURER NOTES
VI SEMESTER
SYLLABUS
Course Code
L T P C
CS3691 EMBEDDED SYSTEMS AND IOT
3 0 2 4
COURSE OBJECTIVES:
COURSE OUTCOMES:
CO1: Explain the architecture of embedded processors.
CO2: Write embedded C programs.
CO3: Design simple embedded applications.
CO4: Compare the communication models in IOT
CO5: Design IoT applications using Arduino/Raspberry Pi /open platform.
REFERENCES
What is a Microprocessor?
Computer's Central Processing Unit (CPU) built on a single Integrated Circuit (IC) is called
a microprocessor.
A digital computer with one microprocessor which acts as a CPU is called microcomputer.
It is a programmable, multipurpose, clock -driven, register-based electronic device that reads binary
instructions from a storage device called memory, accepts binary data as input and processes data
according to those instructions and provides results as output.
The microprocessor contains millions of tiny components like transistors, registers, and diodes that
work together.
Evolution of Microprocessors
We can categorize the microprocessor according to the generations or according to the size of the
microprocessor:
The first generation microprocessors were introduced in the year 1971-1972 by Intel Corporation. It
was named Intel 4004 since it was a 4-bit processor.
It was a processor on a single chip. It could perform simple arithmetic and logical operations such as
addition, subtraction, Boolean OR and Boolean AND.
I had a control unit capable of performing control functions like fetching an instruction from storage
memory, decoding it, and then generating control pulses to execute it.
The second generation microprocessors were introduced in 1973 again by Intel. It was a first 8
- bit microprocessor which could perform arithmetic and logic operations on 8-bit words. It was Intel
8008, and another improved version was Intel 8088.
The third generation microprocessors, introduced in 1978 were represented by Intel's 8086, Zilog Z800
and 80286, which were 16 - bit processors with a performance like minicomputers.
Several different companies introduced the 32-bit microprocessors, but the most popular one is
the Intel 80386.
Fifth Generation (64 - bit Microprocessors)
From 1995 to now we are in the fifth generation. After 80856, Intel came out with a new processor
namely Pentium processor followed by Pentium Pro CPU, which allows multiple CPUs in a single
system to achieve multiprocessing.
Other improved 64-bit processors are Celeron, Dual, Quad, Octa Core processors.
Instruction Set - The group of commands that the microprocessor can understand is called Instruction
set. It is an interface between hardware and software.
Bus - Set of conductors intended to transmit data, address or control information to different elements
in a microprocessor. A microprocessor will have three types of buses, i.e., data bus, address bus, and
control bus.
IPC (Instructions Per Cycle) - It is a measure of how many instructions a CPU is capable of executing
in a single clock.
Clock Speed - It is the number of operations per second the processor can perform. It can be expressed
in megahertz (MHz) or gigahertz (GHz). It is also called the Clock Rate.
Word Length - The number of bits the processor can process at a time is called the word length of the
processor. 8-bit Microprocessor may process 8 -bit data at a time. The range of word length is from 4
bits to 64 bits depending upon the type of the microcomputer.
Data Types - The microprocessor supports multiple data type formats like binary, ASCII, signed and
unsigned numbers.
Working of Microprocessor
The microprocessor follows a sequence to execute the instruction: Fetch, Decode, and then Execute.
Initially, the instructions are stored in the storage memory of the computer in sequential order. The
microprocessor fetches those instructions from the stored area (memory), then decodes it and executes
those instructions till STOP instruction is met. Then, it sends the result in binary form to the output
port. Between these processes, the register stores the temporary data and ALU (Arithmetic and Logic
Unit) performs the computing functions.
MICROCONTROLLERS – Overview
In 1981, Intel introduced an 8-bit microcontroller called the 8051. It was referred as system on a
chip because it had 128 bytes of RAM, 4K byte of on-chip ROM, two timers, one serial port, and 4
ports (8-bit wide), all on a single chip.
What is a Microcontroller?
o A microcontroller is a small and low-cost microcomputer, which is designed to perform
the specific tasks of embedded systems like displaying microwave’s information,
receiving remote signals, etc.
o The general microcontroller consists of the processor, the memory (RAM, ROM,
EPROM), Serial ports, peripherals (timers, counters), etc.
The following table highlights the differences between a microprocessor and a microcontroller –
Microcontroller Microprocessor
Microcontrollers are used to execute a single task Microprocessors are used for big applications.
within an application.
Its designing and hardware cost is low. Its designing and hardware cost is high.
It consists of CPU, RAM, ROM, I/O ports. It doesn’t consist of RAM, ROM, I/O ports. It
uses its pins to interface to peripheral devices.
Features of 8051:
4KB on-chip program memory (ROM/EPROM).
128 bytes on-chip data memory.
Four register banks.
64KB each program and external RAM addressability.
One microsecond instruction cycle with 12MHz crystal.
32 bidirectional I/O lines organized as four 8-bit ports.
Multiple modes, high-speed programmable serial port (UART).
16-bit Timers/Counters.
Direct byte and bit addressability.
Some of the applications of 8051 is mainly used in daily life & industrial applications also some of that
applications are shown below
The applications of 8051 microcontroller involves in 8051 based projects. The list of 8051 projects is
listed below.
Arduino Managed High Sensitive LDR based Power Saver for Street Light Control System
The Temperature Humidity Monitoring System of Soil Based on Wireless Sensor Networks
using Arduino
RFID based Electronic Passport System for Easy Governance using Arduino
Arduino based RFID Sensed Device Access
Arduino based DC Motor Speed Control
Arduino Based Line Following Robot
Zigbee based Automatic Meter Reading System
Block Diagram of 8051:
Registers
Registers in microcontrollers are mainly used to store data and short-term instructions which are mainly
used to process addresses to fetch data. This microcontroller includes 8-bit registers which have 8-bit
start from D0 to D7. Here, D0 to D7 is LSB (least significant bit) and D7 is the most significant bit
(MSB).
To make the data process better than 8-bit, then it must be separated into eight different bit parts. It
includes several registers however general-purpose type registers are frequently available to
programmers. There are classified into two types like General purpose & Special purpose. So, most of
the general-purpose registers are listed below.
The term PSW stands for Program status word and it is one kind of register in the microcontroller. It is
also called a flag register, used to demonstrate the position of arithmetic logic instructions such as zero
carry bit, carry bit, etc. PSW or flag register is an 8-bit register where 6-bits are used. This register
includes 8-flags where these flags are known as conditional flags. These flags will perform instruction
simply if the condition is satisfied.
These conditional flags are overflow, parity, auxiliary carry & carry. The Program status word registers
bit numbers like 3 & 4 are used to alter the bank registers whereas 1 & 5 are not used but they can be
used by the programmer for executing a specific task.
Stack Pointer
In the 8051 microcontrollers, the stack is 8-bit wide and it can hold data from 00 – FFH. The stack
pointer can be used through the CPU to allow the stack. This microcontroller includes an 8-bit stack
pointer that means it can allow values from 00H to FFH. Once it is activated, then the stack pointer
includes the 07 value.
Ports 0 to 3
P0, P1, P2, and P3 are the SFR latches of Ports 0, 1, 2, and 3, respectively. Writing a one to a
bit of a port SFR (P0, P1, P2, or P3) causes the corresponding port output pin to switch high. Writing
a zero causes the port output pin to switch low. When used as an input, the external state of a port pin
will be held in the port SFR (i.e., if the external state of a pin is low, the corresponding port SFR bit
will contain a 0; if it is high, the bit will contain a 1).
The Serial Buffer is actually two separate registers, a transmit buffer and a receive buffer.
When data is moved to SBUF, it goes to the transmit buffer and is held for serial transmission.
(Moving a byte to SBUF is what initiates the transmission.) When data is moved from SBUF, it comes
from the receive buffer.
Register pairs (TH0, TL0), and (TH1, TL1) are the 16-bit Counting registers for
Timer/Counters 0 and 1, respectively.
Special Function Registers IP, IE, TMOD, TCON, SCON, and PCON contain control and
status bits for the interrupt system, the Timer/Counters, and the serial port.
The 8051 has four dedicated bus control signals. It is a control signal that enables external
program (code) memory. It usually connects to an EPROM's Output Enable (OE) pin to permit
reading of program bytes.
The PSEN signal pulses low during the fetch stage of an instruction. When executing a
program from internal ROM (8051/8052), PSEN remains in the inactive (high) state.
ALE (Address Latch Enable)
The 8051 similarly uses ALE for demultiplexing the address and data bus. When Port 0 is used
in its alternate mode—as the data bus and the low-byte of the address bus—ALE is the signal that
latches the address into an external register during the first half of a memory cycle.
EA (External Access)
The EA input signal is generally tied high (+5 V) or low (ground). If high, the 8051 executes
programs from internal ROM when executing in the lower 4K of memory. If low, programs execute
from external memory only (and PSEN pulses low accordingly).
RST (Reset)
The RST input is the master reset for the 8051. When this signal is brought high for at least
two machinecycles, the 8051 internal registers are loaded with appropriate values for an orderly system
start- up.
Timers/Counters
8051 microcontroller has two 16 bit timers and counters. These counters are again divided into a 8 bit
register. The timers are used for measurement of intervals to determine the pulse width of pulses.
The 8051 features an on-chip oscillator. The nominal crystal frequency is 12 MHz for most ICs
in the MCS-51™ family.
Memory Organization
Most microprocessors implement a shared memory space for data and programs. This is
reasonable, since programs are usually stored on a disk and loaded into RAM for execution; thus both
the data and programs reside in the system RAM. Microcontrollers have limited memory, and there is
no disk drive or disk operating system. The control program must reside in. For this reason, the 8051
implements a separate memory space for programs (code) and data. Both the code and data may be
internal; however, both expand using external components to a maximum of 64K code memory and
64K data memory.
The internal memory consists of on-chip ROM and on-chip data RAM. The on-chip RAM
contains a rich arrangement of general-purpose storage, bit-addressable storage, register banks,
and special function registers.
ADDRESSING MODES
The way in which an operand is given to an instruction is known as addressing modes in 8051
microcontroller.
1. Immediate Addressing
Data is immediately available in the instruction.
For example -
ADD A, #77; Adds 77 (decimal) to A and stores in A
ADD A, #4DH; Adds 4D (hexadecimal) to A and stores in A
MOV DPTR, #1000H; Moves 1000 (hexadecimal) to data pointer
2. Register Addressing
This way of addressing accesses the bytes in the current register bank. Data is available in the
register specified in the instruction. The register bank is decided by 2 bits of Processor Status
Word (PSW).
For example-
ADD A, R0; Adds content of R0 to A and stores in A
3. Direct Addressing
The address of the data is available in the instruction.
For example -
MOV A, 088H; Moves content of SFR TCON (address 088H)to A
For example -
MOV A, @R0 moves content of address pointed by R0 to A
8051 PIN DESCRIPTION
Pins 1 to 8 − These pins are known as Port 1. This port doesn’t serve any other functions. It is
internally pulled up, bi-directional I/O port.
Pin 9 − It is a RESET pin, which is used to reset the microcontroller to its initial values.
Pins 10 to 17 − These pins are known as Port 3. This port serves some functions like interrupts,
timer input, control signals, serial communication signals RxD and TxD, etc.
Pins 18 & 19 − These pins are used for interfacing an external crystal to get the system clock.
Pin 20 − This pin provides the power supply to the circuit.
Pins 21 to 28 − These pins are known as Port 2. It serves as I/O port. Higher order address bus
signals are also multiplexed using this port.
Pin 29 − This is PSEN pin which stands for Program Store Enable. It is used to read a signal
from the external program memory.
Pin 30 − This is EA pin which stands for External Access input. It is used to enable/disable the
external memory interfacing.
Pin 31 − This is ALE pin which stands for Address Latch Enable. It is used to demultiplex the
address-data signal of port.
Pins 32 to 39 − These pins are known as Port 0. It serves as I/O port. Lower order address and
data bus signals are multiplexed using this port.
Pin 40 − This pin is used to provide power supply to the circuit.
8051 microcontrollers have 4 I/O ports each of 8-bit, which can be configured as input or output.
Hence, total 32 input/output pins allow the microcontroller to be connected with the peripheral devices.
Pin configuration, i.e. the pin can be configured as 1 for input and 0 for output as per the logic
state.
o Input/Output (I/O) pin − All the circuits within the microcontroller must be connected
to one of its pins except P0 port because it does not have pull-up resistors built-in.
o Input pin − Logic 1 is applied to a bit of the P register. The output FE transistor is turned
off and the other pin remains connected to the power supply voltage over a pull-up
resistor of high resistance.
Port 0 − The P0 (zero) port is characterized by two functions −
o When the external memory is used then the lower address byte (addresses A0A7) is
applied on it, else all bits of this port are configured as input/output.
o When P0 port is configured as an output then other ports consisting of pins with built-in
pull-up resistor connected by its end to 5V power supply, the pins of this port have this
resistor left out.
Input Configuration
If any pin of this port is configured as an input, then it acts as if it “floats”, i.e. the input has
unlimited input resistance and in-determined potential.
Output Configuration
When the pin is configured as an output, then it acts as an “open drain”. By applying logic 0 to a
port bit, the appropriate pin will be connected to ground (0V), and applying logic 1, the external output
will keep on “floating”.
In order to apply logic 1 (5V) on this output pin, it is necessary to build an external pull up
resistor.
Port 1
P1 is a true I/O port as it doesn’t have any alternative functions as in P0, but this port can be
configured as general I/O only. It has a built-in pull-up resistor and is completely compatible with TTL
circuits.
Port 2
P2 is similar to P0 when the external memory is used. Pins of this port occupy addresses
intended for the external memory chip. This port can be used for higher address byte with addresses
A8-A15. When no memory is added then this port can be used as a general input/output port similar to
Port 1.
Port 3
In this port, functions are similar to other ports except that the logic 1 must be applied to
appropriate bit of the P3 register.
Instruction Set
8051 Microcontroller have set of instruction to perform different operations. There arefive group
of instruction which are listed below.
Arithmetic Instructions
Logic Instructions
Data Transfer Instructions
Branch Instructions
Bit-oriented Instructions
Operation : MOV
Syntax : MOV destination, source
Description: MOV copies the value of source into destination. The value of source is not affected.
Both destination and source must be in Internal RAM. No flags are affected unless the instruction is
moving the value of a bit into the carry bit in which case the carry bit is affected or unless the
instruction is moving a value into the PSW register (which contains all the program flags).
Operation : MOVC
Function : Move Code Byte to Accumulator
Syntax : MOVC A,@A+register
Description: MOVC moves a byte from Code Memory into the Accumulator. The Code Memory
address from which the byte will be moved is calculated by summing the value of the Accumulator
with either DPTR or the Program Counter (PC). In the case of the Program Counter, PC is first
incremented by 1 before being summed with the Accumulator.
Operation : MOVX
Function : Move Data To/From External Memory (XRAM)
Syntax : MOVX operand1,operand2
Description: MOVX moves a byte to or from External Memory into or from theAccumulator.
If operand1 is @DPTR, the Accumulator is moved to the 16-bit External Memory address indicated
by DPTR. This instruction uses both P0 (port 0) and P2 (port 2) to output the 16-bit address and
data. If operand2 is DPTR then the byte is moved from External Memory into the Accumulator.
If operand1 is @R0 or @R1, the Accumulator is moved to the 8-bit External Memory address
indicated by the specified Register. This instruction uses only P0 (port 0) to output the 8-bit address
and data. P2 (port 2) is not affected. If operand2 is @R0 or @R1 then the byte is moved from
External Memory into the Accumulator.
Operation : SWAP
Function : Swap Accumulator Nibbles
Syntax : SWAP A
Description: SWAP swaps bits 0-3 of the Accumulator with bits 4-7 of theAccumulator. This
instruction is identical to executing "RR A" or "RL A" four times.
Operation : XCH
Function : Exchange Bytes
Syntax : XCH A,register
Description: Exchanges the value of the Accumulator with the value contained inregister.
Ex: XCH A, R1
Operation : PUSH
Function : Push Value Onto Stack
Syntax : PUSH
Description: PUSH "pushes" the value of the specified iram addr onto the stack. PUSH first
increments the value of the Stack Pointer by 1, then takes the value stored in iram addr and stores it
in Internal RAM at the location pointed to by the incremented Stack Pointer.
Operation : POP
Function : Pop Value From Stack
Syntax : POP
Description: POP "pops" the last value placed on the stack into the iram addr specified. In other
words, POP will load iram addr with the value of the InternalRAM address pointed to by the
current Stack Pointer. The stack pointer is then decremented by 1.
Arithmetic Instructions
Operation: ADD, ADDC
Function: Add Accumulator, Add Accumulator With Carry
Description: Description: ADD and ADDC both add the value operand to the value of the
Accumulator, leaving the resulting value in the Accumulator. The value operand is not affected.
ADD and ADDC function identically except that ADDC adds the value of operand as well as the
value of the Carry flag whereas ADD does not add the Carry flag to the result.
Operation: SUBB
Function: Subtract from Accumulator With Borrow
Description: SUBB subtract the value of operand from the value of the Accumulator, leaving the
resulting value in the Accumulator. The value operand is not affected.
The Carry Bit (C) is set if a borrow was required for bit 7, otherwise it is cleared. In other words, if
the unsigned value being subtracted is greater than the Accumulatorthe Carry Flag is set.
Operation : MUL
Function : Multiply Accumulator by B
Syntax : MUL AB
Description: Multiples the unsigned value of the Accumulator by the unsigned value of the "B"
register. The least significant byte of the result is placed in the Accumulator and the most-
significant-byte is placed in the "B" register.
Operation: DIV
Function: Divide Accumulator by B
Syntax: DIV AB
Description: Divides the unsigned value of the Accumulator by the unsigned value of the "B"
register. The resulting quotient is placed in the Accumulator and the remainder is placed in the "B"
register.
Operation: INC
Function: Increment Register
Syntax: INC register
Description: INC increments the value of register by 1. If the initial value of register is 255 (0xFF
Hex), incrementing the value will cause it to reset to 0. Note: The Carry Flag is NOT set when the
value "rolls over" from 255 to 0.
In the case of "INC DPTR", the value two-byte unsigned integer value of DPTR is incremented. If
the initial value of DPTR is 65535 (0xFFFF Hex), incrementing the value will cause it to reset to 0.
Again, the Carry Flag is NOT set when the value of DPTR "rolls over" from 65535 to 0.
Operation : DEC
Function : Decrement Register
Syntax : DEC register
Description: DEC decrements the value of register by 1. If the initial value of register is 0,
decrementing the value will cause it to reset to 255 (0xFF Hex). Note: The Carry Flag is NOT set
when the value "rolls over" from 0 to 255.
Logical Instructions
Operation : ORL
Function : Bitwise OR
Syntax : ORL operand1,operand2
Description: ORL does a bitwise "OR" operation between operand1 and operand2, leaving the
resulting value in operand1. The value of operand2 is not affected. A logical "OR" compares the
bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either of
the original operands, otherwise the resulting bit is cleared.
Operation : ANL
Function : Bitwise AND
Syntax : ANL operand1, operand2
Description: ANL does a bitwise "AND" operation between operand1 and operand2, leaving the
resulting value in operand1. The value of operand2 is not affected. A logical "AND" compares the
bits of each operand and sets the corresponding bit in theresulting byte only if the bit was set in both
of the original operands, otherwise the resulting bit is cleared.
Operation : XRL
Function : Bitwise Exclusive OR
Syntax : XRL operand1,operand2
Description: XRL does a bitwise "EXCLUSIVE OR" operation between operand1 and operand2,
leaving the resulting value in operand1. The value of operand2 is not affected. A logical
"EXCLUSIVE OR" compares the bits of each operand and sets thecorresponding bit in the resulting
byte if the bit was set in either (but not both) of the original operands, otherwise the bit is cleared.
Operation : CPL
Function : Complement Register
Syntax : CPL operand
Description: CPL complements operand, leaving the result in operand. If operand is a single bit
then the state of the bit will be reversed. If operand is the Accumulator then all the bits in the
Accumulator will be reversed. This can be thought of as "Accumulator Logical Exclusive OR 255" or
as "255-Accumulator." If the operand refers to a bit of an output Port, the value that will be
complemented is based on the last value written to that bit, not the last value read from it.
Operation : CLR
Function : Clear Register
Syntax : CLR register
Description: CLR clears (sets to 0) all the bit(s) of the indicated register. If the register is a
bit (including the carry bit), only the specified bit is affected. Clearing the Accumulator sets the
Accumulator's value to 0.
Operation : RL
Function : Rotate Accumulator Left
Syntax : RL A
Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the
Accumulator is loaded into bit 0.
Operation : RR
Function : Rotate Accumulator Right
Syntax : RR A
Description: Shifts the bits of the Accumulator to the right. The right-most bit (bit 0) of the
Accumulator is loaded into bit 7.
Operation : RLC
Function : Rotate Accumulator Left Through Carry
Syntax : RLC A
Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the
Accumulator is loaded into the Carry Flag, and the original Carry Flag is loaded into bit 0 of the
Accumulator. This function can be used to quickly multiply a byte by 2.
Operation : RRC
Function : Rotate Accumulator Right Through Carry
Syntax : RRC A
Description: Shifts the bits of the Accumulator to the right. The right-most bit (bit 0) of the
Accumulator is loaded into the Carry Flag, and the original Carry Flag is loaded into bit 7. This
function can be used to quickly divide a byte by 2.
Branching Instructions
Operation : JMP
Function : Jump to Data Pointer + Accumulator
Syntax : JMP @A+DPTR
Description: JMP jumps unconditionally to the address represented by the sum of thevalue of
DPTR and the value of the Accumulator.
Operation : JC
Function : Jump if Carry Set
Syntax : JC reladdr
Description: JC will branch to the address indicated by reladdr if the Carry Bit is set. If the Carry
Bit is not set program execution continues with the instruction following the JC instruction.
Operation : JNC
Function : Jump if Carry Not Set
Syntax : JNC reladdr
Description: JNC branches to the address indicated by reladdr if the carry bit is not set. If the carry
bit is set program execution continues with the instruction following the JNB instruction.
Operation : JZ
Function : Jump if Accumulator Zero
Syntax : JNZ reladdr
Description: JZ branches to the address indicated by reladdr if the Accumulator contains the value
0. If the value of the Accumulator is non-zero program execution continues with the instruction
following the JNZ instruction.
Operation : JNZ
Function : Jump if Accumulator Not Zero
Syntax : JNZ reladdr
Description: JNZ will branch to the address indicated by reladdr if the Accumulator contains any
value except 0. If the value of the Accumulator is zero program execution continues with the
instruction following the JNZ instruction.
Operation : LCALL
Function : Long Call
Syntax : LCALL code addr
Description: LCALL calls a program subroutine. LCALL increments the program counter by 3 (to
point to the instruction following LCALL) and pushes that value ontothe stack (low byte first, high
byte second). The Program Counter is then set to the 16-bit value which follows the LCALL opcode,
causing program execution to continue atthat address.
Operation : ACALL
Function : Absolute Call Within 2K Block
Syntax : ACALL code address
Description: ACALL unconditionally calls a subroutine at the indicated code address. ACALL
pushes the address of the instruction that follows ACALL onto the stack, least-significant-byte first,
most-significant-byte second. The Program Counter is then updated so that program execution
continues at the indicated address.
Operation : RET
Function : Return From Subroutine
Syntax : RET
Description: RET is used to return from a subroutine previously called by LCALL or ACALL.
Program execution continues at the address that is calculated by popping thetopmost 2 bytes off the
stack. The most-significant-byte is popped off the stack first, followed by the least-significant-byte.
Bit-Wise Instructions
Operation : JB
Function : Jump if Bit Set
Syntax : JB bit addr, reladdr
Description: JB branches to the address indicated by reladdr if the bit indicated bybit addr is set.
If the bit is not set program execution continues with the instruction following the JB instruction.
Operation : JNB
Function : Jump if Bit Not Set
Syntax : JNB bit addr,reladdr
Description: JNB will branch to the address indicated by reladdress if the indicated bit is not set. If
the bit is set program execution continues with the instructionfollowing the JNB instruction.
INTERRUPTS
An interrupt is an internal or external event that interrupts the microcontroller to
inform it that a device needs its service. Whenever any device needs its service, the device
notifies the microcontroller by sending it as interrupt signal. Upon receiving an interrupt
signal, the microcontroller interrupts whatever it is doing and serves the device. The program
which is associated with the interrupt is called interrupt Service Routine (ISR). The
microcontroller can serve many devices based on the priority assigned to it.
Execution of an Interrupt
In order to use any interrupt, the following steps must be taken.
It finishes the instruction it is executing and saves the address of the next instruction
(PC) on the stack.
It also saves the current status of all the interrupts internally.
It jumps to a fixed location in memory called the interrupt vector or table that holds the
address of the Interrupt Service Routine (ISR).
The microcontroller gets the address of the ISR from the interrupt vector table and
jumps to it. It starts to execute the interrupt service subroutine until it reaches the last
instruction of the subroutine which is RET 1.
Upon executing RET 1 instruction, the microcontroller returns to the place where it was
interrupted. First it gets the program counter (PC) address from the stack by popping the
top two byes of the stack into the PC. Then it starts to execute from that address.
Interrupt Structure
Interrupts in 8051
Five interrupts are provided in the 805l.
Three of these a regenerated by internal operations: Timer Flag 1 & 0, and the serial
port interrupt (RI or TI).
Two interrupts are triggered by external signals provided by circuitry that is connected
to pin
It jumps to a fixed location in memory called the interrupt vector or table that holds the
address of the Interrupt Service Routine (ISR).
The microcontroller gets the address of the ISR from the interrupt vector table and
jumps to it. It starts to execute the interrupt service subroutine until it reaches the last
instruction of the subroutine which is RET 1.
Upon executing RET 1 instruction, the microcontroller returns to the place where it was
interrupted. First it gets the program counter (PC) address from the stack by popping the
top two byes of the stack into the PC. Then it starts to execute from that address.
Vector
Types Interrupt
Address
Interrupt Vector
Timer flag interrupts
When a timer / counter overflows, the corresponding timer flag TF0 or TFI
(location: 000B H or 001B H) is set to l.
flag is cleared to 0 when the resulting interrupt generates aprogram call to the appropriate
timer subroutine in memory.
External interrupts
The external hardware interrupts INT0 and INT1 are located on pins P3.2 and P3.3.
Inputs on these pins can set the interrupt flags IE0 and IE1 in the TCON register to 1 by level
triggering or edge-triggering.
Fig. Shows the activation of INT0 and INT1
Serial Port Interrupt
In SCON, if RI = l, a data byte is received If TI = 1, a data byte has been transmitted.
These are ORed together to provide a single interrupt to the processor.
The interrupt bit in the IE register is used to both send and receive data.
If IE.4 [ES- Enable serial port interrupt] is enabled, when RI or TI is raised and
8051gets interrupted and jumps to memory address location 0023H to execute the ISR.
The Fig.6.Showsthe serial interrupt is invoke by TI or RI flags.
IE Register
Parallel I /O Ports :
The 8051 microcontroller has four parallel I/O ports , each of 8-bits .So, it provides the user
32 I/O lines for connecting the microcontroller to the peripherals. The four ports are P0 (Port 0),
P1(Port1) ,P2(Port 2) and P3 (Port3). Upon reset all the ports are output ports. In order to make them
input, all the ports must be set i.e a high bit mustbe sent to all the port pins. This is normally done by
the instruction “SETB”.
Ex: MOV A,#0FFH ; A = FF
MOV P0,A ; make P0 an input port
PORT 0:
Port 0 is an 8-bit I/O port with dual purpose. If external memory is used, these port pins are
used for the lower address byte address/data (AD0-AD7), otherwise all bitsof the port are either input
or output.. Unlike other ports, Port 0 is not provided with pull- up resistors internally ,so for PORT0
pull-up resistors of nearly 10k are to be connected externally as shown.
PORT 1:
Port 1 occupies a total of 8 pins (pins 1 through 8). It has no dual application and acts only as
input or output port. In contrast to port 0, this port does not need any pull-up resistors since pull-up
resistors connected internally. Upon reset, Port 1 is configured as an output port. To configure it as an
input port, port bits must be set i.e a high bit must
be sent to all the port pins. This is normally done by the instruction “SETB”.
Ex: MOV A, #0FFH; A=FF HEX
MOV P1, A; make P1 an input port by writing 1’s to all of its pins
PORT 2:
Port 2 is also an eight-bit parallel port. (pins 21- 28). It can be used as input or output port. As
this port is provided with internal pull-up resistors it does not need any external pull-up resistors.
Upon reset, Port 2 is configured as an output port. If the port isto be used as input port, all the port bits
must be made high by sending FF to the port. For
Ex: MOV A, #0FFH ; A=FF hex
PORT 3:
Port3 is also an 8-bit parallel port with dual function. (pins 10 to 17). The port pins can be used
for I/O operations as well as for control operations. The details of these additional operations are
given below in the table. Port 3 also do not need any externalpull-up resistors as they are provided
internally similar to the case of Port2 & Port 1. Upon reset port 3 is configured as an output port. If
the port is to be used as input port, all the port bits must be made high by sending FF to the port.
2 P3.1 11 TxD
3 P3.2 12
4 P3.3 13
5 P3.4 14 T0
6 P3.5 15 T1
7 P3.6 16
8 P3.7 17
Serial communication
Serial communication uses only one or two data lines to transfer data and is generally used for
long distance communication. In serial communication the data is sentas one bit at a time in a timed
sequence on a single wire. Serial Communication takes place in two methods, Asynchronous data
Transfer and Synchronous Data Transfer.
After the Start Bit, the individual bits of the word of data are sent. Here each bit inthe word is
transmitted for exactly the same amount of time as all of the other bits. Whenthe entire data word has
been sent, the transmitter may add a Parity Bit that the transmitter generates. The Parity bit may be used
by the receiver to perform simple error checking. Then at least one Stop Bit is sent by the transmitter.
If the Stop Bit does not appear when it is supposed to, the UART considers the entire word to be
corrupted and will report aFraming Error.
Baud rate is a measurement of transmission speed in asynchronous communication, it
represents the number of bits/sec that are actually being sent over the serial link. The Baud count
includes the overhead bits Start, Stop and Parity that are generated by the sending UART and
removed by the receiving UART.
1. DTE (Data Terminal Equipment). Examples of DTE are computers, printers & terminals.
2. DCE (Data Communication Equipment). Example of DCE is modems.
Parallel Data Transfer:
Parallel communication uses multiple wires (bus) running parallel to each other, and can
transmit data on all the wires simultaneously. i.e all the bits of the byte are transmitted at a time. So,
speed of the parallel data transfer is extremely high compared to serial data transfer. An 8-bit parallel
data transfer is 8-times faster than serial data transfer. Hence with in the computer all data transfer is
mainly based on Parallel data transfer. But only limitation is due to the high cost, this method is
limited to only short distance communications.
In a pipelined processor, a pipeline has two ends, the input end and the output end.
Between these ends, there are multiple stages/segments such that the output of one stage
is connected to the input of the next stage and each stage performs a specific operation.
Interface registers are used to hold the intermediate output between two stages. These
interface registers are also called latch or buffer.
All the stages in the pipeline along with the interface registers are controlled by a
common clock.
Stage / Cycle 1 2 3 4 5 6 7 8
S1 I1 I2
S2 I1 I2
S3 I1 I2
S4 I1 I2
Stage / Cycle 1 2 3 4 5
S1 I1 I2
S2 I1 I2
S3 I1 I2
S4 I1 I2
Total time = 5 Cycle Pipeline Stages RISC processor has 5 stage instruction pipeline to
execute all the instructions in the RISC instruction set. Following are the 5 stages of the
RISC pipeline with their respective operations:
Stage 1 (Instruction Fetch) In this stage the CPU reads instructions from the address in
the memory whose value is present in the program counter.
Stage 2 (Instruction Decode) In this stage, instruction is decoded and the register file is
accessed to get the values from the registers used in the instruction.
Stage 3 (Instruction Execute) In this stage, ALU operations are performed.
Stage 4 (Memory Access) In this stage, memory operands are read and written from/to
the memory that is present in the instruction.
Stage 5 (Write Back) In this stage, computed/fetched value is written back to the register
present in the instructions.