Esp32 s3 Wroom 2 - Datasheet - en
Esp32 s3 Wroom 2 - Datasheet - en
Esp32 s3 Wroom 2 - Datasheet - en
Datasheet
ESP32-S3-WROOM-2
Version 1.2
Espressif Systems
Copyright © 2023
www.espressif.com
1 Module Overview
1 Module Overview
Note:
Check the link or the QR code to make sure that you use the latest version of this document:
https://www.espressif.com/documentation/esp32-s3-wroom-2_datasheet_en.pdf
1.1 Features
• ESP32-S3R8V SoC embedded, Xtensa® • GPIO, SPI, LCD interface, Camera interface,
dual-core 32-bit LX7 microprocessor (with single UART, I2C, I2S, remote control, pulse counter,
precision FPU), up to 240 MHz LED PWM, full-speed USB 2.0 OTG, USB
Serial/JTAG controller, MCPWM, SDIO host,
• 384 KB ROM GDMA, TWAI® controller (compatible with ISO
11898-1), ADC, touch sensor, temperature
• 512 KB SRAM
sensor, timers and watchdogs
• 16 KB SRAM in RTC
Note:
• 8 MB PSRAM * Please refer to ESP32-S3 Series Datasheet for
detailed information about the module peripherals.
Wi-Fi
1.2 Description
ESP32-S3-WROOM-2 is a powerful, generic Wi-Fi + Bluetooth LE MCU module that has a rich set of peripherals.
It provides acceleration for neural network computing and signal processing workloads. It is an ideal choice for a
wide variety of application scenarios related to AI and Artificial Intelligence of Things (AIoT), such as wake word
detection and speech commands recognition, face detection and recognition, smart home, smart appliances,
smart control panel, smart speaker, etc.
ESP32-S3-WROOM-2 comes with a PCB antenna. It has ESP32-S3R8V SoC embedded. A selection of module
variants are available for customers with flash memory of 16/32 MB and PSRAM memory of 8 MB. Please note
that for R8 series modules with Octal SPI PSRAM, if the PSRAM ECC function is enabled, the maximum ambient
temperature can be improved to 85 °C, while the usable size of PSRAM will be reduced by 1/16.
At the core of the modules is an ESP32-S3R8V, an Xtensa® 32-bit LX7 CPU that operates at up to 240 MHz.
You can power off the CPU and make use of the low-power co-processor to constantly monitor the peripherals
for changes or crossing of thresholds.
ESP32-S3R8V integrates a rich set of peripherals including SPI, LCD interface, Camera interface, UART, I2C, I2S,
remote control, pulse counter, LED PWM, USB Serial/JTAG controller, MCPWM, SDIO host, GDMA, TWAI®
controller (compatible with ISO 11898-1), ADC, touch sensor, temperature sensor, timers and watchdogs, as well
as up to 45 GPIOs. It also includes a full-speed USB 2.0 On-The-Go (OTG) interface to enable USB
communication.
Note:
* For more information on ESP32-S3, please refer to ESP32-S3 Series Datasheet.
1.3 Applications
Contents
1 Module Overview 2
1.1 Features 2
1.2 Description 3
1.3 Applications 3
2 Block Diagram 9
3 Pin Definitions 10
3.1 Pin Layout 10
3.2 Pin Description 10
3.3 Strapping Pins 13
3.3.1 Chip Boot Mode Control 14
3.3.2 VDD_SPI Voltage Control 15
3.3.3 ROM Messages Printing Control 15
3.3.4 JTAG Signal Source Control 15
4 Electrical Characteristics 17
4.1 Absolute Maximum Ratings 17
4.2 Recommended Operating Conditions 17
4.3 DC Characteristics (3.3 V, 25 °C) 17
4.4 Current Consumption Characteristics 18
4.4.1 RF Current Consumption in Active Mode 18
4.4.2 Current Consumption in Other Modes 18
4.5 Wi-Fi RF Characteristics 21
4.5.1 Wi-Fi RF Standards 21
4.5.2 Wi-Fi RF Transmitter (TX) Specifications 21
4.5.3 Wi-Fi RF Receiver (RX) Specifications 22
4.6 Bluetooth LE Radio 23
4.6.1 Bluetooth LE RF Transmitter (TX) Specifications 23
4.6.2 Bluetooth LE RF Receiver (RX) Specifications 25
5 Module Schematics 28
6 Peripheral Schematics 29
8 Product Handling 32
8.1 Storage Conditions 32
8.2 Electrostatic Discharge (ESD) 32
8.3 Soldering Profile 32
Revision History 35
List of Tables
1 ESP32-S3-WROOM-2 Series Comparison 3
2 Pin Definitions 10
3 Default Configuration of Strapping Pins 13
4 Description of Timing Parameters for the Strapping Pins 14
5 Chip Boot Mode Control 14
6 VDD_SPI Voltage Control 15
7 JTAG Signal Source Control 16
8 Absolute Maximum Ratings 17
9 Recommended Operating Conditions 17
10 DC Characteristics (3.3 V, 25 °C) 17
11 Current Consumption Depending on RF Modes 18
12 Current Consumption in Modem-sleep Mode 19
13 Current Consumption in Low-Power Modes 19
14 Wi-Fi RF Standards 21
15 TX Power with Spectral Mask and EVM Meeting 802.11 Standards 21
16 TX EVM Test 21
17 RX Sensitivity 22
18 Maximum RX Level 23
19 RX Adjacent Channel Rejection 23
20 Bluetooth LE Frequency 23
21 Transmitter Characteristics - Bluetooth LE 1 Mbps 23
22 Transmitter Characteristics - Bluetooth LE 2 Mbps 24
23 Transmitter Characteristics - Bluetooth LE 125 Kbps 24
24 Transmitter Characteristics - Bluetooth LE 500 Kbps 25
25 Receiver Characteristics - Bluetooth LE 1 Mbps 25
26 Receiver Characteristics - Bluetooth LE 2 Mbps 26
27 Receiver Characteristics - Bluetooth LE 125 Kbps 26
28 Receiver Characteristics - Bluetooth LE 500 Kbps 27
List of Figures
1 ESP32-S3-WROOM-2 Block Diagram 9
2 Pin Layout (Top View) 10
3 Visualization of Timing Parameters for the Strapping Pins 14
4 ESP32-S3-WROOM-2 Schematics 28
5 Peripheral Schematics 29
6 ESP32-S3-WROOM-2 Physical Dimensions 30
7 ESP32-S3-WROOM-2 Recommended PCB Land Pattern 31
8 Reflow Profile 32
2 Block Diagram
ESP32-S3-WROOM-2
40 MHz
Crystal
3V3 Antenna
RF Matching
ESP32-S3R8V
EN GPIOs
OSPI PSRAM
VDD_SPI
SPIDQS
SPICS0
SPICLK
SPIWP
SPIIO4
SPIIO5
SPIIO6
SPIIO7
SPIHD
SPIQ
SPID
OSPI Flash
3 Pin Definitions
Keepout Zone
GND 1 40 GND
3V3 2 39 IO1
EN 3 38 IO2
IO5 5 GND
41
GND
36 RXD0
GND
IO6 6 35 IO42
GND GND GND
IO7 7 34 IO41
IO15 8 33 IO40
IO16 9 32 IO39
IO17 10 31 IO38
IO18 11 30 NC
IO8 12 29 NC
IO19 13 28 NC
IO20 14 27 IO0
21
22
20
24
23
26
25
16
17
15
18
19
IO11
IO21
IO12
IO3
IO10
IO14
IO46
IO9
IO13
IO47
IO48
IO45
For explanations of pin names and function names, as well as configurations of peripheral pins, please refer to
ESP32-S3 Series Datasheet.
At each startup or reset, a module requires some initial configuration parameters, such as in which boot mode to
load the module, voltage of flash memory, etc. These parameters are passed over via the strapping pins. After
reset, the strapping pins operate as regular IO pins.
The parameters controlled by the given strapping pins at module reset are as follows:
GPIO0, GPIO45, and GPIO46 are connected to the chip’s internal weak pull-up/pull-down resistors at chip reset.
These resistors determine the default bit values of the strapping pins. Also, these resistors determine the bit
values if the strapping pins are connected to an external high-impedance circuit.
To change the bit values, the strapping pins should be connected to external pull-down/pull-up resistances. If the
ESP32-S3 is used as a device by a host MCU, the strapping pin voltage levels can also be controlled by the host
MCU.
All strapping pins have latches. At system reset, the latches sample the bit values of their respective strapping
pins and store them until the chip is powered down or shut down. The states of latches cannot be changed in
any other way. It makes the strapping pin values available during the entire chip operation, and the pins are freed
up to be used as regular IO pins after reset.
Regarding the timing requirements for the strapping pins, there are such parameters as setup time and hold time.
For more information, see Table 4 and Figure 3.
tSU tH
VIL_nRST
CHIP_PU
VIH
Strapping pin
In SPI Boot mode, the ROM bootloader loads and executes the program from SPI flash to boot the
system.
In Joint Download Boot mode, users can download binary files into flash using UART0 or USB interface. It is also
possible to download binary files into SRAM and execute it from SRAM.
In addition to SPI Boot and Joint Download Boot modes, ESP32-S3 also supports SPI Download Boot mode.
For details, please see ESP32-S3 Technical Reference Manual > Chapter Chip Boot Control.
• UART.
The ROM messages printing to UART or USB Serial/JTAG controller can be respectively disabled by configuring
registers and eFuse. For detailed information, please refer to ESP32-S3 Technical Reference Manual > Chapter
Chip Boot Control.
4 Electrical Characteristics
Note:
The content below is excerpted from Section Power Consumption in Other Modes in ESP32-S3 Series Datasheet.
Power off CHIP_PU is set to low level. The chip is shut down. 1
1
In Light-sleep mode, all related SPI pins are pulled up. For chips embedded with
PSRAM, please add corresponding PSRAM consumption values, e.g., 140 µA
for 8 MB Octal PSRAM (3.3 V), 200 µA for 8 MB Octal PSRAM (1.8 V) and 40
µA for 2 MB Quad PSRAM (3.3 V).
Name Description
1
Center frequency range of operating channel 2412 ~ 2484 MHz
Wi-Fi wireless standard IEEE 802.11b/g/n
11b: 1, 2, 5.5 and 11 Mbps
20 MHz 11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps
Data rate
11n: MCS0-7, 72.2 Mbps (Max)
40 MHz 11n: MCS0-7, 150 Mbps (Max)
Antenna type PCB antenna
1
Device should operate in the center frequency range allocated by regional regulatory authorities. Target
center frequency range is configurable by software.
Table 15: TX Power with Spectral Mask and EVM Meeting 802.11 Standards
5 Module Schematics
5 Module Schematics
This is the reference design of the module.
5 4 3 2 1
GND
GND GND
Y1
3
GND
GND XOUT
The values of C1 and C4 vary with C1 C4
D D
the selection of the crystal. TBD TBD VDD33 VDD33 VDD33 GND GND
XIN
U3 ESP32-S3-WROOM-2
The value of R4 varies with the 41
EPAD
2
actual PCB board. R4 could be a 1
GND GND
40
R1 2 39 GPIO1
resistor or inductor, the initial D1 CHIP_PU 3 3V3 IO1 38 GPIO2
value is suggested to be 24 nH. GND 10K(NC) ESD GPIO4 4 EN IO2 37 U0TXD
VDD33 40MHz(±10ppm) GPIO5 5 IO4 TXD0 36 U0RXD
GPIO46 GPIO6 6 IO5 RXD0 35 GPIO42
GPIO45 GPIO7 7 IO6 IO42 34 GPIO41
U0RXD GPIO15 8 IO7 IO41 33 GPIO40
C3 C2 R3 499 U0TXD GND GPIO16 9 IO15 IO40 32 GPIO39
GPIO42 GPIO17 10 IO16 IO39 31 GPIO38
1uF 10nF GPIO41 GPIO18 11 IO17 IO38 30
0
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R4
IO46
IO10
IO11
IO12
IO13
IO14
IO21
IO47
IO48
IO45
C6 C7 C8 C9 C10
IO3
IO9
C C
VDD33
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
10uF 1uF 0.1uF 0.1uF 0.1uF
15
16
17
18
19
20
21
22
23
24
25
26
VDDA
VDDA
GND
U0RXD
U0TXD
MTMS
MTDO
MTCK
XTAL_P
XTAL_N
GPIO46
GPIO45
MTDI
VDD3P3_CPU
GPIO38
GND GND GND GND GND
28
GPIO46
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO21
GPIO47
GPIO48
GPIO45
GPIO3
GPIO9
ANT1 50 ohm Impedance Control
1 RF_ANT L2 TBD LNA_IN 1 42 R5 0 SPI_DQS
2 2 LNA_IN GPIO37 41 R6 0 SPI_IO7
VDD3P3 GPIO36 SPI_IO6
L3 C11 C12
CHIP_PU
3
VDD3P3 GPIO35
40 R7 0
SPI_IO5
ESP32-S3-WROOM-2(pin-out)
PCB_ANT 4 39 R8 0
TBD TBD TBD GPIO0 5 CHIP_PU GPIO34 38 R9 0 SPI_IO4
GPIO1 6 GPIO0 GPIO33 37 GPIO47 VDD_SPI
GPIO2 7 GPIO1 SPICLK_P 36 GPIO48
GND GND GND GPIO3 8 GPIO2 SPICLK_N 35 R16 0 SPI_D
C16
GPIO4 9 GPIO3 SPID 34 R15 0 SPI_Q R11
GPIO5 10 GPIO4 SPIQ 33 R10 0 SPI_CLK
TBD
GPIO6 11 GPIO5 SPICLK 32 SPI_CS0 10K VDD_SPI
GPIO7 12 GPIO6 SPICS0 31 R14 0 SPI_WP
GND GPIO8 13 GPIO7 SPIWP 30 R13 0 SPI_HD A4 B4
B B
GPIO9 14 GPIO8 SPIHD 29 A5 RESET# VCC D1
GPIO9 VDD_SPI ECS# VCC
VDD3P3_RTC
SPI_DQS
The values of L3, C16, C11, L2 and C12 C3 E4
XTAL_32K_N
XTAL_32K_P
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
SPICS1
SPI_D D3 SCLK NC1 A3
SPI_Q SI(IO0) NC2 10K
NC: No component. 0.1uF 1uF D2 B1
ESP32-S3-WROOM-2 Datasheet v1.2
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GND
A A
6 Peripheral Schematics
This is the typical application circuit of the module connected with peripheral components (for example, power
supply, antenna, reset button, JTAG interface, and UART interface).
IO7 IO41 2
1
GND
2
IO18 11 30 JTAG
GND IO18 NC
C7 12pF(NC) IO8 12 29 JP4
IO19 13 IO8 NC 28 2
IO20 14 IO19 NC 27 IO0 1 2
JP3 IO20 IO0 1
1 USB_D- R6 0 Boot Option
1
IO46
IO10
IO11
IO12
IO13
IO14
IO21
IO47
IO48
IO45
2 USB_D+ R4 0 IO3
IO9
2 SW1
USB OTG C6 C5 NC: No component. U1 R7 0 EN
15
16
17
18
19
20
21
22
23
24
25
26
TBD TBD C8 0.1uF
IO46
IO10
IO11
IO12
IO13
IO14
IO21
IO47
IO48
IO45
IO3
IO9
GNDGND GND
• Soldering the EPAD to the ground of the base board is not a must, however, it can optimize thermal
performance. If you choose to solder it, please apply the correct amount of soldering paste. Too much
soldering paste may increase the gap between the module and the baseboard. As result, the adhesion
between other pins and the baseboard may be poor.
• To ensure that the power supply to the ESP32-S3 chip is stable during power-up, it is advised to add an
RC delay circuit at the EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩ and
C = 1 µF. However, specific parameters should be adjusted based on the power-up timing of the module
and the power-up and reset sequence timing of the chip. For ESP32-S3’s power-up and reset sequence
timing diagram, please refer to ESP32-S3 Series Datasheet > Section Power Supply.
5 4 3 2
Unit: mm
18±0.2 3.1±0.15
0.8
6
1
Ø0
.5 0.5
25.5±0.2
40 x 0.9
40 x Ø0.55
4
16.51
1
17.6
1.27
40 x 0.9
12.66
7.64
1.05
15.8
1.5
Note:
For information about tape, reel, and product marking, please refer to Espressif Module Packaging Information.
ESP32-S3-WROOM-2U Dimensions
Unit: mm
18±0.2 3.2±0.15
2.49 0.8
Ø0.5
1
11.5 0.5
40 x 0.9
2.46
40 x Ø0.55
4
19.2±0.2
1
1.27
15.8 4
16.51
40 x 0.9
12.66
13.2
17.6
7.64
1.05
1.5
• Figure for recommended PCB land pattern with all the dimensions needed for PCB design. See Figure 7
ESP32-S3-WROOM-2 Recommended PCB Land Pattern.
• Source file of recommended PCB land pattern to measure dimensions not covered in Figure 7. You can
view the source files for ESP32-S3-WROOM-2 with Autodesk Viewer.
Unit: mm
Via for thermal pad
Copper
18
7.49
Antenna Area
6
40 x1.5
1 1 40
0.5
40 x0.9
25.5
4
16.51
4
1.27
12.66
7.64
1.5
0.5
15 26
0.5 1.27
2.015 2.015
17.5
8 Product Handling
After unpacking, the module must be soldered within 168 hours with the factory conditions 25±5 °C and
60%RH. If the above conditions are not met, the module needs to be baked.
Peak Temp.
235 ~ 250 ℃
250
Preheating zone Reflow zone Cooling zone
150 ~ 200 ℃ 60 ~ 120 s 217 ℃ 60 ~ 90 s –1 ~ –5 ℃/s
217
200
Soldering time
> 30 s
Ramp-up zone
1 ~ 3 ℃/s
100
50
25
Time (sec.)
0
0 50 100 150 200 250
Developer Zone
• ESP-IDF Programming Guide for ESP32-S3 – Extensive documentation for the ESP-IDF development framework.
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https://github.com/espressif
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https://blog.espressif.com/
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Revision History