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Esp32 s3 Wroom 2 - Datasheet - en

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ESP32-S3-WROOM-2

Datasheet

2.4 GHz Wi-Fi (802.11 b/g/n) and Bluetooth® 5 (LE) module


Built around ESP32-S3R8V SoC, Xtensa® dual-core 32-bit LX7 microprocessor
Flash up to 32 MB (Octal), 8 MB PSRAM (Octal)
33 GPIOs, rich set of peripherals
On-board PCB antenna

ESP32-S3-WROOM-2

Version 1.2
Espressif Systems
Copyright © 2023

www.espressif.com
1 Module Overview

1 Module Overview
Note:

Check the link or the QR code to make sure that you use the latest version of this document:
https://www.espressif.com/documentation/esp32-s3-wroom-2_datasheet_en.pdf

1.1 Features

CPU and On-Chip Memory Peripherals

• ESP32-S3R8V SoC embedded, Xtensa® • GPIO, SPI, LCD interface, Camera interface,
dual-core 32-bit LX7 microprocessor (with single UART, I2C, I2S, remote control, pulse counter,
precision FPU), up to 240 MHz LED PWM, full-speed USB 2.0 OTG, USB
Serial/JTAG controller, MCPWM, SDIO host,
• 384 KB ROM GDMA, TWAI® controller (compatible with ISO
11898-1), ADC, touch sensor, temperature
• 512 KB SRAM
sensor, timers and watchdogs
• 16 KB SRAM in RTC
Note:
• 8 MB PSRAM * Please refer to ESP32-S3 Series Datasheet for
detailed information about the module peripherals.
Wi-Fi

• 802.11 b/g/n Integrated Components on Module

• Bit rate: 802.11n up to 150 Mbps • 40 MHz crystal oscillator

• A-MPDU and A-MSDU aggregation • Up to 32 MB Octal SPI flash

• 0.4 µs guard interval support Antenna Options

• Center frequency range of operating channel: • On-board PCB antenna


2412 ~ 2484 MHz
Operating Conditions
Bluetooth
• Operating voltage/Power supply: 3.0 ~ 3.6 V
• Bluetooth LE: Bluetooth 5, Bluetooth mesh • Operating ambient temperature: –40 ~ 65 °C

• Speed: 125 Kbps, 500 Kbps, 1 Mbps, 2 Mbps


Certification
• Advertising extensions
• RF certification: See certificates
• Multiple advertisement sets
• Green certification: RoHS/REACH
• Channel selection algorithm #2
Test
• Internal co-existence mechanism between Wi-Fi
and Bluetooth to share the same antenna • HTOL/HTSL/uHAST/TCT/ESD

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1 Module Overview

1.2 Description
ESP32-S3-WROOM-2 is a powerful, generic Wi-Fi + Bluetooth LE MCU module that has a rich set of peripherals.
It provides acceleration for neural network computing and signal processing workloads. It is an ideal choice for a
wide variety of application scenarios related to AI and Artificial Intelligence of Things (AIoT), such as wake word
detection and speech commands recognition, face detection and recognition, smart home, smart appliances,
smart control panel, smart speaker, etc.

ESP32-S3-WROOM-2 comes with a PCB antenna. It has ESP32-S3R8V SoC embedded. A selection of module
variants are available for customers with flash memory of 16/32 MB and PSRAM memory of 8 MB. Please note
that for R8 series modules with Octal SPI PSRAM, if the PSRAM ECC function is enabled, the maximum ambient
temperature can be improved to 85 °C, while the usable size of PSRAM will be reduced by 1/16.

The series comparison for ESP32-S3-WROOM-2 is as follows:

Table 1: ESP32-S3-WROOM-2 Series Comparison

Ambient Temp.4 Size5


Ordering Code Flash1, 2 PSRAM3
(°C) (mm)
ESP32-S3-WROOM-2-N16R8V 16 MB (Octal SPI)
8 MB (Octal SPI) –40 ∼ 65 18.0 × 25.5 × 3.1
ESP32-S3-WROOM-2-N32R8V 32 MB (Octal SPI)
1
By default, the SPI flash on the module operates at a maximum clock frequency of 120 MHz and does not support
the auto suspend feature.
2
The integrated flash supports:
- More than 100,000 program/erase cycles
- More than 20 years data retention time
3
This module uses PSRAM integrated in the chip’s package.
4
Ambient temperature specifies the recommended temperature range of the environment immediately outside the
Espressif module.
5
For details, refer to Section 7.1 Physical Dimensions.

At the core of the modules is an ESP32-S3R8V, an Xtensa® 32-bit LX7 CPU that operates at up to 240 MHz.
You can power off the CPU and make use of the low-power co-processor to constantly monitor the peripherals
for changes or crossing of thresholds.

ESP32-S3R8V integrates a rich set of peripherals including SPI, LCD interface, Camera interface, UART, I2C, I2S,
remote control, pulse counter, LED PWM, USB Serial/JTAG controller, MCPWM, SDIO host, GDMA, TWAI®
controller (compatible with ISO 11898-1), ADC, touch sensor, temperature sensor, timers and watchdogs, as well
as up to 45 GPIOs. It also includes a full-speed USB 2.0 On-The-Go (OTG) interface to enable USB
communication.

Note:
* For more information on ESP32-S3, please refer to ESP32-S3 Series Datasheet.

1.3 Applications

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1 Module Overview

• Generic Low-power IoT Sensor Hub • Smart Building

• Generic Low-power IoT Data Loggers • Industrial Automation


• Cameras for Video Streaming
• Smart Agriculture
• Over-the-top (OTT) Devices
• Audio Applications
• USB Devices
• Health Care Applications
• Speech Recognition
• Wi-Fi-enabled Toys
• Image Recognition

• Mesh Network • Wearable Electronics

• Home Automation • Retail & Catering Applications

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Contents

Contents

1 Module Overview 2
1.1 Features 2
1.2 Description 3
1.3 Applications 3

2 Block Diagram 9

3 Pin Definitions 10
3.1 Pin Layout 10
3.2 Pin Description 10
3.3 Strapping Pins 13
3.3.1 Chip Boot Mode Control 14
3.3.2 VDD_SPI Voltage Control 15
3.3.3 ROM Messages Printing Control 15
3.3.4 JTAG Signal Source Control 15

4 Electrical Characteristics 17
4.1 Absolute Maximum Ratings 17
4.2 Recommended Operating Conditions 17
4.3 DC Characteristics (3.3 V, 25 °C) 17
4.4 Current Consumption Characteristics 18
4.4.1 RF Current Consumption in Active Mode 18
4.4.2 Current Consumption in Other Modes 18
4.5 Wi-Fi RF Characteristics 21
4.5.1 Wi-Fi RF Standards 21
4.5.2 Wi-Fi RF Transmitter (TX) Specifications 21
4.5.3 Wi-Fi RF Receiver (RX) Specifications 22
4.6 Bluetooth LE Radio 23
4.6.1 Bluetooth LE RF Transmitter (TX) Specifications 23
4.6.2 Bluetooth LE RF Receiver (RX) Specifications 25

5 Module Schematics 28

6 Peripheral Schematics 29

7 Physical Dimensions and PCB Land Pattern 30


7.1 Physical Dimensions 30
7.2 Recommended PCB Land Pattern 31

8 Product Handling 32
8.1 Storage Conditions 32
8.2 Electrostatic Discharge (ESD) 32
8.3 Soldering Profile 32

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Contents

8.3.1 Reflow Profile 32


8.4 Ultrasonic Vibration 33

9 Related Documentation and Resources 34

Revision History 35

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List of Tables

List of Tables
1 ESP32-S3-WROOM-2 Series Comparison 3
2 Pin Definitions 10
3 Default Configuration of Strapping Pins 13
4 Description of Timing Parameters for the Strapping Pins 14
5 Chip Boot Mode Control 14
6 VDD_SPI Voltage Control 15
7 JTAG Signal Source Control 16
8 Absolute Maximum Ratings 17
9 Recommended Operating Conditions 17
10 DC Characteristics (3.3 V, 25 °C) 17
11 Current Consumption Depending on RF Modes 18
12 Current Consumption in Modem-sleep Mode 19
13 Current Consumption in Low-Power Modes 19
14 Wi-Fi RF Standards 21
15 TX Power with Spectral Mask and EVM Meeting 802.11 Standards 21
16 TX EVM Test 21
17 RX Sensitivity 22
18 Maximum RX Level 23
19 RX Adjacent Channel Rejection 23
20 Bluetooth LE Frequency 23
21 Transmitter Characteristics - Bluetooth LE 1 Mbps 23
22 Transmitter Characteristics - Bluetooth LE 2 Mbps 24
23 Transmitter Characteristics - Bluetooth LE 125 Kbps 24
24 Transmitter Characteristics - Bluetooth LE 500 Kbps 25
25 Receiver Characteristics - Bluetooth LE 1 Mbps 25
26 Receiver Characteristics - Bluetooth LE 2 Mbps 26
27 Receiver Characteristics - Bluetooth LE 125 Kbps 26
28 Receiver Characteristics - Bluetooth LE 500 Kbps 27

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List of Figures

List of Figures
1 ESP32-S3-WROOM-2 Block Diagram 9
2 Pin Layout (Top View) 10
3 Visualization of Timing Parameters for the Strapping Pins 14
4 ESP32-S3-WROOM-2 Schematics 28
5 Peripheral Schematics 29
6 ESP32-S3-WROOM-2 Physical Dimensions 30
7 ESP32-S3-WROOM-2 Recommended PCB Land Pattern 31
8 Reflow Profile 32

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OSPI Flash
2 Block Diagram

2 Block Diagram

ESP32-S3-WROOM-2
40 MHz
Crystal
3V3 Antenna

RF Matching

ESP32-S3R8V
EN GPIOs

OSPI PSRAM

VDD_SPI
SPIDQS
SPICS0
SPICLK

SPIWP
SPIIO4
SPIIO5
SPIIO6
SPIIO7
SPIHD
SPIQ
SPID

OSPI Flash

Figure 1: ESP32-S3-WROOM-2 Block Diagram

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3 Pin Definitions

3 Pin Definitions

3.1 Pin Layout


The pin diagram below shows the approximate location of pins on the module. For the actual diagram drawn to
scale, please refer to Figure 7.1 Physical Dimensions.

Keepout Zone

GND 1 40 GND

3V3 2 39 IO1

EN 3 38 IO2

IO4 4 GND GND GND 37 TXD0

IO5 5 GND
41
GND
36 RXD0
GND

IO6 6 35 IO42
GND GND GND

IO7 7 34 IO41

IO15 8 33 IO40

IO16 9 32 IO39

IO17 10 31 IO38

IO18 11 30 NC

IO8 12 29 NC

IO19 13 28 NC

IO20 14 27 IO0
21

22
20

24
23

26
25
16

17
15

18

19
IO11

IO21
IO12
IO3

IO10

IO14
IO46

IO9

IO13

IO47

IO48

IO45

Figure 2: Pin Layout (Top View)

3.2 Pin Description


The module has 41 pins. See pin definitions in Table 2 Pin Definitions.

For explanations of pin names and function names, as well as configurations of peripheral pins, please refer to
ESP32-S3 Series Datasheet.

Table 2: Pin Definitions

Name No. Type 1 Function


GND 1 P GND
Cont’d on next page

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3 Pin Definitions

Table 2 – cont’d from previous page


1
Name No. Type Function
3V3 2 P Power supply
High: on, enables the chip.
EN 3 I Low: off, the chip powers off.
Note: Do not leave the EN pin floating.
IO4 4 I/O/T RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3
IO5 5 I/O/T RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4
IO6 6 I/O/T RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5
IO7 7 I/O/T RTC_GPIO7, GPIO7, TOUCH7, ADC1_CH6
IO15 8 I/O/T RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4, XTAL_32K_P
IO16 9 I/O/T RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5, XTAL_32K_N
IO17 10 I/O/T RTC_GPIO17, GPIO17, U1TXD, ADC2_CH6
IO18 11 I/O/T RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7, CLK_OUT3
IO8 12 I/O/T RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7, SUBSPICS1
IO19 13 I/O/T RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2, USB_D-
IO20 14 I/O/T RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1, USB_D+
IO3 15 I/O/T RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2
IO46 16 I/O/T GPIO46
IO9 17 I/O/T RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD, SUBSPIHD
RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4,
IO10 18 I/O/T
SUBSPICS0
RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5,
IO11 19 I/O/T
SUBSPID
RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6,
IO12 20 I/O/T
SUBSPICLK
RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7,
IO13 21 I/O/T
SUBSPIQ
RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS,
IO14 22 I/O/T
SUBSPIWP
IO21 23 I/O/T RTC_GPIO21, GPIO21
IO47 24 I/O/T SPICLK_P_DIFF, GPIO472, SUBSPICLK_P_DIFF
IO48 25 I/O/T SPICLK_N_DIFF, GPIO482, SUBSPICLK_N_DIFF
IO45 26 I/O/T GPIO45
IO0 27 I/O/T RTC_GPIO0, GPIO0
NC 28 - NC
NC 29 - NC
NC 30 - NC
IO38 31 I/O/T GPIO38, FSPIWP, SUBSPIWP
IO39 32 I/O/T MTCK, GPIO39, CLK_OUT3, SUBSPICS1
IO40 33 I/O/T MTDO, GPIO40, CLK_OUT2
IO41 34 I/O/T MTDI, GPIO41, CLK_OUT1
IO42 35 I/O/T MTMS, GPIO42
RXD0 36 I/O/T U0RXD, GPIO44, CLK_OUT2
Cont’d on next page

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3 Pin Definitions

Table 2 – cont’d from previous page


1
Name No. Type Function
TXD0 37 I/O/T U0TXD, GPIO43, CLK_OUT1
IO2 38 I/O/T RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1
IO1 39 I/O/T RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0
GND 40 P GND
EPAD 41 P GND
1
P: power supply; I: input; O: output; T: high impedance. Bold font is the default function of the pin.
2
As the VDD_SPI voltage of the ESP32-S3R8V chip has been set to 1.8 V, the working voltage for
GPIO47 and GPIO48 would also be 1.8 V, which is different from other GPIOs.

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3 Pin Definitions

3.3 Strapping Pins


Note:
The content below is excerpted from ESP32-S3 Series Datasheet > Section Strapping Pins. For the strapping pin mapping
between the chip and modules, please refer to Chapter 5 Module Schematics.

At each startup or reset, a module requires some initial configuration parameters, such as in which boot mode to
load the module, voltage of flash memory, etc. These parameters are passed over via the strapping pins. After
reset, the strapping pins operate as regular IO pins.

The parameters controlled by the given strapping pins at module reset are as follows:

• Chip boot mode – GPIO0 and GPIO46

• VDD_SPI voltage – GPIO45

• ROM messages printing – GPIO46

• JTAG signal source – GPIO3

GPIO0, GPIO45, and GPIO46 are connected to the chip’s internal weak pull-up/pull-down resistors at chip reset.
These resistors determine the default bit values of the strapping pins. Also, these resistors determine the bit
values if the strapping pins are connected to an external high-impedance circuit.

Table 3: Default Configuration of Strapping Pins

Strapping Pin Default Configuration Bit Value


GPIO0 Pull-up 1
GPIO3 Floating –
GPIO45 Pull-down 0
GPIO46 Pull-down 0

To change the bit values, the strapping pins should be connected to external pull-down/pull-up resistances. If the
ESP32-S3 is used as a device by a host MCU, the strapping pin voltage levels can also be controlled by the host
MCU.

All strapping pins have latches. At system reset, the latches sample the bit values of their respective strapping
pins and store them until the chip is powered down or shut down. The states of latches cannot be changed in
any other way. It makes the strapping pin values available during the entire chip operation, and the pins are freed
up to be used as regular IO pins after reset.

Regarding the timing requirements for the strapping pins, there are such parameters as setup time and hold time.
For more information, see Table 4 and Figure 3.

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3 Pin Definitions

Table 4: Description of Timing Parameters for the Strapping Pins

Parameter Description Min (ms)


Setup time is the time reserved for the power rails to stabilize before
tSU 0
the CHIP_PU pin is pulled high to activate the chip.
Hold time is the time reserved for the chip to read the strapping pin
tH values after CHIP_PU is already high and before these pins start 3
operating as regular IO pins.

tSU tH

VIL_nRST
CHIP_PU

VIH

Strapping pin

Figure 3: Visualization of Timing Parameters for the Strapping Pins

3.3.1 Chip Boot Mode Control


GPIO0 and GPIO46 control the boot mode after the reset is released. See Table 5 Chip Boot Mode
Control.

Table 5: Chip Boot Mode Control

Boot Mode GPIO0 GPIO46


Default Configuration 1 (Pull-up) 0 (Pull-down)
SPI Boot (default) 1 Any value
1
Joint Download Boot 0 0
1
Joint Download Boot mode supports the following
download methods:
• USB Download Boot:
– USB-Serial-JTAG Download Boot
– USB-OTG Download Boot
• UART Download Boot

In SPI Boot mode, the ROM bootloader loads and executes the program from SPI flash to boot the
system.

In Joint Download Boot mode, users can download binary files into flash using UART0 or USB interface. It is also
possible to download binary files into SRAM and execute it from SRAM.

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3 Pin Definitions

In addition to SPI Boot and Joint Download Boot modes, ESP32-S3 also supports SPI Download Boot mode.
For details, please see ESP32-S3 Technical Reference Manual > Chapter Chip Boot Control.

3.3.2 VDD_SPI Voltage Control


Depending on the value of EFUSE_VDD_SPI_FORCE, the voltage can be controlled in two ways.

Table 6: VDD_SPI Voltage Control

EFUSE_VDD_SPI_FORCE GPIO45 eFuse 1 Voltage VDD_SPI power source 2


0 3.3 V VDD3P3_RTC via RSP I
0 Ignored
1 1.8 V Flash Voltage Regulator
0 1.8 V Flash Voltage Regulator
1 Ignored
1 3.3 V VDD3P3_RTC via RSP I
1
eFuse: EFUSE_VDD_SPI_TIEH
2
See ESP32-S3 Series Datasheet > Section Power Scheme

3.3.3 ROM Messages Printing Control


During boot process the messages by the ROM code can be printed to:

• (Default) UART and USB Serial/JTAG controller.

• USB Serial/JTAG controller.

• UART.

The ROM messages printing to UART or USB Serial/JTAG controller can be respectively disabled by configuring
registers and eFuse. For detailed information, please refer to ESP32-S3 Technical Reference Manual > Chapter
Chip Boot Control.

3.3.4 JTAG Signal Source Control


The strapping pin GPIO3 can be used to control the source of JTAG signals during the early boot process. This
pin does not have any internal pull resistors and the strapping value must be controlled by the external circuit that
cannot be in a high impedance state.

As Table 7 shows, GPIO3 is used in combination with EFUSE_DIS_PAD_JTAG, EFUSE_DIS_USB_JTAG, and


EFUSE_STRAP_JTAG_SEL.

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Table 7: JTAG Signal Source Control

eFuse 1a eFuse 2b eFuse 3c GPIO3 JTAG Signal Source


0 Ignored USB Serial/JTAG Controller
0 0 0 JTAG pins MTDI, MTCK, MTMS, and MTDO
1
1 USB Serial/JTAG Controller
0 1 Ignored Ignored JTAG pins MTDI, MTCK, MTMS, and MTDO
1 0 Ignored Ignored USB Serial/JTAG Controller
1 1 Ignored Ignored JTAG is disabled
a
eFuse 1: EFUSE_DIS_PAD_JTAG
b
eFuse 2: EFUSE_DIS_USB_JTAG
c
eFuse 3: EFUSE_STRAP_JTAG_SEL

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4 Electrical Characteristics

4 Electrical Characteristics

4.1 Absolute Maximum Ratings


Stresses above those listed in Table 8 Absolute Maximum Ratings may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these or any other conditions beyond
those indicated under Table 9 Recommended Operating Conditions is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.

Table 8: Absolute Maximum Ratings

Symbol Parameter Min Max Unit


VDD33 Power supply voltage –0.3 3.6 V
TST ORE Storage temperature –40 105 °C

4.2 Recommended Operating Conditions

Table 9: Recommended Operating Conditions

Symbol Parameter Min Typ Max Unit


VDD33 Power supply voltage 3.0 3.3 3.6 V
IV DD Current delivered by external power supply 0.5 — — A
TA Operating ambient temperature –40 — 65 °C

4.3 DC Characteristics (3.3 V, 25 °C)

Table 10: DC Characteristics (3.3 V, 25 °C)

Symbol Parameter Min Typ Max Unit


CIN Pin capacitance — 2 — pF
1 1
VIH High-level input voltage 0.75 × VDD — VDD + 0.3 V
1
VIL Low-level input voltage –0.3 — 0.25 × VDD V
IIH High-level input current — — 50 nA
IIL Low-level input current — — 50 nA
2 1
VOH High-level output voltage 0.8 × VDD — — V
2 1
VOL Low-level output voltage — — 0.1 × VDD V
1
High-level source current (VDD = 3.3 V, VOH >=
IOH — 40 — mA
2.64 V, PAD_DRIVER = 3)
Low-level sink current (VDD1 = 3.3 V, VOL =
IOL — 28 — mA
0.495 V, PAD_DRIVER = 3)
RP U Internal weak pull-up resistor — 45 — kΩ
RP D Internal weak pull-down resistor — 45 — kΩ
Chip reset release voltage (EN voltage is within
VIH_nRST 0.75 × VDD1 — VDD1+ 0.3 V
the specified range)
Cont’d on next page

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4 Electrical Characteristics

Table 10 – cont’d from previous page


Symbol Parameter Min Typ Max Unit
Chip reset voltage (EN voltage is within the
VIL_nRST –0.3 — 0.25 × VDD1 V
specified range)
1
VDD is the I/O voltage for pins of a particular power domain.
2
VOH and VOL are measured using high-impedance load.

4.4 Current Consumption Characteristics


4.4.1 RF Current Consumption in Active Mode
With the use of advanced power-management technologies, the module can switch between different power
modes. For details on different power modes, please refer to Section Low Power Management
in ESP32-S3 Series Datasheet.

Table 11: Current Consumption Depending on RF Modes

Work mode Description Peak (mA)


802.11b, 1 Mbps, @20.5 dBm 355
802.11g, 54 Mbps, @18 dBm 297
TX
802.11n, HT20, MCS 7, @17.5 dBm 286
Active (RF working)
802.11n, HT40, MCS 7, @17 dBm 285
802.11b/g/n, HT20 95
RX
802.11n, HT40 97
1
The current consumption measurements are taken with a 3.3 V supply at 25 °C of ambient
temperature at the RF port. All transmitters’ measurements are based on a 100% duty cycle.
2
The current consumption figures for in RX mode are for cases when the peripherals are dis-
abled and the CPU idle.

Note:
The content below is excerpted from Section Power Consumption in Other Modes in ESP32-S3 Series Datasheet.

4.4.2 Current Consumption in Other Modes


Please note that if the chip embedded has in-package PSRAM, the current consumption of the module might be
higher compared to the measurements below.

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4 Electrical Characteristics

Table 12: Current Consumption in Modem-sleep Mode

Frequency Typ1 Typ2


Work mode (MHz) Description (mA) (mA)
WAITI (Dual core in idle state) 13.2 18.8
Single core running 32-bit data access instructions, the
16.2 21.8
other core in idle state
40 Dual core running 32-bit data access instructions 18.7 24.4
Single core running 128-bit data access instructions, the
19.9 25.4
other core in idle state
Dual core running 128-bit data access instructions 23.0 28.8
WAITI 22.0 36.1
Single core running 32-bit data access instructions, the
28.4 42.6
other core in idle state
80 Dual core running 32-bit data access instructions 33.1 47.3
Single core running 128-bit data access instructions, the
35.1 49.6
other core in idle state
Dual core running 128-bit data access instructions 41.8 56.3
Modem-sleep3
WAITI 27.6 42.3
Single core running 32-bit data access instructions, the
39.9 54.6
other core in idle state
160 Dual core running 32-bit data access instructions 49.6 64.1
Single core running 128-bit data access instructions, the
54.4 69.2
other core in idle state
Dual core running 128-bit data access instructions 66.7 81.1
WAITI 32.9 47.6
Single core running 32-bit data access instructions, the
51.2 65.9
other core in idle state
240 Dual core running 32-bit data access instructions 66.2 81.3
Single core running 128-bit data access instructions, the
72.4 87.9
other core in idle state
Dual core running 128-bit data access instructions 91.7 107.9
1
Current consumption when all peripheral clocks are disabled.
2
Current consumption when all peripheral clocks are enabled. In practice, the current consumption might be
different depending on which peripherals are enabled.
3
In Modem-sleep mode, Wi-Fi is clock gated, and the current consumption might be higher when accessing
flash. For a flash rated at 80 Mbit/s, in SPI 2-line mode the consumption is 10 mA.

Table 13: Current Consumption in Low-Power Modes

Work mode Description Typ (µA)


VDD_SPI and Wi-Fi are powered down, and all GPIOs
Light-sleep1 240
are high-impedance.
RTC memory and RTC peripherals are powered up. 8
Deep-sleep
RTC memory is powered up. RTC peripherals are
7
powered down.

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4 Electrical Characteristics

Power off CHIP_PU is set to low level. The chip is shut down. 1
1
In Light-sleep mode, all related SPI pins are pulled up. For chips embedded with
PSRAM, please add corresponding PSRAM consumption values, e.g., 140 µA
for 8 MB Octal PSRAM (3.3 V), 200 µA for 8 MB Octal PSRAM (1.8 V) and 40
µA for 2 MB Quad PSRAM (3.3 V).

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4.5 Wi-Fi RF Characteristics


4.5.1 Wi-Fi RF Standards

Table 14: Wi-Fi RF Standards

Name Description
1
Center frequency range of operating channel 2412 ~ 2484 MHz
Wi-Fi wireless standard IEEE 802.11b/g/n
11b: 1, 2, 5.5 and 11 Mbps
20 MHz 11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps
Data rate
11n: MCS0-7, 72.2 Mbps (Max)
40 MHz 11n: MCS0-7, 150 Mbps (Max)
Antenna type PCB antenna
1
Device should operate in the center frequency range allocated by regional regulatory authorities. Target
center frequency range is configurable by software.

4.5.2 Wi-Fi RF Transmitter (TX) Specifications


Target TX power is configurable based on device or certification requirements. The default characteristics are
provided in Table 15 TX Power with Spectral Mask and EVM Meeting 802.11 Standards.

Table 15: TX Power with Spectral Mask and EVM Meeting 802.11 Standards

Min Typ Max


Rate
(dBm) (dBm) (dBm)
802.11b, 1 Mbps — 20.5 —
802.11b, 11 Mbps — 20.5 —
802.11g, 6 Mbps — 20.0 —
802.11g, 54 Mbps — 18.0 —
802.11n, HT20, MCS 0 — 19.0 —
802.11n, HT20, MCS 7 — 17.5 —
802.11n, HT40, MCS 0 — 18.5 —
802.11n, HT40, MCS 7 — 17.0 —

Table 16: TX EVM Test

Min Typ SL1


Rate
(dB) (dB) (dB)
802.11b, 1 Mbps, @20.5 dBm — –24.5 –10
802.11b, 11 Mbps, @20.5 dBm — –24.5 –10
802.11g, 6 Mbps, @20 dBm — –23.0 –5
802.11g, 54 Mbps, @18 dBm — –29.5 –25
802.11n, HT20, MCS 0, @19 dBm — –24.0 –5
802.11n, HT20, MCS 7, @17.5 dBm — –30.5 –27
Cont’d on next page

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Table 16 – cont’d from previous page


Min Typ SL1
Rate
(dB) (dB) (dB)
802.11n, HT40, MCS 0, @18.5 dBm — –25.0 –5
802.11n, HT40, MCS 7, @17 dBm — –30.0 –27
1
SL stands for standard limit value.

4.5.3 Wi-Fi RF Receiver (RX) Specifications

Table 17: RX Sensitivity

Min Typ Max


Rate
(dBm) (dBm) (dBm)
802.11b, 1 Mbps — –98.2 —
802.11b, 2 Mbps — –95.6 —
802.11b, 5.5 Mbps — –92.8 —
802.11b, 11 Mbps — –88.5 —
802.11g, 6 Mbps — –93.0 —
802.11g, 9 Mbps — –92.0 —
802.11g, 12 Mbps — –90.8 —
802.11g, 18 Mbps — –88.5 —
802.11g, 24 Mbps — –85.5 —
802.11g, 36 Mbps — –82.2 —
802.11g, 48 Mbps — –78.0 —
802.11g, 54 Mbps — –76.2 —
802.11n, HT20, MCS 0 — –93.0 —
802.11n, HT20, MCS 1 — –90.6 —
802.11n, HT20, MCS 2 — –88.4 —
802.11n, HT20, MCS 3 — –84.8 —
802.11n, HT20, MCS 4 — –81.6 —
802.11n, HT20, MCS 5 — –77.4 —
802.11n, HT20, MCS 6 — –75.6 —
802.11n, HT20, MCS 7 — –74.2 —
802.11n, HT40, MCS 0 — –90.0 —
802.11n, HT40, MCS 1 — –87.5 —
802.11n, HT40, MCS 2 — –85.0 —
802.11n, HT40, MCS 3 — –82.0 —
802.11n, HT40, MCS 4 — –78.5 —
802.11n, HT40, MCS 5 — –74.4 —
802.11n, HT40, MCS 6 — –72.5 —
802.11n, HT40, MCS 7 — –71.2 —

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Table 18: Maximum RX Level

Min Typ Max


Rate
(dBm) (dBm) (dBm)
802.11b, 1 Mbps — 5 —
802.11b, 11 Mbps — 5 —
802.11g, 6 Mbps — 5 —
802.11g, 54 Mbps — 0 —
802.11n, HT20, MCS 0 — 5 —
802.11n, HT20, MCS 7 — 0 —
802.11n, HT40, MCS 0 — 5 —
802.11n, HT40, MCS 7 — 0 —

Table 19: RX Adjacent Channel Rejection

Min Typ Max


Rate
(dB) (dB) (dB)
802.11b, 1 Mbps — 35 —
802.11b, 11 Mbps — 35 —
802.11g, 6 Mbps — 31 —
802.11g, 54 Mbps — 14 —
802.11n, HT20, MCS 0 — 31 —
802.11n, HT20, MCS 7 — 13 —
802.11n, HT40, MCS 0 — 19 —
802.11n, HT40, MCS 7 — 8 —

4.6 Bluetooth LE Radio

Table 20: Bluetooth LE Frequency

Min Typ Max


Parameter (MHz) (MHz) (MHz)
Center frequency of operating channel 2402 — 2480

4.6.1 Bluetooth LE RF Transmitter (TX) Specifications

Table 21: Transmitter Characteristics - Bluetooth LE 1 Mbps

Parameter Description Min Typ Max Unit


RF power control range –24.00 0 20.00 dBm
RF transmit power
Gain control step — 3.00 — dB
Max |fn |n=0, 1, 2, ..k — 2.50 — kHz
Max |f0 − fn | — 2.00 — kHz
Carrier frequency offset and drift
Max |fn − fn−5 | — 1.40 — kHz
Cont’d on next page

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Table 21 – cont’d from previous page


Parameter Description Min Typ Max Unit
|f1 − f0 | — 1.00 — kHz
∆ f 1avg — 249.00 — kHz
Min ∆ f 2max (for at least
Modulation characteristics — 198.00 — kHz
99.9% of all ∆ f 2max )
∆ f 2avg /∆ f 1avg — 0.86 — —
±2 MHz offset — –37.00 — dBm
In-band spurious emissions ±3 MHz offset — –42.00 — dBm
>±3 MHz offset — –44.00 — dBm

Table 22: Transmitter Characteristics - Bluetooth LE 2 Mbps

Parameter Description Min Typ Max Unit


RF power control range –24.00 0 20.00 dBm
RF transmit power
Gain control step — 3.00 — dB
Max |fn |n=0, 1, 2, ..k — 2.50 — kHz
Max |f0 − fn | — 2.00 — kHz
Carrier frequency offset and drift
Max |fn − fn−5 | — 1.40 — kHz
|f1 − f0 | — 1.00 — kHz
∆ f 1avg — 499.00 — kHz
Min ∆ f 2max (for at least
Modulation characteristics — 416.00 — kHz
99.9% of all ∆ f 2max )
∆ f 2avg /∆ f 1avg — 0.89 — —
±4 MHz offset — –42.00 — dBm
In-band spurious emissions ±5 MHz offset — –44.00 — dBm
>±5 MHz offset — –47.00 — dBm

Table 23: Transmitter Characteristics - Bluetooth LE 125 Kbps

Parameter Description Min Typ Max Unit


RF power control range –24.00 0 20.00 dBm
RF transmit power
Gain control step — 3.00 — dB
Max |fn |n=0, 1, 2, ..k — 0.80 — kHz
Max |f0 − fn | — 1.00 — kHz
Carrier frequency offset and drift
|fn − fn−3 | — 0.30 — kHz
|f0 − f3 | — 1.00 — kHz
∆ f 1avg — 248.00 — kHz
Modulation characteristics Min ∆ f 1max (for at least
— 222.00 — kHz
99.9% of all∆ f 1max )
±2 MHz offset — –37.00 — dBm
In-band spurious emissions ±3 MHz offset — –42.00 — dBm
>±3 MHz offset — –44.00 — dBm

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Table 24: Transmitter Characteristics - Bluetooth LE 500 Kbps

Parameter Description Min Typ Max Unit


RF power control range –24.00 0 20.00 dBm
RF transmit power
Gain control step — 3.00 — dB
Max |fn |n=0, 1, 2, ..k — 0.80 — kHz
Max |f0 − fn | — 1.00 — kHz
Carrier frequency offset and drift
|fn − fn−3 | — 0.85 — kHz
|f0 − f3 | — 0.34 — kHz
∆ f 2avg — 213.00 — kHz
Modulation characteristics Min ∆ f 2max (for at least
— 196.00 — kHz
99.9% of all ∆ f 2max )
±2 MHz offset — –37.00 — dBm
In-band spurious emissions ±3 MHz offset — –42.00 — dBm
>±3 MHz offset — –44.00 — dBm

4.6.2 Bluetooth LE RF Receiver (RX) Specifications

Table 25: Receiver Characteristics - Bluetooth LE 1 Mbps

Parameter Description Min Typ Max Unit


Sensitivity @30.8% PER — — –96.5 — dBm
Maximum received signal @30.8% PER — — 8 — dBm
Co-channel C/I F = F0 MHz — 9 — dB
F = F0 + 1 MHz — –3 — dB
F = F0 – 1 MHz — –3 — dB
F = F0 + 2 MHz — –28 — dB
F = F0 – 2 MHz — –30 — dB
Adjacent channel selectivity C/I
F = F0 + 3 MHz — –31 — dB
F = F0 – 3 MHz — –33 — dB
F > F0 + 3 MHz — –32 — dB
F > F0 – 3 MHz — –36 — dB
Image frequency — — –32 — dB
F = Fimage + 1 MHz — –39 — dB
Adjacent channel to image frequency
F = Fimage – 1 MHz — –31 — dB
30 MHz ~ 2000 MHz — –9 — dBm
2003 MHz ~ 2399 MHz — –18 — dBm
Out-of-band blocking performance
2484 MHz ~ 2997 MHz — –15 — dBm
3000 MHz ~ 12.75 GHz — –5 — dBm
Intermodulation — — –29 — dBm

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Table 26: Receiver Characteristics - Bluetooth LE 2 Mbps

Parameter Description Min Typ Max Unit


Sensitivity @30.8% PER — — –92.5 — dBm
Maximum received signal @30.8% PER — — 3 — dBm
Co-channel C/I F = F0 MHz — 10 — dB
F = F0 + 2 MHz — –8 — dB
F = F0 – 2 MHz — –5 — dB
F = F0 + 4 MHz — –31 — dB
F = F0 – 4 MHz — –33 — dB
Adjacent channel selectivity C/I
F = F0 + 6 MHz — –37 — dB
F = F0 – 6 MHz — –37 — dB
F > F0 + 6 MHz — –40 — dB
F > F0 – 6 MHz — –40 — dB
Image frequency — — –31 — dB
F = Fimage + 2 MHz — –37 — dB
Adjacent channel to image frequency
F = Fimage – 2 MHz — –8 — dB
30 MHz ~ 2000 MHz — –15 — dBm
2003 MHz ~ 2399 MHz — –19 — dBm
Out-of-band blocking performance
2484 MHz ~ 2997 MHz — –15 — dBm
3000 MHz ~ 12.75 GHz — –6 — dBm
Intermodulation — — –29 — dBm

Table 27: Receiver Characteristics - Bluetooth LE 125 Kbps

Parameter Description Min Typ Max Unit


Sensitivity @30.8% PER — — –103.5 — dBm
Maximum received signal @30.8% PER — — 8 — dBm
Co-channel C/I F = F0 MHz — 6 — dB
F = F0 + 1 MHz — –6 — dB
F = F0 – 1 MHz — –5 — dB
F = F0 + 2 MHz — –32 — dB
F = F0 – 2 MHz — –39 — dB
Adjacent channel selectivity C/I
F = F0 + 3 MHz — –35 — dB
F = F0 – 3 MHz — –45 — dB
F > F0 + 3 MHz — –35 — dB
F > F0 – 3 MHz — –48 — dB
Image frequency — — –35 — dB
F = Fimage + 1 MHz — –49 — dB
Adjacent channel to image frequency
F = Fimage – 1 MHz — –32 — dB

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Table 28: Receiver Characteristics - Bluetooth LE 500 Kbps

Parameter Description Min Typ Max Unit


Sensitivity @30.8% PER — — –100 — dBm
Maximum received signal @30.8% PER — — 8 — dBm
Co-channel C/I F = F0 MHz — 4 — dB
F = F0 + 1 MHz — –5 — dB
F = F0 – 1 MHz — –5 — dB
F = F0 + 2 MHz — –28 — dB
F = F0 – 2 MHz — –36 — dB
Adjacent channel selectivity C/I
F = F0 + 3 MHz — –36 — dB
F = F0 – 3 MHz — –38 — dB
F > F0 + 3 MHz — –37 — dB
F > F0 – 3 MHz — –41 — dB
Image frequency — — –37 — dB
F = Fimage + 1 MHz — –44 — dB
Adjacent channel to image frequency
F = Fimage – 1 MHz — –28 — dB

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Espressif Systems

5 Module Schematics
5 Module Schematics
This is the reference design of the module.
5 4 3 2 1

GND

GND GND
Y1

3
GND

GND XOUT
The values of C1 and C4 vary with C1 C4
D D
the selection of the crystal. TBD TBD VDD33 VDD33 VDD33 GND GND

XIN
U3 ESP32-S3-WROOM-2
The value of R4 varies with the 41
EPAD

2
actual PCB board. R4 could be a 1
GND GND
40
R1 2 39 GPIO1
resistor or inductor, the initial D1 CHIP_PU 3 3V3 IO1 38 GPIO2
value is suggested to be 24 nH. GND 10K(NC) ESD GPIO4 4 EN IO2 37 U0TXD
VDD33 40MHz(±10ppm) GPIO5 5 IO4 TXD0 36 U0RXD
GPIO46 GPIO6 6 IO5 RXD0 35 GPIO42
GPIO45 GPIO7 7 IO6 IO42 34 GPIO41
U0RXD GPIO15 8 IO7 IO41 33 GPIO40
C3 C2 R3 499 U0TXD GND GPIO16 9 IO15 IO40 32 GPIO39
GPIO42 GPIO17 10 IO16 IO39 31 GPIO38
1uF 10nF GPIO41 GPIO18 11 IO17 IO38 30

0
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GPIO40 GPIO8 12 IO18 NC 29


VDD33 GPIO39 GPIO19 13 IO8 NC 28
GND GND GND GPIO38 GPIO20 14 IO19 NC 27 GPIO0
L1 2.0nH(0.1nH) IO20 IO0

R4

IO46

IO10
IO11
IO12
IO13
IO14
IO21
IO47
IO48
IO45
C6 C7 C8 C9 C10

IO3

IO9
C C
VDD33

57

56
55
54
53
52
51
50
49
48
47
46
45
44
43
10uF 1uF 0.1uF 0.1uF 0.1uF

15
16
17
18
19
20
21
22
23
24
25
26
VDDA
VDDA
GND

U0RXD
U0TXD
MTMS

MTDO
MTCK
XTAL_P
XTAL_N
GPIO46
GPIO45

MTDI
VDD3P3_CPU

GPIO38
GND GND GND GND GND
28

GPIO46

GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO21
GPIO47
GPIO48
GPIO45
GPIO3

GPIO9
ANT1 50 ohm Impedance Control
1 RF_ANT L2 TBD LNA_IN 1 42 R5 0 SPI_DQS
2 2 LNA_IN GPIO37 41 R6 0 SPI_IO7
VDD3P3 GPIO36 SPI_IO6
L3 C11 C12
CHIP_PU
3
VDD3P3 GPIO35
40 R7 0
SPI_IO5
ESP32-S3-WROOM-2(pin-out)
PCB_ANT 4 39 R8 0
TBD TBD TBD GPIO0 5 CHIP_PU GPIO34 38 R9 0 SPI_IO4
GPIO1 6 GPIO0 GPIO33 37 GPIO47 VDD_SPI
GPIO2 7 GPIO1 SPICLK_P 36 GPIO48
GND GND GND GPIO3 8 GPIO2 SPICLK_N 35 R16 0 SPI_D
C16
GPIO4 9 GPIO3 SPID 34 R15 0 SPI_Q R11
GPIO5 10 GPIO4 SPIQ 33 R10 0 SPI_CLK
TBD
GPIO6 11 GPIO5 SPICLK 32 SPI_CS0 10K VDD_SPI
GPIO7 12 GPIO6 SPICS0 31 R14 0 SPI_WP
GND GPIO8 13 GPIO7 SPIWP 30 R13 0 SPI_HD A4 B4
B B
GPIO9 14 GPIO8 SPIHD 29 A5 RESET# VCC D1
GPIO9 VDD_SPI ECS# VCC
VDD3P3_RTC

SPI_DQS
The values of L3, C16, C11, L2 and C12 C3 E4
XTAL_32K_N
XTAL_32K_P

SPI_CS0 C2 DQS VCC


vary with the actual PCB board. C13 C14 VDD_SPI SPI_CLK B2 CS# A2 R12
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14

GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
SPICS1
SPI_D D3 SCLK NC1 A3
SPI_Q SI(IO0) NC2 10K
NC: No component. 0.1uF 1uF D2 B1
ESP32-S3-WROOM-2 Datasheet v1.2

SPI_WP C4 SO(IO1) NC3 B5


U1 ESP32-S3R8V SPI_HD D4 IO2 NC4 C5
VDD33 IO3 WP#
15
16
17
18
19
20
21
22
23
24
25
26
27
28

GND GND SPI_IO4 D5


SPI_IO5 E3 IO4 B3
SPI_IO6 E2 IO5 VSS C1
SPI_IO7 E1 IO6 VSS E5
C15 IO7 VSS
U2 FLASH_1V8
0.1uF GND
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14

GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

GND

A A

Figure 4: ESP32-S3-WROOM-2 Schematics


Title
<ESP32-S3-WROOM-2>

Size Page Name Rev


A4 <02_ESP32-S3-WROOM-2> Confidential and Proprietary
V1.3
Note that for ESP32_S3R8V, VDD_SPI has been set to 1.8 V by eFuse VDD_SPI_TIEH and VDD_SPI_FORCE. Date: Wednesday, November 22, 2023 Sheet 2 of 2
5 4 3 2 1
6 Peripheral Schematics

6 Peripheral Schematics
This is the typical application circuit of the module connected with peripheral components (for example, power
supply, antenna, reset button, JTAG interface, and UART interface).

VDD33 GND GND VDD33


JP1
ESP32-S3-WROOM-2 1
41 2 1
C1 C3 R1 TBD 1 EPAD 40 3 2
2 GND GND 39 IO1 4 3
22uF 0.1uF C2 TBD EN 3 3V3 IO1 38 IO2 4
GND EN IO2
IO4 4 37 TXD0 UART
GND GND IO5 5 IO4 TXD0 36 RXD0 GND JP2
C4 12pF(NC) IO6 6 IO5 RXD0 35 IO42 TMS 1
GND X1: ESR = Max. 70 K IO6 IO42 1
IO7 7 34 IO41 TDI 2
R2

IO7 IO41 2
1

X1 R3 0(NC) IO15 8 33 IO40 TDO 3


R5 0(NC) IO16 9 IO15 IO40 32 IO39 TCK 4 3
32.768KHz(NC) IO16 IO39 4
IO17 10 31 IO38
IO17 IO38
NC

GND
2

IO18 11 30 JTAG
GND IO18 NC
C7 12pF(NC) IO8 12 29 JP4
IO19 13 IO8 NC 28 2
IO20 14 IO19 NC 27 IO0 1 2
JP3 IO20 IO0 1
1 USB_D- R6 0 Boot Option
1
IO46

IO10
IO11
IO12
IO13
IO14
IO21
IO47
IO48
IO45
2 USB_D+ R4 0 IO3

IO9
2 SW1
USB OTG C6 C5 NC: No component. U1 R7 0 EN
15
16
17
18
19
20
21
22
23
24
25
26
TBD TBD C8 0.1uF
IO46

IO10
IO11
IO12
IO13
IO14
IO21
IO47
IO48
IO45
IO3

IO9

GNDGND GND

IO47/IO48 operates in the 1.8V voltage domain.

Figure 5: Peripheral Schematics

• Soldering the EPAD to the ground of the base board is not a must, however, it can optimize thermal
performance. If you choose to solder it, please apply the correct amount of soldering paste. Too much
soldering paste may increase the gap between the module and the baseboard. As result, the adhesion
between other pins and the baseboard may be poor.

• To ensure that the power supply to the ESP32-S3 chip is stable during power-up, it is advised to add an
RC delay circuit at the EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩ and
C = 1 µF. However, specific parameters should be adjusted based on the power-up timing of the module
and the power-up and reset sequence timing of the chip. For ESP32-S3’s power-up and reset sequence
timing diagram, please refer to ESP32-S3 Series Datasheet > Section Power Supply.

5 4 3 2

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7 Physical Dimensions and PCB Land Pattern

7 Physical Dimensions and PCB Land Pattern

7.1 Physical Dimensions

Unit: mm

18±0.2 3.1±0.15
0.8
6

1
Ø0
.5 0.5
25.5±0.2

40 x 0.9

40 x Ø0.55

4
16.51

1
17.6
1.27

40 x 0.9

12.66
7.64
1.05

15.8
1.5

13.97 1.27 2.015


40 x 0.45 1 40 x 0.85

Top View Side View Bottom View

Figure 6: ESP32-S3-WROOM-2 Physical Dimensions

Note:
For information about tape, reel, and product marking, please refer to Espressif Module Packaging Information.
ESP32-S3-WROOM-2U Dimensions

Unit: mm

18±0.2 3.2±0.15
2.49 0.8
Ø0.5
1
11.5 0.5
40 x 0.9

2.46

40 x Ø0.55
4
19.2±0.2

1
1.27

15.8 4
16.51

40 x 0.9

12.66
13.2
17.6

7.64
1.05
1.5

13.97 1.27 2.015


40 x 0.45 1 40 x 0.85

Top View Side View Bottom View

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7 Physical Dimensions and PCB Land Pattern

7.2 Recommended PCB Land Pattern


This section provides the following resources for your reference:

• Figure for recommended PCB land pattern with all the dimensions needed for PCB design. See Figure 7
ESP32-S3-WROOM-2 Recommended PCB Land Pattern.

• Source file of recommended PCB land pattern to measure dimensions not covered in Figure 7. You can
view the source files for ESP32-S3-WROOM-2 with Autodesk Viewer.

Unit: mm
Via for thermal pad
Copper

18

7.49
Antenna Area

6
40 x1.5

1 1 40
0.5
40 x0.9

25.5
4
16.51

4
1.27
12.66

7.64
1.5
0.5

15 26

0.5 1.27
2.015 2.015
17.5

Figure 7: ESP32-S3-WROOM-2 Recommended PCB Land Pattern

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8 Product Handling

8 Product Handling

8.1 Storage Conditions


The products sealed in moisture barrier bags (MBB) should be stored in a non-condensing atmospheric
environment of < 40 °C and 90%RH. The module is rated at the moisture sensitivity level (MSL) of 3.

After unpacking, the module must be soldered within 168 hours with the factory conditions 25±5 °C and
60%RH. If the above conditions are not met, the module needs to be baked.

8.2 Electrostatic Discharge (ESD)


• Human body model (HBM): ±2000 V
• Charged-device model (CDM): ±500 V

8.3 Soldering Profile


8.3.1 Reflow Profile
Solder the module in a single reflow.
Temperature (℃)

Peak Temp.
235 ~ 250 ℃
250
Preheating zone Reflow zone Cooling zone
150 ~ 200 ℃ 60 ~ 120 s 217 ℃ 60 ~ 90 s –1 ~ –5 ℃/s
217
200
Soldering time
> 30 s

Ramp-up zone
1 ~ 3 ℃/s
100

50

25
Time (sec.)
0
0 50 100 150 200 250

Ramp-up zone — Temp.: 25 ~ 150 ℃ Time: 60 ~ 90 s Ramp-up rate: 1 ~ 3 ℃/s


Preheating zone — Temp.: 150 ~ 200 ℃ Time: 60 ~ 120 s
Reflow zone — Temp.: >217 ℃ 60 ~ 90 s; Peak Temp.: 235 ~ 250 ℃ Time: 30 ~ 70 s
Cooling zone — Peak Temp. ~ 180 ℃ Ramp-down rate: –1 ~ –5 ℃/s
Solder — Sn-Ag-Cu (SAC305) lead-free solder alloy

Figure 8: Reflow Profile

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8 Product Handling

8.4 Ultrasonic Vibration


Avoid exposing Espressif modules to vibration from ultrasonic equipment, such as ultrasonic welders or
ultrasonic cleaners. This vibration may induce resonance in the in-module crystal and lead to its malfunction or
even failure. As a consequence, the module may stop working or its performance may deteriorate.

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9 Related Documentation and Resources

9 Related Documentation and Resources


Related Documentation
• ESP32-S3 Series Datasheet – Specifications of the ESP32-S3 hardware.
• ESP32-S3 Technical Reference Manual – Detailed information on how to use the ESP32-S3 memory and peripherals.
• ESP32-S3 Hardware Design Guidelines – Guidelines on how to integrate the ESP32-S3 into your hardware product.
• ESP32-S3 Series SoC Errata – Descriptions of known errors in ESP32-S3 series of SoCs.
• Certificates
https://espressif.com/en/support/documents/certificates
• ESP32-S3 Product/Process Change Notifications (PCN)
https://espressif.com/en/support/documents/pcns?keys=ESP32-S3
• ESP32-S3 Advisories – Information on security, bugs, compatibility, component reliability.
https://espressif.com/en/support/documents/advisories?keys=ESP32-S3
• Documentation Updates and Update Notification Subscription
https://espressif.com/en/support/download/documents

Developer Zone
• ESP-IDF Programming Guide for ESP32-S3 – Extensive documentation for the ESP-IDF development framework.
• ESP-IDF and other development frameworks on GitHub.
https://github.com/espressif
• ESP32 BBS Forum – Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions,
share knowledge, explore ideas, and help solve problems with fellow engineers.
https://esp32.com/
• The ESP Journal – Best Practices, Articles, and Notes from Espressif folks.
https://blog.espressif.com/
• See the tabs SDKs and Demos, Apps, Tools, AT Firmware.
https://espressif.com/en/support/download/sdks-demos

Products
• ESP32-S3 Series SoCs – Browse through all ESP32-S3 SoCs.
https://espressif.com/en/products/socs?id=ESP32-S3
• ESP32-S3 Series Modules – Browse through all ESP32-S3-based modules.
https://espressif.com/en/products/modules?id=ESP32-S3
• ESP32-S3 Series DevKits – Browse through all ESP32-S3-based devkits.
https://espressif.com/en/products/devkits?id=ESP32-S3
• ESP Product Selector – Find an Espressif hardware product suitable for your needs by comparing or applying filters.
https://products.espressif.com/#/product-selector?language=en

Contact Us
• See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples
(Online stores), Become Our Supplier, Comments & Suggestions.
https://espressif.com/en/contact-us/sales-questions

Espressif Systems 34 ESP32-S3-WROOM-2 Datasheet v1.2


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Revision History

Revision History

Date Version Release notes

• Added the first two table notes in Table 1 ESP32-S3-WROOM-2 Series


Comparison
• Updated Section 3.3.1 Chip Boot Mode Control
• Fixed the center frequency range of operating channel in Table 14 Wi-Fi RF
2023-11-24 v1.2
Standards
• Updated the module schematics in Section 5 Module Schematics
• Updated the physical dimensions figure in Section 7.1 Physical Dimensions
• Other minor updates

• Update Section 3.3 Strapping Pins


• Update Section 4.4 Current Consumption Characteristics
• Update the Bluetooth maximum transmit power from 21 dBm to 20 dBm
2023-03-07 v1.1 • Update descriptions in Section 6 Peripheral Schematics
• Add descriptions in Section 7.2 Recommended PCB Land Pattern
• Update Section 9 Related Documentation and Resources
• Other minor changes

• Add certification and test information


• Update Table 1 and Table 13 and add note
2022-11-01 v1.0 • Update note in Table 2
• Update BLE RF power control range in Table 21
• Other minor updates

2022-05-09 v0.7 Update pin definitions table


2021-12-31 v0.6 Overall update for chip revision 1
2021-07-13 v0.1 Preliminary release, for chip revision 0

Espressif Systems 35 ESP32-S3-WROOM-2 Datasheet v1.2


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Copyright © 2023 Espressif Systems (Shanghai) Co., Ltd. All rights reserved.

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