CE222 - Digital Integrated Circuit Design

Nguyen Tran Son

ntsonvldt@gmail.com

Feb 13, 2023

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 1 / 38

SPICE Introduction

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 2 / 38

 Outline

1 Introduction to SPICE

2 Writing SPICE Decks

3 Analysis Supported by SPICE

4 Basic Components

5 Measurement

6 Example

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 3 / 38

Prefixes Used for Large or Small Physical Quantities

Table: Prefixes Used for Large or Small Physical Quantities

Prefix Abbreviation Scale Factor

giga- G 109
meg- or mega- M 106
kilo- k 103
milli- m 10−3
micro- µ 10−6
nano- n 10−9
pico- p 10−12
femto- f 10−15

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 4 / 38

 Introduction to SPICE

SPICE: Simulation Program with Integrated Circuit

Emphasis is a tool for simulating electronic circuits. It
was developed in the 1970s at the University of
California, Berkeley.
SPICE tool: HSPICE, Finesim, Customsim (xa),
Spectre, GigaSPICE, Eldo, SmartSpice ...
Free Spice tool: LTSPICE, NGSpice, QUCS, Xyce,...
In SPICE, circuit elements are called cards and the
complete circuit description is called a SPICE deck.
The file contains a netlist consisting of components
and nodes, simulation options, analysis options, and
device models.

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 5 / 38

Writing Spice Decks

Writing a SPICE deck is like writing a good program

Plan: sketch schematic on paper or in editor
Modify existing decks whenever possible
Code: strive for clarity
Start with name, email, date, purpose
Generously comment
Test:
Predict what results should be
Compare with actual
Garbage In, Garbage Out!

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 6 / 38

 GENERAL ANATOMY OF A SPICE DECK

SPICE input file, called source file, consists of three parts:

Data Statements: describe the components and the

interconnections.
Control Statements: tell SPICE what type of
analysis to perform on the circuit.
Output Statements: specify what outputs are to be
printed or plotted.
TITLE STATEMENT
ELEMENT STATEMENTS
.
COMMAND ( CONTROL ) STATEMENTS
OUTPUT STATEMENTS
. END <CR >

<CR>: carriage return

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 7 / 38

SPICE Elements
Letter Element
R Resistor
C Capacitor
L Inductor
K Mutual Inductor
V Independent voltage source
I Independent current source
M MOSFET
D Diode
Q Bipolar transistor
W Lossy transmission line
X Subcircuit
E Voltage-controlled voltage source
G Voltage-controlled current source
H Current-controlled voltage source
F Current-controlled current source
Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 8 / 38
SPICE Units

Letter Unit Magnitude

a atto 10−18
f femto 10−15
p pico 10−12
n nano 10−9
µ micro 10−6
m milli 10−3
k kilo 103
M mega 106
G giga 109

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 9 / 38

Circuit Simulation: User’s Perspective

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 10 / 38

 Simulators at Different Levels

Simulators at different levels of abstraction:

Process
Circuit
Logic
Process Simulator: Time and temperature effect on
physical and electrical characteristics.
Circuit Simulator: Use device model and netlist to
predict current, voltage, and performance.
Logic Simulator: Functional prediction of digital
circuits for logical correctness.

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 11 / 38

Device Models

SPICE uses a wide variety of transistor models with

different trade-offs between complexity and accuracy.
Some of the different models include:
Level 1 (simple)
Level 2 (simple)
Level 3 (simple)
BSIM 1 (Berkeley Short-Channel
Insulated-Gate-FET Model)
BSIM 2 (very elaborate)
BSIM 3 (very elaborate)
BSIM 4 (current, most elaborate)
EKV model

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 12 / 38

 Analysis Supported by SPICE

Types of Analysis:
DC Analysis
AC Small-Signal Analysis
Transient Analysis
Pole-Zero Analysis
Small-Signal Distortion Analysis
Sensitivity Analysis
Noise Analysis

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 13 / 38

DC Analysis
The DC analysis portion of SPICE determines the
DC operating point of the circuit with inductors
shorted and capacitors opened.
The DC analysis options are specified on the .DC,
.TF, and .OP control lines.
A DC analysis is automatically performed prior to a
transient analysis to determine the transient initial
conditions, and prior to an AC small-signal analysis
to determine the linearized, small-signal models for
nonlinear devices.
General form:
.DC SRCNAM VSTART VSTOP VINCR [SRC2 START2 STOP2
INCR2]

Example:
. DC VIN 0.25 5.0 0.25
. DC VDS 0 10 .5 VGS 0 5 1
. DC VCE 0 10 .25 IB 0 10 U 1 U
Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 14 / 38
 DC Analysis: Example
NGSpice code:
* Sim INVERTER CIRCUIT
* 23/09/2022
. lib ’E :\ Software \ Spice \
Lecture_Spice \ model \ CE222 . lib ’
TT
. option TEMP =25 C
. param pvdd11 = 1.1
* CMOS inverter
vvdd vdd 0 dc ’ pvdd11 ’
mp vdd in out vdd pmos l =70 n w =2.4 u
mn out in 0 0 nmos l =70 n w =1 u
cload out 0 200 f
vin in 0 dc 1 pwl (0 0 10 ns 0 10.1 ns
’ pvdd11 ’ , 15 ns ’ pvdd11 ’ 15.1 n
0)
. control
set color0 = white ; background , a
nice color of off - white
set color1 = black ; text and grid
almost black
set color2 = blue ; vector0
set color3 = red ; vector1
set color4 = rgb :0/0/ f ; vector2
set xgridwidth =1
set xbrushwidth =2
run
dc vin 0 1 0.005
plot v ( in ) v ( out )
. endc
. end
Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 15 / 38

AC Small-Signal Analysis

The ac small-signal portion of SPICE computes the

ac output variables as a function of frequency.
The program first computes the dc operating point of
the circuit and determines linearized, small-signal
models for all of the nonlinear devices in the circuit.
The resultant linear circuit is then analyzed over a
user-specified range of frequencies.

General form:
.AC DEC ND FSTART FSTOP
.AC OCT NO FSTART FSTOP
.AC LIN NP FSTART FSTOP

Example:
. AC DEC 10 1 10 K
. AC DEC 10 1 K 100 MEG
. AC LIN 100 1 100 HZ

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 16 / 38

 Transient Analysis

The transient analysis portion of SPICE computes

the transient output variables as a function of time
over a user-specified time interval.
The initial conditions are automatically determined
by a dc analysis.
All sources which are not time dependent (for
example, power supplies) are set to their dc value.
The transient time interval is specified on a .TRAN
control line.

General form:
.TRAN TSTEP TSTOP <TSTART <TMAX» <UIC>

Example:
. TRAN 1 NS 100 NS
. TRAN 1 NS 1000 NS 500 NS
. TRAN 10 NS 1 US UIC

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 17 / 38

Transient Analysis: Example

NGSpice code:
* Sim INVERTER CIRCUIT
* 23/09/2022
. lib ’E :\ Software \ Spice \
Lecture_Spice \ model \ CE222 . lib ’
TT
. option TEMP =25 C
. param pvdd11 = 1.0
* CMOS inverter
vvdd vdd 0 dc ’ pvdd11 ’
mp vdd in out vdd pmos l =70 n w =2.4 u
mn out in 0 0 nmos l =70 n w =1 u
cload out 0 300 f
vin in 0 dc 1 pwl (0 0 100 ns 0 100.1
ns 1v , 150 ns 1 v 150.1 n 0)
. control
set color0 = white ; background , a
nice color of off - white
set color1 = black ; text and grid
almost black
set color2 = blue ; vector0
set color3 = red ; vector1
set color4 = rgb :0/0/ f ; vector2
set xgridwidth =1
set xbrushwidth =2
run
tran 0.01 ns 200 ns
plot v ( in ) v ( out )
. endc
. end

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 18 / 38

 Resistors, Inductors & Capacitors
Rname N+ N- Value
N + represents the positive terminal, N − represents
the negative terminal.
Value is the resistance value.
The ultimate in simplicity.

Cname N+ N- Value <IC=Initial Condition>

IC is the initial condition (DC voltage for
capacitors). It is optional
The symbol < > means that the field is optional. If
not specified, it is assumed to be zero.

Lname N+ N- Value <IC=Initial Condition>

IC is the initial condition (DC current for inductors).
It is optional
The current
Nguyen Tran Son flows
(∞) from N+SPICE
to N-.
Introduction Feb 13, 2023 19 / 38

Voltage & Current Sources

Independent DC Sources:
Voltage source: Vname N+ N- <DC=> DCValue
Current source: Iname N+ N- <DC=> DCValue
N+ is the positive terminal
N– is the negative terminal
DC Value gives the value of the source
The name of a voltage and current source must start
with V and I, respectively

Independent AC Sources:
Voltage source: Vname N+ N- AC ACValue, Phase
Current source: Iname N+ N- AC ACValue, Phase
ACValue gives the value of the source
ACPhase gives the phase in degrees
Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 20 / 38
 Transient Sources
Sinusoidal
Vname N+ N- SIN(VO VA fo <TD> <a>
<PHASE>)
Vname = VO + VA exp[-a.(t - TD)] sin[2pi.f (t -
TD) + (PHASE/360)]
VO - offset voltage in volts.
VA - amplitude in volts.
fo -the frequency in hertz.
TD - delay in seconds
a - damping factor per second
Phase - phase in degrees (If TD, a and PHASE are
not specified, it is assumed to be zero.)
A cosine can be generated by shifting a sin by 90
degrees
Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 21 / 38

Transient Sources
Sinusoidal
Vname N+ N- SIN(VO VA fo <TD> <a>
<PHASE>)
Vname = VO + VA exp[-a.(t - TD)] sin[2pi.f (t -
TD) + (PHASE/360)]

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 22 / 38

 Transient Sources
Piece-Wise Linear
Vname N+ N- PWL(T1 V1 T2 V2 T3 V3 ...
Tn Vn)
(Ti Vi) specifies the value Vi of the source at time Ti

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 23 / 38

Transient Sources

Pulse
Vname N+ N- PULSE(Vo V1 Td Tr Tf Tw To)

Vo - initial voltage
V1 - peak voltage
Td - initial delay time
Tr - rise time
Tf - fall time
Tw - pulse-width
To - period of wave

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 24 / 38

 Dependent Sources
Dependent Sources:
Voltage controlled voltage source: Ename N+ N- NC1
NC2 Value
Voltage controlled current source: Gname N+ N- NC1
NC2 Value
Current controlled voltage source: Hname N+ N-
Vcontrol Value
Current controlled current source: Fname N+ N-
Vcontrol Value
N+ and N- are the positive and negative terminals of
the dependent source, respectively.
NC1 and NC2 are the positive and negative terminals
of the controlling voltage source, respectively.
Vcontrol is the zero value voltage source used to
measure the controlling current (the positive current
flows into the positive terminal of the controlling
voltage source!).
Value is a multiplier value.SPICE
Nguyen Tran Son (∞)
In math terms:
Introduction Feb 13, 2023 25 / 38
Value*(NC1-NC2)=(N+ – N–)

Semiconductor Devices
Diode: Dname N+ N- MODName
Model statement: (Appears in your deck to describe
circuit element)
.MODEL MODName D (IS= N= Rs= CJO= Tt= BV=
IBV=)
.model D1N4148 D (IS=0.1PA, RS=16 CJO=2PF
TT=12N BV=100 IBV=0.1PA)
The element name starts with D to indicate that the element is
a diode,
N+ is the positive end and N- is the negative end (where the
arrow points)
MODName is the name of the model of the diode specified in
the model line.
IS - saturation current, (default=1E-14A),
N - the emission coefficient, (=1),
RS - the series resistance, (=0 ohm),
CJO - junction capacitance, (=0F),
TT - transit time, (=0sec),
BV - reverse
Nguyen bias
Tran Son (∞)breakdown voltage, (=infinite) and
SPICE Introduction Feb 13, 2023 26 / 38
 Semiconductor Devices

Bipolar Transistor: Qname C B E BJT_modelName

Model statement:
.MODEL BJT_modName NPN (BF=val IS=val
VAF=val)
.MODEL BJT_modName PNP (BF=val IS=val
VAF=val)
. model Q2N2222A NPN ( IS =14.34 F XTI =3 EG =1.11 VAF = 74.03 BF =255.9
NE =1.307 ISE =14.34 F IKF =.2847 XTB =1.5 BR =6.092 NC =2 ISC =0 IKR =0 RC =1
CJC =7.306 P MJC =.3416 VJC =.75 FC =.5 CJE =22.01 P MJE =.377 VJE =.75
TR =46.91 N TF =411.1 P ITF =.6 VTF =1.7 XTF =3 RB =10)

BF is the common emitter current gain ß,

IS is the saturation current
VAF is the Early voltage.
If no values are specified, the default values are
assumed (ß=100; IS=1E-16A, and VAF=[infinite]).

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 27 / 38

Semiconductor Devices
MOSFET: Mname ND NG NS <NB> ModName <L=VAL>
<W=VAL>
Model:
.MODEL ModName NMOS (<LEVEL=val>
<keyname=val> ... )
.MODEL ModName PMOS (<LEVEL=val>
<keyname=val> ... )
*** 0.5 um CMOS technology
***
* SPICE LEVEL3 PARAMETERS
. MODEL NMOS NMOS LEVEL =3 PHI =0.7 TOX =9.5 E -09 XJ =0.2 U TPG =1
+ VTO =0.7 DELTA =8.8 E -01 LD =5 E -08 KP =1.56 E -04
+ UO =420 THETA =2.3 E -01 RSH =2.0 E +00 GAMMA =0.62
+ NSUB =1.40 E +17 NFS =7.20 E +11 VMAX =1.8 E +05 ETA =2.125 E -02
+ KAPPA =1 E -01 CGDO =3.0 E -10 CGSO =3.0 E -10
+ CGBO =4.5 E -10 CJ =5.50 E -04 MJ =0.6 CJSW =3 E -10
+ MJSW =0.35 PB =1.1

* SPICE LEVEL3 PARAMETERS

. MODEL PMOS PMOS LEVEL =3 PHI =0.7 TOX =9.5 E -09 XJ =0.2 U TPG = -1
+ VTO = -0.95 DELTA =2.5 E -01 LD =7 E -08 KP =4.8 E -05
+ UO =130 THETA =2.0 E -01 RSH =2.5 E +00 GAMMA =0.52
+ NSUB =1.0 E +17 NFS =6.50 E +11 VMAX =3.0 E +05 ETA =2.5 E -02
+ KAPPA =8.0 E +00 CGDO =3.5 E -10 CGSO =3.5 E -10
+ CGBO =4.5 E -10 CJ =9.50 E -04 MJ =0.5 CJSW =2 E -10
+ MJSW =0.25 PB =1
Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 28 / 38
 Subcircuits

Subcircuits: SPICE allows you to define a collection of

elements as a subcircuit (e.g. an INV, NAND2,...) and to
insert this description into the overall circuit .
Defining a subcircuit:
. SUBCKT SUBNAME N1 N2 N3 ...
Element statements
.
.
.
. ENDS SUBNAME

Example:
. subckt invd1 a y gnd vdd
xnm0 y a gnd gnd n_svt m =1 mf =1 w =240 e -9 l =80 e -9
xpm0 y a vdd vdd p_svt m =1 mf =1 w =360 e -9 l =80 e -9
. ends invd1

. subckt nd2d1 a b y gnd vdd

xpm1 y b vdd vdd p_svt m =1 w =240 e -9 l =80 e -9
xpm0 y a vdd vdd p_svt m =1 w =240 e -9 l =80 e -9
xnm0 y a net10 gnd n_svt m =1 w =240 e -9 l =80 e -9
xnm1 net10 b gnd gnd n_svt m =1 w =240 e -9 l =80 e -9
. ends nd2d1

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 29 / 38

Subcircuits

Using a subcircuit: The element statement for a

subcircuit is similar to any other element. The format is
as follows:
Xname N1 N2 N3 ... SUBNAME

Example:
vvdd vdd 0 5
va a 0 5
vb b 0 5
xnand2 a b vout gnd vdd nand2
. dc va 0 5 0.2
. plot dc v ( vout )

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 30 / 38

 Example

NGSpice code: . control

set color0 = white ; background , a
NAND gate using CMOS
nice color of off - white
. include ./45 nm_LP . pm
set color1 = black ; text and grid
almost black
. subckt nand2 a b y gnd vdd
set color2 = blue ; vector0
mpm1 y b vdd vdd pmos m =1 w =240 e -9
set color3 = red ; vector1
l =80 e -9
set color4 = orange ; vector2
mpm0 y a vdd vdd pmos m =1 w =240 e -9
set xgridwidth =2
l =80 e -9
set xbrushwidth =3
mnm0 y a net10 gnd nmos m =1 w =240 e
run
-9 l =80 e -9
plot v ( out ) v ( in1 ) +6 v ( in2 ) +3
mnm1 net10 b gnd gnd nmos m =1 w =240 e
. endc
-9 l =80 e -9
. end
. ends nand2

vvdd vdd 0 1 v
vin1 in1 0 pwl (0 0 , 10 ns 0 , 10.1 ns 1
v , 15 ns 1v , 15.1 ns 0)
vin2 in2 0 pwl (0 0 , 13 ns 0 , 13.1 ns 1
v , 17 ns 1 v )

xnand2 in1 in2 out 0 vdd nand2

. tran 1 ns 20 ns

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 31 / 38

Measurement: .MEASURE

.MEASURE: is often used in circuit optimization. With

it, you can find when a certain event occurs as you sweep
various parameters.
You can use .MEASURE for finding:
Rise, Fall and Time Delay
Average, RMS, min, max, peak-to-peak and integral
Find X when Y occurs
Derivative and Integral Evaluations
Equation Evaluations
Relative Error (See Manual for Examples)

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 32 / 38

 Measurement: .MEASURE

Rise and Fall

.MEAS TRAN rise TRIG V(1) VAL=.2 RISE=1 +
TARG V(1) VAL=.8 RISE=1

Time Delay
.MEAS TRAN tdelay TRIG V(1) VAL=2.5 TD=10n
RISE=1 + TARG V(2) VAL=2.5 FALL=1

Average (and RMS, MIN, MAX and Peak to Peak)

.MEAS TRAN avgval AVG V(1) FROM=10ns TO=55ns

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 33 / 38

Measurement: .MEASURE

Find and When

.MEAS TRAN DesiredCurr FIND I(Vmeas) WHEN
V(1)=1V

Derivatives and Integrals

.MEAS TRAN slewrate DERIV V(out) AT=25ns
Derivative is always calculated with respect to the
sweeping parameter (which is time in this case)

Using Equation Evaluations

.MEAS TRAN slew DERIV v(1) WHEN v(1)=’0.9*vdd’
In this case, we’re calculating slew rate when v(1) is equal
to 0.9*vdd.

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 34 / 38

MOSFET I - V Characteristic: IDS − VDS
NGSpice code: * loop
while vgs_act le stop_vgs
* MOS Characteristic Curves
alter vgs vgs_act
* NMOS ID - VDS 11/1/2021
run
. include ./45 nm_LP . pm
write dc - sweep . out i ( vds )
. option TEMP =27 C
set appendwrite
vvdd vdd gnd 1 v
let vgs_act = vgs_act + delta_vgs
vds drain 0 dc 1
end
v
plot ( - dc1 . i ( vds ) ) ( - dc2 . i ( vds ) ) ( -
vgs gate 0 dc 1
dc3 . i ( vds ) ) ( - dc4 . i ( vds ) ) ( - dc5
v
. i ( vds ) )
mn0 drain gate 0 0 nmos
*+ dc6 . v (2) dc7 . v (2) dc8 . v (2) dc9 . v
W =2 u L =45 n
(2) dc10 . v (2)
. dc vds 0 1 0.01
* print -i ( vs ) > m o s _ c h a r ac t e r i s t i c s .
. control
dc
set color0 = white ; background , a
. endc
nice color of off - white
. end
set color1 = black ; text and grid
almost black
set color2 = blue ; vector0
set color3 = red ; vector1
set color4 = black ; vector2
set color5 = blue ; vector0
set xbrushwidth =2
* dc vds -1 0 0.01
* plot -i ( vds ) xlabel ’ vds ( vg =0) ’
let start_vgs = 0.2
let stop_vgs = 1
let delta_vgs = 0.2
let vgs_act = start_vgs

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 35 / 38

MOSFET I - V Characteristic: IDS − VGS

NGSpice code:
* MOS Characteristic Curves
* NMOS ID - VGS 11/1/2021
. include ./45 nm_LP . pm
. option TEMP =27 C
vd drain gnd dc 1
vg gate gnd dc 1
mn0 drain gate gnd gnd
nmos W =1 u L =45 n
. control
set color0 = white ; background , a
nice color of off - white
set color1 = black ; text and grid
almost black
set color2 = blue ; vector0
set color3 = red ; vector1
set color4 = rgb :0/0/ f ; vector2
set xbrushwidth =2
dc vg 0 1 0.01
plot -i ( vd )
print -i ( vd ) > m o s _ c h a r a c t e r is t i c s .
dc
. endc
. end

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 36 / 38

Study

ISAT (ION) of NMOS and PMOS in the class Model

Using device NMOS, PMOS: W=1um, L=
40nm:240nm: step 40nm
IOF F : leakage current of NMOS
Using device NMOS: W=1um, L= 40nm:240nm: step
40nm
VV T H : Threshold voltage of NMOS and PMOS
Using device NMOS, PMOS: W=1um, L= 120nm

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 37 / 38

Questions?

Thank you !

Nguyen Tran Son (∞) SPICE Introduction Feb 13, 2023 38 / 38