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3.0 6.

Article

A Control Design Technology of


Isolated Bidirectional LLC
Resonant Converter for Energy
Storage System in DC Microgrid
Applications

You-Kun Tai and Kuo-Ing Hwu

Special Issue
Optimal Design and Application of High-Performance Power Converters
Edited by
Dr. Shengrong Zhuo , Dr. Tianhong Wang, Dr. Wenshuai Bai, Dr. Elena Breaz and
Prof. Dr. Yigeng Huangfu

https://doi.org/10.3390/en16196877
energies
Article
A Control Design Technology of Isolated Bidirectional LLC
Resonant Converter for Energy Storage System in DC
Microgrid Applications
You-Kun Tai and Kuo-Ing Hwu *

Department of Electrical Engineering, National Taipei University of Technology, 1, Sec. 3, Zhongxiao E. Rd,
Taipei 10608, Taiwan; t108319005@ntut.org.tw
* Correspondence: eaglehwu@ntut.edu.tw; Tel.: +886-2-27712171 (ext. 2159)

Abstract: This paper presents a new control method for a bidirectional DC–DC LLC resonant topology
converter. The proposed converter can be applied to power the conversion between an energy storage
system and a DC bus in a DC microgrid or bidirectional power flow conversion between vehicle-
to-grid (V2G) behavior and grid-to-vehicle (G2V) behavior. Furthermore, such a converter can be
applied to energy storage systems for decentralized renewable energy generation systems, such as
solar and wind power. In addition, this converter can be combined with a bidirectional inverter to
allow energy storage in the system to improve the safety, stability, and power quality of the microgrid.
In the proposed circuit structure, we use a bidirectional DC–DC LLC, which has the advantages of a
higher voltage conversion ratio, lower part count, simpler control than similar converters such as
DAB, CLLC, and L–LLC converters, and bidirectional power flow and electrical isolation. Specifically,
to extend the battery life, it can be employed as a control strategy for discharging the energy stored
in the battery (SOC) and reducing the temperature rise generated by the internal solid electrolyte
interphase (SEI) when discharging the battery under the variation in distributed energy resource
(DER) generation and load demand. To realize the bidirectional power conversion without using any
auxiliary inductor and only changing the control strategy, the forward step-down power conversion
Citation: Tai, Y.-K.; Hwu, K.-I. A was based on pulse frequency modulation (PFM) control, and the reverse step-up power conversion
Control Design Technology of was based on pulse width modulation (PWM) control. In this paper, we introduce the bidirectional
Isolated Bidirectional LLC Resonant converter topology and its control strategy for the DC microgrid battery energy storage system.
Converter for Energy Storage System Finally, a 500 W prototype is built to verify the effectiveness of the proposed converter.
in DC Microgrid Applications.
Energies 2023, 16, 6877. https:// Keywords: bidirectional DC–DC converter; LLC topology; push–pull topology; resonant converter;
doi.org/10.3390/en16196877 zero voltage switching
Academic Editors: Shengrong Zhuo,
Tianhong Wang, Wenshuai Bai, Elena
Breaz and Yigeng Huangfu
1. Introduction
Received: 15 August 2023
1.1. Overview
Revised: 22 September 2023
Accepted: 25 September 2023 In addition to energy supply and demand, economic efficiency, environmental protec-
Published: 29 September 2023 tion, and impact assessment are crucial to energy development. In the face of the multiple
challenges of energy security and global warming, how to ensure the security of energy
supply and sustainable development of the environment are key issues that policymakers
must carefully consider. Therefore, developing low-carbon energy sources and improving
Copyright: © 2023 by the authors. the efficiency of various energy uses and conversions are becoming a priority. The devel-
Licensee MDPI, Basel, Switzerland. opment of distributed generation (DG) based on renewable energy [1] and the demand
This article is an open access article for clean electricity from photovoltaic, fuel cells, wind, geothermal, and ocean energy are
distributed under the terms and increasingly favored because of the low energy density of renewable energy and the high
conditions of the Creative Commons cost of traditional power generation. Most renewable energy sources are intermittent and
Attribution (CC BY) license (https://
must be stored to ensure the stability of the power supply. For example, the battery energy
creativecommons.org/licenses/by/
storage system (BESS) [2] and the electric vehicles (EVs) [3] are power storage units for
4.0/).

Energies 2023, 16, 6877. https://doi.org/10.3390/en16196877 https://www.mdpi.com/journal/energies


Energies 2023, 16, 6877 2 of 35
Energies 2023, 16, 6877 2 of 34

be stored to ensure the stability of the power supply. For example, the battery energy storage
different renewable energy sources and realize the vehicle-to-grid (V2G) behavior and the
system (BESS) [2] and the electric vehicles (EVs) [3] are power storage units for different
grid-to-vehicle behavior (G2V) [4]. Therefore, the BESS should have a bidirectional power
renewable energy sources and realize the vehicle-to-grid (V2G) behavior and the grid-to-
flow capability to store energy when excess renewable energy is generated and release it
vehicle behavior (G2V) [4]. Therefore, the BESS should have a bidirectional power flow ca-
pability there
when to storeis aenergy
shortagewhenor during a peak in energy
excess renewable energyconsumption.
is generated and By release
incorporating
it whenstorage
elements into the renewable energy system, the concerns of
there is a shortage or during a peak in energy consumption. By incorporating storage variability and intermittency
ele-
caused by integrating renewable energy with the grid can
ments into the renewable energy system, the concerns of variability and intermittency be mitigated to some extent.
DC microgrids
caused by integrating can operate
[5] renewable in one
energy withofthe
twogrid
modes:
can bestand-alone
mitigated to someor grid-connected.
extent. DC In
microgrids
stand-alone [5] mode,
can operate in one
the local loadof is
two modes: stand-alone
controlled or grid-connected.
by the renewable In stand-and the
energy generated
alone
BESS.mode,
In thethegrid-connected
local load is controlled
mode, the by the renewable
power energy generated
flow between DC and and the BESS. In allows
AC microgrids
the
forgrid-connected
more flexibility mode,
andthe
canpower flow between
also provide DC and
ancillary AC microgrids
services (A/S) [6],allows for more
bringing additional
flexibility
benefits and can also provide
of decentralized gridancillary services
flexibility to the(A/S) [6], bringing
generators additional benefits
and consumers. Figureof 1 shows
decentralized
a typical DCgrid flexibility
microgrid to the generators
structure. and consumers.
Since there are variousFigure 1 shows
renewable a typical
energy DC such
sources,
microgrid structure.panels
as photovoltaic Since there
that are variousDC
generate renewable
power,energy
a DC–DC sources, such as is
converter photovoltaic
used to connect
panels that generate DC power, a DC–DC converter is used to
the DC network for power conversion, and a DC–AC converter is used to transfer connect the DC network for this
power conversion, and a DC–AC converter is used to transfer this
renewable energy from the DC–DC converter to the AC grid, making the AC grid flexiblerenewable energy from
the DC–DC
and converter
controllable. to the AC grid,
Accordingly, making the
a DC–DC AC grid flexible
bidirectional and controllable.
converter transfers the Accord-
BESS or EVs
ingly, a DC–DC bidirectional
energy to the DC Bus. converter transfers the BESS or EVs energy to the DC Bus.

Utility Grid DC Loads


DC Bus: 380 V

AC DC DC DC
PV
AC Loads
DC DC DC AC

EV Battery

DC DC DC DC
Energy Storage Energy Storage

Figure
Figure1. 1.
Block diagram
Block of aofDC
diagram microgrid
a DC system.
microgrid system.

Most
Mostrecent
recentresearch
researchhas
hasfocused
focusedon on bidirectional
bidirectional power transfer because
power transfer because the
thebidirectional
bidi-
rectional DC–DC converter is the key component in realizing the bidirectional
DC–DC converter is the key component in realizing the bidirectional power flow of power flow
BESS. Dif-
offerent
BESS.topologies
Different topologies of bidirectional DC–DC converters have been proposed
of bidirectional DC–DC converters have been proposed in the literature in [7,8].
the literature [7,8]. Bidirectional DC–DC converters can be classified into non-isolated
Bidirectional DC–DC converters can be classified into non-isolated and isolated topologies [9]. and
isolated topologies
Non-isolated [9]. Non-isolated
topologies transmit power topologies transmit
without powerorwithout
transformer transformer
capacitor or there-
isolation and,
capacitor isolation and, therefore, lack the advantages of current isolation and high volt-
fore, lack the advantages of current isolation and high voltage gain ratio. However, they have
age gain ratio. However, they have advantages in size and weight due to their simple
advantages in size and weight due to their simple structure; thus, non-isolated bidirectional
structure; thus, non-isolated bidirectional topologies are recommended for low-power
topologies are recommended for low-power and low-voltage gain applications. In contrast,
and low-voltage gain applications. In contrast, isolated topology essentially converts the
isolated topology essentially converts the DC voltage on the primary side into a square voltage
DC voltage on the primary side into a square voltage waveform and transmits it to the
waveform and transmits it to the secondary side through a high-frequency transformer, which
secondary side through a high-frequency transformer, which is then adjusted to DC out-
is then
put adjusted
voltage. to DC
In practice, outputisolation
galvanic voltage.isIn practice,
required galvanic
in many isolation
specified is required
systems for safetyin many
specified systems for safety reasons. In addition, the voltage gain of the isolation
reasons. In addition, the voltage gain of the isolation topology can be increased by using topology can
be increased by using the turn ratio of the transformer, so it is recommended
the turn ratio of the transformer, so it is recommended for high-power and high-voltage- for high-power
andapplications.
gain high-voltage-gain applications.

1.2.Detailed
1.2. Detailed Analysis
Analysis
InIn general,
general, thethe BESS
BESS bidirectional
bidirectional DC–DC
DC–DC converter
converter must must havepower
have high high power
density,density,
high efficiency, and high reliability. Various electrically isolated bidirectional
high efficiency, and high reliability. Various electrically isolated bidirectional DC–DC to- DC–DC
pologies have been proposed and studied in recent decades. Among these, the full-bridge
topologies have been proposed and studied in recent decades. Among these, the full-bridge
phase-shift (FBPS) converter is an isolated DC–DC converter with good wide voltage
regulation characteristics [10,11], but its lack of soft switching in the main circuit under
light load reduces its efficiency. In addition, its topology is asymmetrical because the filter
Energies 2023, 16, 6877 3 of 34

inductors are placed on the secondary side. Therefore, even if the diodes are replaced
by metal-oxide-semiconductor field-effect transistors (MOSFETs) on the secondary side,
it cannot efficiently achieve bidirectional power flow. In the literature [12], a control
method was proposed to operate the FBPS converter in a voltage-fed mode based on phase
shift modulation in the direction of forward power flow and the current-fed mode in the
direction of backward power flow based on pulse width modulation. However, there was
no soft switching in the current-fed mode. In addition, when the secondary switches were
turned on simultaneously to magnetize the inductor, the conduction loss was increased,
and the available duty cycle was reduced, potentially leading to higher voltage stress in
the PSFB converter. In another study [13], various voltage input dual active bridge (DAB)
converter topologies, such as phase-shift dual active bridge (PSDAB) converters, were
given two bridge switches on each side of the transformer. The phase shift between the
gate drive signals for the primary-side and secondary-side switches was used to determine
the power flow direction and the output power. The overall efficiency was reduced because
of high backward energy and high switching loss during the cutoff period. In addition, the
feature of zero-voltage switching (ZVS) was inevitably lost when the converter had a wide
range of voltage variations, resulting in switching losses and increased circulating currents.
At light loads, the soft switching range became narrower, and the circulating current
inside the DAB converter increased significantly, resulting in a rapid decrease in efficiency.
Therefore, it is challenging for this converter to maintain high efficiency over a wider
voltage range. Although many improved modulation strategies have been proposed, such
as single-phase-shift (SPS), dual-phase-shift (DPS) [14], and triple-phase-shift (TPS) [15],
their control methods are complex and switching losses are still high. The circuit topologies
of the bidirectional full-bridge CLLC converter proposed in [16,17] and the bidirectional
full-bridge CLLLC resonant converter proposed in [18] are derived from the LLC series
resonant converter. In the bidirectional control, the primary and secondary sides have
symmetrical power conversion, a full-bridge symmetrical structure of the rectifier stage,
and a bidirectional power flow with the symmetrical high-frequency transformer. Therefore,
from a wide voltage range point of view, LLC is not a good choice because the large voltage
gain implies a smaller ratio of magnetizing inductance to resonance inductance and a
wide switching frequency range, leading to design complexity and increased power loss.
The CLLC–C multiple resonance converter proposed in [19] rearranges CLLC or CLLC–C
resonant networks to change the quality factor of the resonant network by controlling the
auxiliary switch to achieve a wider voltage range.
The LLC resonant converter is suitable for soft switching but encounters problems
when used in bidirectional operation. When the converter supplies energy in the backward
direction, the magnetizing inductance of the transformer is embedded in the output voltage.
This phenomenon causes the magnetizing inductor to be excluded from the circuit in the
resonance process. In this case, the LLC resonance can be considered an LC series resonance
with a maximum voltage gain of 1. Therefore, the LLC resonant converter is not suitable
for backward voltage gains and wide voltage output. The converter proposed in [20] has a
symmetrical resonant circuit on the primary and secondary sides to achieve bidirectional
power flow. It achieves low or high voltage gain by selecting the operation of the half-
bridge or full-bridge circuit structure. Therefore, this converter can realize the output
voltage with a controlled voltage increase range to avoid the wide range of switching
frequency variation in conventional bidirectional resonant converters. Another study [21]
proposed a full-bridge topology-based bidirectional resonant converter. In the forward
operation, switching between the half-bridge and full-bridge configurations extends the
output voltage range by providing a step-down gain of 0.5 or 1. In the backward operation,
a double voltage rectification (DVR)-control method is used to realize a double voltage
gain on the rectifier side, which can effectively extend the operating voltage range. The
conventional resonant converter control method is only used for unidirectional power
conversion and works only in a buck or boost mode. In the study by [22], a bidirectional
synchronous/nonsynchronous rectifier control method for bidirectional LLC chargers is
Energies 2023, 16, 6877 4 of 34

proposed, while a synchronous rectification was performed in the forward mode. In the
backward mode, the asynchronous rectifier was performed to generate the gate drive
signals with a delay angle between the secondary and primary sides, resulting in high
voltage gain at low battery voltage, leading to increased power losses. In the high battery
voltage range, the delay angle was adjusted to zero to achieve high efficiency. In [23],
a PWM control strategy was proposed to realize the natural bidirectional power flow
of LLC–DCX (DC–DC Transformer, DCX), which can operate even when the resonance
parameter changes. However, since the optimal operation point is at the resonance point,
deviation from the resonance point would result in circulating losses and reduced voltage
gain. Several studies [24–29] proposed an L–LLC resonant structure by adding an auxiliary
inductor to the conventional LLC topology so that the resonance characteristics of each
resonant mode could be LLC in both directions of operation. The power loss increased by
adding an auxiliary inductor across the high voltage on the secondary side.
Table 1 summarizes the above analysis and compares the existing converters. The
PSFB [12] has relatively few parts and relatively poor efficiency, while DAB [15] has more
parts and relatively low voltage gain with complex control. The CLLC [17] is similar to
DAB [20], which has a higher number of switches and increased complexity of control
in order to expand the output range and change from full-bridge to half-bridge and vice
versa. The L–LLC [25] adds an auxiliary inductor across the high-voltage terminal on the
secondary side to increase the power loss. It cannot achieve a wide voltage range because
of its use of PFM control.

Table 1. Comparison of the existing converters.

Ref. No.
[12] [15] [17] [20] [25]
Parameter
Input voltage 12 V 70–110 V 280–403 V 400 V 30–50 V
Output voltage 400 V 60 V 400 V 200–450 V 350 V
Output power 300 W 300 W 1 kW 1 kW 3 kW
Max. efficiency <90% <96% 94.6% 93.5% 95.6%
Topology PSFB DAB CLLC CLLC L-LLC
Phase Phase
Control technique PFM PFM PFM
control control
No. of main switches 6 8 8 10 8
No. of inductors/
transformers/ 2/1/0 1/1/0 2/1/2 2/1/2 2/1/1
capacitors

1.3. Motivation
This paper presents a design method for a bidirectional LLC resonant converter used
in energy storage systems. In addition, the asymmetric characteristics of the LLC resonant
converter in the forward and backward modes are studied, and the effect of asymmetry on
the resonant converter is investigated. In addition, a design method for a bidirectional LLC
resonant converter is presented to reduce the need for an auxiliary inductor in the design
of the backward resonant circuit shown in [24–29]. Specifically, a forward buck power
flow adopts a conventional LLC resonant structure by relocating the LLC resonant tank,
and a backward boost power flow employs a push–pull structure with an inductor and a
capacitor in the secondary-side rectifier converter (LC-SRC) resonance by relocating the LC
resonant tank. Therefore, the converter combines a conventional push–pull converter with
PWM control to obtain a wide input voltage range and LC–SRC resonance characteristics.
This LC-SRC converter not only has all the advantages of resonance characteristics but also
the following benefits:
1. The low voltage side is defined as the primary side, whereas the high voltage side is
defined as the secondary side;
Energies 2023, 16, 6877 5 of 35

control to obtain a wide input voltage range and LC–SRC resonance characteristics. This
Energies 2023, 16, 6877 5 of 34
LC-SRC converter not only has all the advantages of resonance characteristics but also the
following benefits:
1. The low voltage side is defined as the primary side, whereas the high voltage side
is defined
2. Allasswitches
the secondary
have side;
ZVS turn-on, and the body diodes of the primary-side switches
2. All switches
have have ZVS
ZCS turn-off, turn-on,
thus and switching
reducing the body diodes
lossesofand
theimproving
primary-side switches
overall efficiency;
have
3. ZCS turn-off, thus
Compared withreducing switching
the half-bridge losses and
structure, theimproving
primary sideoverall efficiency;
is driven by the low-side
3. Compared
gate drivers,with
so the half-bridge
no floating gatestructure, theneeded,
drivers are primarythus
side simplifying
is driven bythe
thedesign
low- of the
side gatedrive
drivers, so no
circuit floating
and gate drivers
reducing costs; are needed, thus simplifying the design of the
drive
4. circuit and reducing
The switching duty costs;
cycle is maintained at about 0.5 to obtain the maximum component
4. The switching
utilization; duty cycle is maintained at about 0.5 to obtain the maximum com-
ponent
5. utilization;
The series connection of a resonant capacitor can isolate the DC current to avoid the
5. The series connection
magnetic escape of the of atransformer.
resonant capacitor can isolate the DC current to avoid
the magnetic escape of the transformer.
In In
thethe following,
following, Section
Section 2 introduces
2 introduces the basicthe basic operating
operating principles principles
and relatedand
the- related
theoretical derivations of the proposed forward buck LLC resonant
oretical derivations of the proposed forward buck LLC resonant converter topology and converter topology
and the backward boost LC resonant push–pull converter topology.
the backward boost LC resonant push–pull converter topology. In Section 3, the parame- 3, the In Section
ters of the converter
parameters of theare designed,
converter areand in Section
designed, 4, the
and digital control
in Section methodcontrol
4, the digital of ba ery
method of
charging and discharging is described. Section 5 presents the experimental results of a 500 results
battery charging and discharging is described. Section 5 presents the experimental
Wof prototype,
a 500 W and Section and
prototype, 6 concludes
Section the discussion.
6 concludes the discussion.

2. Topology Description
2. Topology Description
2.1.2.1. Forward
Forward Buck-Type
Buck-Type Energy
Energy Transfer
Transfer
AsAs shown
shown in Figure
in Figure 2, a2,typical
a typical
LLCLLC resonant
resonant converter
converter consists
consists of a high
of a high inputinput
volt- voltage
V
age H S to S
VH, full-bridge switches S11to S4,4an LLC resonant tank, a transformer, rectifiers S5 and
, full-bridge switches , an LLC resonant tank, a transformer, rectifiers S5 and S6 ,
S6,an
an output filterCCL,Land
output filter , anda load
a loadvoltage VL. V
voltage The resonant
L . The tank consists
resonant of a series
tank consists of ainductor
series inductor
Lr,Lar ,series capacitor
a series Cr, and
capacitor a magnetizing
Cr , and inductor
a magnetizing Lm. The
inductor Lmpower flowsVfrom
flows from
. The power H through
VH through
thethe
transformer
transformerto Vto
L. VL .

Forward Buck-Type Energy Transfer

S1 S3
Lr
N p2

VH CH Lm Ns
 Cr
N p1

VL
CL 

S2 S4 S5 S6

Figure 2. Proposed buck-type DC–DC Converter.


Figure 2. Proposed buck-type DC–DC Converter.

TheThe
series inductor
series Lr and
inductor the series
Lr and capacitor
the series Cr form
capacitor Cr aform
seriesa resonant circuit with
series resonant circuit with
one resonant frequency f r1 defined in Equation (1), which has the minimum impedance to
one resonant frequency fr1 defined in Equation (1), which has the minimum impedance
a sinusoidal current with the resonant frequency fr1. The switching frequency fs for the full-
to a sinusoidal current with the resonant frequency fr1 . The switching frequency fs for
bridge switches S1 to S4 is far from the resonant frequency fr1 as the high input voltage VH
the full-bridge switches S to S4 is far from the resonant frequency fr1 as the high input
is increased on condition that 1the load voltage VL is kept constant. As the load decreases,
voltage VH is increased on condition that the load voltage VL is kept constant. As the load
the magnetizing inductance Lm participates in the LLC resonant operation and generates
decreases, the magnetizing inductance Lm participates in the LLC resonant operation and
the other resonant frequency fr2, as described in Equation (2). Therefore, the switching
generates the other resonant frequency fr2moves
frequency 𝑓s determined by the load conditions
, as described in Equation (2). Therefore, the
between the range of fr1 and 𝑓𝑟2.
switching frequency fs determined by the load conditions moves between the range of fr1
and fr2 .
1
f r1 = √ (1)
2π Lr Cr
1
f r2 = p (2)
2π ( Lm + Lr )Cr
1
f r1  (1)
2 Lr Cr

1
Energies 2023, 16, 6877 fr 2  (2) 6 of 34
2 ( Lm  Lr )Cr

2.1.1.
2.1.1.Voltage
VoltageGain
Gainunder
underthe Turns
the Ratio
Turns Equal
Ratio to One
Equal to One
The
Theprinciple
principleofofthe first
the harmonic
first analysis
harmonic (FHA)
analysis method
(FHA) is that
method is the
thatmain component
the main component
of the circulating current in the resonant circuit is a pure sinusoidal current. Therefore,
of the circulating current in the resonant circuit is a pure sinusoidal current. Therefore, by
assuming that only the fundamental wave of the current transfers power to the load, ignor-
by assuming that only the fundamental wave of the current transfers power to the load,
ing all higher harmonics, the AC equivalent model of the LLC resonant converter can be
ignoring all higher harmonics, the AC equivalent model of the LLC resonant converter can
obtained from the assumptions shown in Figure 3. In addition, the parasitic inductance of
be obtained from the assumptions shown in Figure 3. In addition, the parasitic inductance
the output filter capacitor and the primary-side leakage inductance of the transformer are
of the output filter capacitor and the primary-side leakage inductance of the transformer
ignored, and the primary-side parameters are reflected to the secondary side.
are ignored, and the primary-side parameters are reflected to the secondary side.
L r
ia ib

iLm
Vap Lm Vbp
Cr

Figure 3. AC equivalent circuit of the LLC resonant converter based on the FHA.
Figure 3. AC equivalent circuit of the LLC resonant converter based on the FHA.
Energies 2023, 16, 6877 7 of 35
The equivalent circuit shown in Figure 4 can be obtained by applying Thévenin’s
The equivalent circuit shown in Figure 4 can be obtained by applying Thévenin’s
theorem to the LLC equivalent circuit, as shown in Figure 3.
theorem to the LLC equivalent circuit, as shown in Figure 3.
The voltagejV Tp is defined
s LT
I bp by Equation (3):

s 2Cr Lm
VTp  Vap (3)
VTp Vbp s2Cr ( Lr  Lm )  1
The Thévenin’s equivalent impedance of the AC equivalent circuit of the LLC reso-
nant converter can be defined as Equation (4):
Figure
Figure4.4.An
Anequivalent circuit obtained from Thévenin’s
2 theorem basedbased
on a phasor diagram.
equivalent circuit j s Lm ( s Cr Lr  1)
obtained from Thévenin’s theorem on a phasor diagram.
ZT  (4)
The
Thefundamental
voltage VTp harmonic
is definedofby  s2C r ( L(3):
theEquation
AC input  Lm ) with
r voltage 1 the square wave, called VH,
is given by Equation (6):
From (4), the Thévenin’s equivalent inductive impedance
2 can be written as Equation
(5): 4Vω s Cr Lm
VT p = Vap
Vapωs2 Cr (HLr + Lm ) − 1 (3)
(6)

Lm ( s2Cr Lr  1)
The
Thefundamental
Thévenin’s equivalent Lthe
T secondary-side
harmonic ofimpedance of the AC AC output voltage
equivalent circuitwith theLLC
of the (5)
square
resonant
 2
s C r ( Lr  Lm )  1
wave,
converter VL,be
calledcan which is reflected
defined from V(4):
as Equation H, is given by Equation (7):

To obtain the curves of the steady-state sinusoidal


4VL 2 Cr Lr currents and voltages of the LLC
converter, a phasor diagram is used to V
jω s Lm ( ω
represent them,
s as 1)
−shown in Figure 4. (7)
ZT = bp (4)
ωs2 Cr ( Lr + Lm ) − 1
The load current Io reflected to the secondary side, called Ibp, can be expressed by
From (4), the Thévenin’s equivalent inductive impedance can be written as Equation
Equation (8):
(5):
 2 Cr Lr − 1)
Lm (ω
L T = I bp2  s I o (8) (5)
ωs Cr (2Lr + Lm ) − 1
Figure 5 shows
To obtain the synthetic
the curves of thephase diagram.sinusoidal
steady-state The angle ϕ represents
currents andthe phase differ-
voltages of the LLC
ence between
converter, the voltages
a phasor VTp and
diagram Vbp. From
is used the analysis
to represent them,ofasthe vectorindiagram
shown shown in
Figure 4.
FigureThe
5, Equation (9) can
fundamental be wri en.
harmonic of the AC input voltage with the square wave, called VH ,
is given by Equation (6):
VTp2  Vbp2  (s4V
LTHIbp )2 (9)
Vap = (6)
π
The fundamental harmonic of the secondary-side AC output voltage with the square
wave, called VL , which is reflected from VH , is given by Equation (7):
VTp
4VL
js LT I bp Vbp = (7)
π

I bp Vbp

Figure 5. Synthetic phasor diagram.


Vap  H
(6)

The fundamental harmonic of the secondary-side AC output voltage with the square
wave, called VL, which is reflected from VH, is given by Equation (7):
4VL
Energies 2023, 16, 6877 Vbp  (7) 7 of 34

The load current Io reflected to the secondary side, called Ibp, can be expressed by
Equation
The(8):load current Io reflected to the secondary side, called Ibp , can be expressed by
Equation (8):

I bp I =I oπ Io (8) (8)
bp 2
2
Figure
Figure5 shows the the
5 shows synthetic phase
synthetic diagram.
phase The angle
diagram. ϕ represents
The angle the phase
φ represents thediffer-
phase differ-
ence between
ence between thethe
voltages VTp V
voltages and
Tp V
and
bp . From
V bp . the
From analysis
the of the
analysis vector
of the diagram
vector shown
diagram in
shown in
Figure 5, Equation
Figure 5, Equation(9) (9)
cancan
be wri en.
be written.

VTpV2 T2p V=bp2 V2(+s L(TωIsbpL)T2Ibp )2 (9) (9)


bp

VTp
js LT I bp

I bp Vbp

Figure 5. Synthetic
Figure phasor
5. Synthetic diagram.
phasor diagram.

Substituting Equations
Substituting (7) and
Equations (8) into
(7) and (9) yields
(8) into Equation
(9) yields (10): (10):
Equation
4V 2 2s LT ω I 2
VVTp22  = ) L)( + ( s oL)T2πIo )
( ( L4V (10)
Tp  π 2 2 (10)

Substituting Equations (3) and (5) into (10) yields Equation (11):
Substituting Equations (3) and (5) into (10) yields Equation (11):
s2C2r Lm  4 s Lm (s2Cr Lr 1)Io
(VL )22  (VH )2[2 2
ωs Cr Lm ]  [ π 42 ωs Lm (ωs2 Cr Lr ]− 1) Io (11)
2 2 2

(VL ) = (VH ) 
[ s2C2 r (Lr  Lm ) 1 ]64− s C
[ r (L2r  Lm ) 1 ] (11)
ωs Cr ( Lr + Lm ) − 1 64 ωs Cr ( Lr + Lm ) − 1
where the following definitions are
where the following definitions are
V V
MM
 =L L (12) (12)
VH VH
ωs = 2π f s (13)
1
ωr = √ (14)
Cr Lr
fs
fn = (15)
f r1
Lr
λ= (16)
Lm
ωs Lr
Io = Io (17)
VH
By substituting Equation (12) to (17) into (11), the voltage gain M can be expressed as
Equation (18): q
π4 2
f n4 − 2
64 [( f n − 1) Io ]
M= (18)
f n2 (λ + 1) − λ
From (18), the voltage gain is a function of the load current. The equivalent AC load
resistance Rac is defined as the load resistance R reflected to the secondary side of the
transformer, as shown in Equation (19). Therefore,

Vbp
R ac = (19)
Ibp
Energies 2023, 16, 6877 8 of 34

Based on (7) and (8), rearranging (19) yields

4VL 2
R ac = (20)
π π Io

Equation (20) can be rewritten to

8
R ac = R (21)
π2
Additionally, the quality factor Q of the resonant circuit is defined as

Lr /Cr
Q= (22)
R ac

Therefore, by substituting Equation (22) into (18) and performing appropriate algebraic
operations, Equation (23) can be obtained as

f n2
M= q (23)
[ f n2 (λ + 1) − λ]2 + [ f n Q( f n2 − 1)]2

From (23), under a given value of λ, the curves of voltage gain M versus normalized
switching frequency fn under different quality factors of Q are plotted in Figure 6. Using
Energies 2023, 16,
Energies2023, 16, 6877
6877 99 of
of 35
35
Equation (23), under a given value of Q, curves of the voltage gain M as a function of the
normalized switching frequency fn from different quality factors of λ are plotted in Figure 7.

22
Q=0.2
Q=0.2 Q=0.4
Q=0.4 Q=0.8
Q=0.8
1.8
1.8 Q=1.6
Q=1.6 Q=3.2
Q=3.2
1.6
1.6
1.4
1.4
1.2
1.2
M
M 11
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2
00
00 0.2
0.2 0.4
0.4 0.6
0.6 0.8
0.8 11 1.2
1.2 1.4
1.4 1.6
1.6 1.8
1.8 22
ffnn

Figure
Figure6.
Figure Curves
6.6.
Curves of
ofvoltage
Curves voltage
of gain
gain
voltage M
Mversus
gain versus normalized
normalized
M versus switching
switching
normalized frequency
frequency
switching ffnnunder
frequencyunder different
different
fn under quality
qualityquality
different
factors
factorsof
factors Q.
Q.Q.
ofof

1.8
1.8
1.6
1.6
1.4
1.4
1.2
1.2
M
M 11
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2 =0.14 =0.18
=0.1 =0.14
=0.1 =0.18
=0.22
=0.22
00
00 0.2
0.2 0.4
0.4 0.6
0.6 0.8
0.8 11 1.2
1.2 1.4
1.4 1.6
1.6 1.8
1.8 22

ffnn

Figure
Figure
Figure 7. Curves
7.7.
Curves of
ofvoltage
Curves gain
of voltage
voltage M
Mversus
gaingainversus normalized
M versus switching
normalized
normalized frequency
switching
switching ffnnunder
underfdifferent
frequency
frequency values
valuesof
under different
ndifferent of values
λ.
λ.of λ.

2.1.2.
2.1.2. Operating
Operating Principles
Principles
The
The previous
previous analysis
analysis considered
considered aa primary
primary harmonic
harmonic approximation
approximation equivalent
equivalent cir-
cir-
cuit
cuit LLC
LLC converter
converter where
where all
all voltages
voltages and
and currents
currents are
are sinusoidal.
sinusoidal. In
In the
the following,
following, the
the
switching frequency of the LLC converter is investigated for modes where the switching
Energies 2023, 16, 6877 9 of 34

2.1.2. Operating Principles


The previous analysis considered a primary harmonic approximation equivalent cir-
cuit LLC converter where all voltages and currents are sinusoidal. In the following, the
switching frequency of the LLC converter is investigated for modes where the switching
frequency is lower, equal, or greater than the first resonance frequency. All the compo-
nents are considered ideal, and all the primary-side parameters and loads are reflected
to the secondary side. Only the waveforms within 0.5 Ts are considered, where Ts is the
switching period.

Case 1: Switching Frequency Equal to Resonant Frequency (fs = fr1 )


Energies 2023, 16, 6877
Energies 2023, 16, 6877
Figure 8 shows the corresponding illustrated waveforms, and1010
Figure
of 35 9 shows the
of 35
accompanying current flows in three operating modes.

v , v , vLm
vaa, vbb, vLm

i
iLrLr i
iLmLm

i
ioo

t t t t T 2
t00 t11 t 22 t00Ts s 2
Figure 8.8.
Illustrated waveforms
Illustrated at fs = fr1. f = f .
waveforms
Figure
Figure 8. Illustrated waveforms at fs = fr1at
. s r1

L i i L i i
Lr r iLrLr ioo Lr r iLrLr ioo
i i
++ i Lm
++ ++ iLmLm
+v+
+v+_Lm
Lm

v
vaa
L
Lmm v_Lm
v
vbb
v
vaa
L
Lmm +v+Lm
v__ vbb
__ __ __ __
Lm
C C
C rr C rr

(a) (b)
(a) (b)
L i i
Lr r iLrLr ioo
iLm
+v+ ++iLm
v_Lm ++
L v_Lm v
v a Lmm vbb
__ __
a
C
C rr

(c)
(c)
Figure 9. Case 1 current flow: (a) Mode 1; (b) Mode 2; (c) Mode 3.
Figure
Figure9. Case 1 current
9. Case flow: flow:
1 current (a) Mode
(a)1;Mode
(b) Mode 2; (c)
1; (b) Mode2;3.(c) Mode 3.
Mode
Mode 1: [t0 ≤ t ≤ t1]
Mode 1: [t0 ≤ t ≤ t1]
As shown in Figures 8 and 9a, since the voltages va and vLm are positive, the resonant
As shown in Figures 8 and 9a, since the voltages va and vLm are positive, the resonant
current iLr and the magnetizing current iLm are negative with sinusoidal and linear rise,
current iLr and the magnetizing current iLm are negative with sinusoidal and linear rise,
respectively. At t = t1, this mode ends at iLr = 0, proceeding to Mode 2.
respectively. At t = t1, this mode ends at iLr = 0, proceeding to Mode 2.
Mode 2: [t1 ≤ t ≤ t2]
Mode 2: [t1 ≤ t ≤ t2]
Energies 2023, 16, 6877 10 of 34

Energies 2023, 16, 6877 11 of 35


Mode 1: [t0 ≤ t ≤ t1 ]
As shown in Figures 8 and 9a, since the voltages va and vLm are positive, the resonant
current iLr and the magnetizing current iLm are negative with sinusoidal and linear rise,
As shownAt
respectively. int Figures
= t1 , this8modeand 9b,endstheatresonance current ito
iLr = 0, proceeding Lr is positive and increases si-
Mode 2.
nusoidally, while the
Mode 2: [t1 ≤ t ≤ t2 ]magnetization current i Lm is negative and increases linearly. At t = t2,

this mode ends atiniLmFigures


As shown = 0, proceeding
8 and 9b,tothe Mode 3.
resonance current iLr is positive and increases
Mode 3: [t 2 ≤ t ≤ t 0 + T s/2]
sinusoidally, while the magnetization current iLm is negative and increases linearly. At t = t2 ,
thisAs shown
mode endsinatFigures
iLm = 0, 8proceeding Mode 3. current iLr and the magnetizing current
and 9c, thetoresonant
iLm are Mode
both positive
3: [t2 ≤ twith≤ t0 sinusoidal
+ Ts /2] and linear rise, respectively. At t = t3, this mode ends
at io = 0,
Asproceeding to Mode
shown in Figures 1. 9c, the resonant current iLr and the magnetizing current
8 and
iLm At
arethe resonant
both positivefrequency,
with sinusoidalthe LLCandresonant converter
linear rise, is able
respectively. Attot =turn on mode
t3 , this the second-
ends
ary-side
at io = 0,switch with ZVS.
proceeding to ModeAt the 1. same time, the turn-off current is the maximum magnet-
izing inductance
At the resonantcurrent. By selecting
frequency, the LLC a suitable
resonant magnetizing
converter is ableinductance,
to turn onathe slight turn-off
secondary-
loss
sidecan be achieved.
switch with ZVS.InAtaddition,
the samethe primary-side
time, the turn-off diode
currentisisturned off withmagnetizing
the maximum low voltage
across
inductance to di/dt, By
it due current. which means
selecting less reverse
a suitable recoveryinductance,
magnetizing loss. Thus,a the slightoptimal
turn-offperfor-
loss
can be achieved. In addition, the primary-side diode is turned off
mance of the LLC resonant converter is expected at the resonant frequency. At the reso- with low voltage across it
due to di/dt, which means less reverse recovery loss. Thus, the
nant frequency, the series resonant circuit impedance is zero. Therefore, the input and optimal performance of the
LLC resonant converter is expected at the resonant frequency. At the resonant frequency,
output voltages are connected, and the voltage gain at the resonant frequency is equal to
the series resonant circuit impedance is zero. Therefore, the input and output voltages are
one.
connected, and the voltage gain at the resonant frequency is equal to one.
Case
Case2:2:Switching
SwitchingFrequency
FrequencyGreater
Greaterthan
than Resonant Frequency (f(fss >> ffr1
Resonant Frequency r1)
)
Figures 10 and 11 show the corresponding illustrated waveforms
Figures 10 and 11 show the corresponding illustrated waveforms and and
thethe accompa-
accompany-
nying currentflows,
ing current flows,respectively.
respectively. There
There areare four
four operating
operating modes.
modes.

va

vb , vLm

iLr
iLm

io

t0 t1 t2 t3 t0 Ts 2

Figure 10.10.Illustrated
Figure waveformsatatfsfs>>fr1f.r1 .
Illustratedwaveforms
Energies2023,
Energies 16, 6877
2023, 16, 12 of 35 11 of 34

Lr iLr io Lr iLr io

iLm iLm
+ + + + + +
va Lm Lm v_Lm
_vLm vb va vb
_ Cr _ _ Cr _

(a) (b)

Lr iLr io Lr iLr io

iLm iLm
+ +v + + +v +
Lm vb va Lm vb
va _Lm _Lm
_ Cr _ _ Cr _

(c) (d)

Figure
Figure11.
11.Case
Case2 current flow:
2 current (a) Mode
flow: 1; (b)
(a) Mode 1; Mode 2; (c)2;Mode
(b) Mode 3; (d) 3;
(c) Mode Mode 4.
(d) Mode 4.

Mode
Mode1:1:[t0[t≤0t ≤
≤ tt1]≤ t1 ]
AsAsshown
shown ininFigures
Figures 10 10
and 11a,11a,
and the the
voltage
voltageva isvlarger than than
a is larger the voltage vb. Since
the voltage vb . the
Since the
voltagesvavand
voltages a and vLmvLm
arearepositive, thethe
positive, resonant
resonant current iLr and
current the magnetizing
iLr and the magnetizing current iLm
current iLm
are
arenegative
negativewith
withsinusoidal
sinusoidal and
and linear
linearrise, respectively.
rise, respectively. At Att = tt1=, this mode
t1 , this at iLrat= iLr = 0,
endsends
mode
0,proceeding
proceedingto to Mode
Mode 2. 2.
Mode
Mode2:2:[t1[t≤1t ≤
≤ tt2]≤ t2 ]
AsAsshown
shown ininFigures
Figures 10 10
andand11b, the the
11b, resonance
resonance current iLr is ipositive
current Lr is positiveand increases
and increases
sinusoidally, while the magnetization current iLm is negative and
sinusoidally, while the magnetization current iLm is negative and increases linearly. increases linearly. At tAt = t = t2 ,
t2this
, thismode
modeends
endsat at iiLm
Lm = 0, proceeding to
= 0, proceeding to Mode 3.Mode 3.
Mode
Mode3:3:[t2[t≤2t ≤
≤ tt3]≤ t3 ]
AsAsshown
shown ininFigures
Figures 10 10
andand
11c,11c,
the the
resonant
resonantcurrent iLr and
current iLrtheandmagnetizing
the magnetizing currentcurrent
iLm are both positive with sinusoidal and linear rise, respectively. At t =
iLm are both positive with sinusoidal and linear rise, respectively. At t = t3 , the input voltage t 3, the input voltage

vva reverses and becomes negative, and this mode ends, proceeding to Mode 4.
a reverses and becomes negative, and this mode ends, proceeding to Mode 4.
Mode 4: [t3 ≤ t ≤ t0 + Ts/2]
Mode 4: [t3 ≤ t ≤ t0 + Ts /2]
As shown in Figures 10 and 11d, the resonance current iLr decreases until it equals the
As shown in Figures 10 and 11d, the resonance current iLr decreases until it equals the
magnetization current iLm. At t = t0 + Ts/2, iLr = iLm, this mode ends, proceeding to Mode 1.
magnetization current iLm . At t = t0 + Ts /2, iLr = iLm , this mode ends, proceeding to Mode 1.
When the circuit operates at fs > fr1, the voltage va reverses polarity before the current
When the circuit operates at f > fr1 , the voltage va reverses polarity before the current
io naturally reaches zero, causing thes rectifier diode to be turned off with relatively high
io naturally reaches zero, causing the rectifier diode to be turned off with relatively high
voltage across it due to di/dt, which results in a relatively large reverse recovery current of
voltage across it due to di/dt, which results in a relatively large reverse recovery current
the diode, thereby increasing switching losses and sacrificing efficiency. In addition, the
of the
high diode,
diode di/dtthereby
turn-off increasing
will generate switching
additional losses
voltageand sacrificing
stress on the diode, efficiency. In re-
thereby addition,
the high diode di/dt turn-off will generate additional voltage stress
ducing the circuit reliability. For these reasons, the operation at fs > fr1 is undesirable com- on the diode, thereby
reducing
pared with the circuit reliability.
the operation Cases 1 and For2,these
whichreasons,
should be operation at fs > fr1 is undesirable
theavoided.
compared with the operation Cases 1 and 2, which should be avoided.
Case 3: Switching Frequency Less than Resonant Frequency (fs < fr1)
Case 3: Switching Frequency Less than Resonant Frequency (fs < fr1 )
Figures 12 and 13 show the corresponding illustrated waveforms and the accompa-
nying Figures 12 andrespectively.
current flows, 13 show theThere
corresponding illustrated
are four operating waveforms and the accompany-
modes.
ing current flows, respectively. There are four operating modes.
Energies2023,
Energies 16, 6877
2023,16, 6877 13 of 35 12 of 34

vb , vLm

va

iLr
Lr

iLm
Lm

ioo

t00 t11 t22 t33 t0  Ts / 2

Figure
Figure12.
12.Illustrated waveforms
Illustrated at fssat< ffr1
waveforms s .< fr1 .
r1

Lr iLr io Lr iLr io

iLm iLm
+ + + + + +
Lm vLm vb Lm v_Lm vb
va _ va
_ Cr _ _ Cr _

(a) (b)

Lr iLr io Lr iLr io

iLm iLm
+ +Lm + + + +
va Lm v_Lm vb va Lm v_Lm vb
_ Cr _ _ Cr _

(c) (d)

Figure
Figure13.
13.Case
Case3 current flow:
3 current (a) (a)
flow: Mode 1; (b)
Mode 1; Mode 2; (c)2;Mode
(b) Mode 3; (d)3;
(c) Mode Mode 4.
(d) Mode 4.

Mode1:1:[t0[t≤0t≤
Mode 0 ≤ tt11]≤ t1 ]
As shown in
As shown in FiguresFigures 12 12 and
and 13a,
13a, thethe vbb isvlarger
voltage
voltage b is larger
than than the voltage
the voltage va . the
vaa. Since Since the
voltages v and
voltages vaa and vLm
a v are positive, the resonant current
Lm are positive, the resonant current iLr
Lm i and the magnetizing
Lr and the magnetizing current iLm
Lr current
Lm
iLm
are negative with sinusoidal and linear rise, respectively. At t = t , this
are negative with sinusoidal and linear rise, respectively. At t = t11, this mode ends at iLr
1 mode ends at
Lr =
iLr = 0,
0, proceeding to Mode 2.
proceeding to Mode 2.
Mode 2: [t1 ≤ t ≤ t2 ]
As shown in Figures 12 and 13b, the resonance current iLr is positive and increases
sinusoidally, while the magnetization current iLm is negative and increases linearly. At t = t2 ,
this mode ends at iLm = 0, proceeding to Mode 3.
Energies 2023, 16, 6877 14 of 35

Mode 2: [t1 ≤ t ≤ t2]


Energies 2023, 16, 6877 As shown in Figures 12 and 13b, the resonance current iLr is positive and increases 13 of 34
sinusoidally, while the magnetization current iLm is negative and increases linearly. At t =
t2, this mode ends at iLm = 0, proceeding to Mode 3.
Mode 2 ≤ t ≤ t3]
3: [t3:
Mode [t2 ≤ t ≤ t3 ]
As As
shown
shown in Figures
in Figures 12 and 13c, the
12 and 13c,resonant current
the resonant iLr andi theand
current magnetizing current current
the magnetizing
Lr
iLm iare are
bothboth
positive with sinusoidal and linear rise, respectively. At t = t 3, this mode ends
positive with sinusoidal and linear rise, respectively. At t = t3 , this mode ends
Lm
at iLr = iLm, proceeding to Mode 4.
at iLr = iLm , proceeding to Mode 4.
Mode 4: [t3 ≤ t ≤ t0 + Ts/2]
Mode 4: [t3 ≤ t ≤ t0 + Ts /2]
As shown in Figures 12 and 13d, during this state, io = 0 and iLr = iLm with linear rise.
As shown in Figures 12 and 13d, during this state, io = 0 and iLr = iLm with linear rise.
At t0 + Ts/2, the input voltage va reverses and becomes negative, and this mode ends, pro-
At t + Ts /2, the input voltage va reverses and becomes negative, and this mode ends,
ceeding0 to Mode 1.
proceeding to Mode 1.
The operation with fs < fr1 differs in one respect from the operation with fs = fr; the
The operation
output rectifier current with fs < fr1 differs in one respect from the operation with fs = fr ; the
io is discontinuous.
output rectifier current io is discontinuous.
2.2. Backward Boost-Type Energy Transfer
2.2. Backward Boost-Type Energy Transfer
Figure 14 illustrates the high-voltage gain zero-voltage switching (ZVS) push–pull
resonantFigure 14 illustrates
converter. The main the high-voltage
circuit consists of again
powerzero-voltage switching (ZVS)
switch, a high-frequency push–pull
center-
tapresonant converter.
transformer, The main
a resonant circuit
circuit, consists of
a full-bridge a powerand
rectifier, switch, a high-frequency
an output capacitor. The center-tap
zero-voltage switching push–pull resonant converter consists of bidirectional switches SThe
transformer, a resonant circuit, a full-bridge rectifier, and an output capacitor. 5
zero-
voltage switching push–pull resonant converter consists of bidirectional
and S6 with a duty period of nearly 0.5. The resonant inductor Lr is built by the secondary- switches S 5 and S6
side leakage inductor and connected with the resonant capacitor Cr to form a resonant
with a duty period of nearly 0.5. The resonant inductor L r is built by the secondary-side
tank. However,
leakage the magnetizing
inductor and connected inductance
with theof aresonant
high-frequency
capacitor transformer
Cr to form is consider-
a resonant tank.
able. Consequently, the magnetizing current is negligible. The series resonant circuit
However, the magnetizing inductance of a high-frequency transformer is
is considerable.
fed from the square wave output voltage on the secondary side of this transformer. TheisLfed
Consequently, the magnetizing current is negligible. The series resonant circuit r from
andtheCrsquare
waveformswaveare converted
output voltage intoona the
sinusoidal
secondarycurrent
sideforof soft-switching
this transformer. operation.
The Lr and Cr
The full-bridgeare
waveforms rectifier makesinto
converted the aoutput voltage
sinusoidal equal to
current forthe peak output value
soft-switching of thisThe full-
operation.
transformer by means
bridge rectifier of athe
makes high-capacitance
output voltagefilter equalcapacitor CH. Therefore,
to the peak output valuethe output
of thisvolt-
transformer
agebyVHmeans
can beofregarded as constant.filter
a high-capacitance The regulation
capacitor CofHthe output current
. Therefore, is controlled
the output voltage byVH can be
theregarded
change inas the duty cycle
constant. of regulation
The the switching of period.
the output current is controlled by the change in
the duty cycle of the switching period.

Backward Boost-Type Energy Transfer


S3 S1
Lr

N p2 
vTS

Ns Lm Cr CH
 VH
N p1 

VL CL

S4 S2
S6 S5

Figure 14. 14.


Figure Proposed step-up
Proposed DC–DC
step-up Converter.
DC–DC Converter.

2.2.1. Series
2.2.1. Load
Series Resonant
Load Converter
Resonant Analysis
Converter Analysis
TheThe
proposed LC-SRC
proposed resonant
LC-SRC converter
resonant is designed
converter to reduce electromagnetic
is designed inter-
to reduce electromagnetic
ference and harmonic
interference distortion distortion
and harmonic because thebecause
inductivethereactance of the
inductive inductor of
reactance is equal to
the inductor is
theequal
capacitive reactance
to the in the
capacitive resonant case,
reactance in thethereby
resonantgenerating the resonant
case, thereby frequency.
generating theInresonant
resonant frequency
frequency. operation,
In resonant the resonant
frequency tank impedance
operation, is minimized,
the resonant and the resonant
tank impedance is minimized,
circuit
andisthe
used to createcircuit
resonant a sinusoidal output
is used current.a In
to create addition, the
sinusoidal characteristic
output current.impedance
In addition, the
characteristic impedance of the resonant circuit is defined as Zr in Equation (24), and its
resonant angular frequency is defined as ω r in Equation (25)
s
Lr
Zr = (24)
Cr
of the resonant circuit is defined as Zr in Equation (24), and its resonant angular frequency
is defined as ωr in Equation (25)

Energies 2023, 16, 6877 Lr 14 of 34


Zr  (24)
Cr

1
r  √ 1 (25) (25)
ωr = L C
r Lrr Cr
As
Asshown
shownininFigure
Figure 15,15,
thethe
load resistor
load RL is
resistor RLconnected
is connected in series with with
in series the resonant
the resonant
tank
tanktotoform
forma aseries
series resonant
resonantcircuit with
circuit an inductor
with an inductorLr, aLcapacitor Cr, and
r , a capacitor Cr ,aand
resistor RL. RL .
a resistor
IfIfthe
thefrequency
frequencyofofthe thesecondary-side
secondary-side output square
output wave
square voltage
wave is fs, the
voltage is fsseries resonant
, the series resonant
circuit
circuithas
hasa afiltering
filtering function, allowing
function, only
allowing the the
only fundamental
fundamental current to pass.
current In addition,
to pass. In addition,
the
theturns ratioisisn.n.
turnsratio

1
j Lr jCr

ILr
 
nVL
Z eq RL VH
 

Figure
Figure15.
15.Equivalent
Equivalentcircuit based
circuit on on
based phasor diagram.
phasor diagram.

The
Theequivalent
equivalentimpedance
impedanceZeqZofeq the resonant
of the circuit,
resonant viewed
circuit, from from
viewed the input voltage
the input voltage
to the right, is shown in Equation (26)
to the right, is shown in Equation (26) asas

1
ZZeqeq=RR
L j(Lr r − 1) )
L + j ( ωL (26) (26)
CωC
r r

The
Themagnitude
magnitudeand phase
and phase ZeqZare
of of shown
eq are in Equations
shown (27) and
in Equations (27) (28),
and respectively:
(28), respectively:
s
1 2
Z eq  RL 2 2( Lr  )1 2 (27)
Zeq = R L + (ωL rC
−r ) (27)
ωCr

ωLr −1 ωC 1
θ Zeq = θv − θi = tan−1 (Lr  r
) (28)

RC (28)
 Zeq   v   i  tan (
1 L r )
RL
2.2.2. Voltage Gain
The ratio of the output voltage VH to the input voltage nVL in a series resonant circuit
2.2.2. Voltage Gain
called voltage gain, is shown in Equation (28):
The ratio of the output voltage VH to the input voltage nVL in a series resonant circuit
called voltage gain, is shown in V
Equation
H (28): RL
= q (29)
nVL 2
VH R L 2 + R(ω L −
L s r
1
ωs Cr )

nVL 1 (29)
 s2π
RL 2ωs (= Lr fs )2 (30)
 s Cr
The quality factor Q is defined by Equation (31):

s  2 fs q
Lr (30)
ωr L r 1 Cr
Q= = = (31)
RL ωr R L Cr RL

1
ωr = 2π f r = √ (32)
Lr Cr
Lr
 r Lr 1 Cr (31)
Q  
RL  r RL Cr RL

Energies 2023, 16, 6877 1 15 of 34


 r  2 f r  (32)
Lr Cr
In Equation
In (32),frfrisisthe
Equation(32), theresonant frequency
resonant of the
frequency series
of the resonant
series circuit,
resonant so that
circuit, so the
that the
voltage gain can be expressed as Equation (33):
voltage gain can be expressed as Equation (33):
VH 1
VH  1
nV L = q 2 r s 2 (33) (33)
nVL 1 1 Q
+ Q(2 ( ωr− ωs ))2
 ωs s ωr r
As shown
shownininFigure
Figure 16,16,
the the
relationship
relationshipbetween the output–input
between ratio andratio
the output–input the nor-
and the
malized frequency
normalized of the
frequency ofseries resonant
the series circuitcircuit
resonant is plo ised by different
plotted quality quality
by different factors of Q. of
factors
Under
Q. given
Under values
given of VofL and
values ωs, the
VL and ω s , higher the quality
the higher factor
the quality Q, the
factor Q,smaller the voltage
the smaller the voltage
across the
across the load
load resistor,
resistor,sosoreducing
reducingthe theinductance
inductance Lr Land increasing
r and the the
increasing capacitance C r Cr
capacitance
can reduce
can reduce the
the quality factorQQtotoincrease
qualityfactor increase thethe
output
outputvoltage andand
voltage keep it close
keep to one.
it close to one.

0.8

0.6
VH
nVL
0.4 Q=0.34
Q=0.6
Q=1.0
0.2
Q=2.0
Q=4.0
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
s
r
Figure 16.
Figure 16.Relationship
Relationship between the voltage
between input–output
the voltage ratio and
input–output normalized
ratio frequencyfrequency
and normalized of the seriesof the
resonant
series circuit. circuit.
resonant

2.2.3. Operating
2.2.3. OperatingPrinciples
Principles
The backward
The backwardboost-type
boost-typepush–pull
push–pullconverter, shownshown
converter, in Figurein14, consists
Figure 14,ofconsists
a push– of a
pull converter
push–pull and a full-bridge
converter rectifier.rectifier.
and a full-bridge The switching
The switching fs of the resonant
frequencyfrequency fs of the con-
resonant
verter is operated
converter at the at
is operated series
theresonant
series resonant fr so that the
frequencyfrequency fr resonant
so that the circuit is reviewed
resonant circuit is
as a high-frequency
reviewed filterer, and filterer,
as a high-frequency after thisand
filter, the this
after full-bridge rectifier
filter, the is used rectifier
full-bridge to generate is used
the required DC output voltage. The switches S 5 and S 6 have duty cycles
to generate the required DC output voltage. The switches S5 and S6 have duty cycles of of nearly 0.5, and
only the0.5,
nearly waveforms
and onlywithin 0.5 Ts are considered.
the waveforms within 0.5Figures
Ts are 17 and 18 show
considered. the corresponding
Figures 17 and 18 show
illustrated waveforms and the accompanying current flows,
the corresponding illustrated waveforms and the accompanying current respectively. There are respectively.
flows, six op-
erating modes.
There are six operating modes.
Mode 1: [t0 ≤ t ≤ t1 ]
As shown in Figures 17 and 18a, vTS is positive, equal to nVL . During this blanking
time, the magnetizing current iLm charges the parasitic capacitance of the switch S6 to
double the input voltage VL and discharges the parasitic capacitance of the switch S5 to
zero; the body diode of S5 is conducted, and then S5 can be turned on with ZVS. The
current in the secondary-side magnetizing inductance Lm called iLm , increases linearly as in
Equation (34):
i Lm (t) = i Lm (t0 ) + (v TS /Lm )t (34)
Energies 2023,
Energies 16, 6877
2023, 16, 6877 17 of
17 of 35
35
Energies 2023, 16, 6877 16 of 34

vgs
gs55

vgs
gs66

vTS
TS

iss
iLm
Lm
0

ioo

0
t00 t11 t22 t33 t44 t55 t66
Figure 17. Illustrated
Figure 17. Illustratedwaveforms.
waveforms.

iiss + Lr _
vvLr + vvCrCr _ iiss + Lr _
vvLr + vvCrCr _
iioo
iioo
iiLm
Lm LLrr Cr
C iiLm
Lm LLrr Crr
C
+ r
+ + +
vvTS LLmm RL
R vvHH vvTS LLmm RL
R vvHH
_
TS L
_ _
TS L
_

(a)
(a) (b)
(b)

iiss + vvLrLr _ + vvCrCr _ iiss _ vvLr


Lr
+ _ vvCrCr +
iioo iioo
iiLm iiLm
+
Lm
LLrr Cr
Cr + _ Lm
LLrr Cr
Cr +
vvTS LLmm RL
R vvHH vvTS
TS
LLmm RL
R vvHH
_TS L
_ L
_
+

(c)
(c) (d)
(d)

iiss _ vvLrLr + _ vvCrCr + iiss _ vvLrLr + _ vvCrCr +


iioo iioo
iiLm iiLm
_ LLrr Cr _ LLrr Cr
Lm Lm
C C
r
+ r
+
vvTS
TS
RL vvHH vvTS
TS RL vvHH
LLmm R LLmm R
+
L
_ +
L
_

(e)
(e) (f)
(f)

18. Current
Figure 18.
Figure Current flow:
flow:(a)
(a)Mode
Mode1;1;(b)
(b)Mode
Mode2;2;(c)(c)Mode
Mode3; 3;
(d)(d)
Mode 4; (e)
Mode Mode
4; (e) 5: (f)
Mode Mode
5: (f) 6. 6.
Mode
Energies 2023, 16, 6877 17 of 34

Mode 2: [t1 ≤ t ≤ t2 ]:
As shown in Figures 17 and 18b, vTS is still positive. During this blanking time, the
voltage across the switch S6 is double the input voltage VL . Since the switch S5 is turned
with ZVS at t1 , the input voltage VL is applied to the primary-side winding Np1 , and the
corresponding duration is about one-half of the switching cycle. During this mode, iLm is
negative and linearly rising, and the power is transferred through the transformer to the
DC output on the secondary side. Thus, the voltage across the resonant capacitor Cr , called
vCr , is expressed by Equation (35), the voltage across the resonant inductor Lr , called vLr , is
expressed by Equation (36), the sinusoidal current io is expressed by Equation (37), and the
secondary-side current is is expressed by Equation (38). At t = t2 , this mode ends iLm = 0,
proceeding to Mode 3:
vCr (t) = vCr (t1 ) cos ωr (t − t1 ) (35)
v Lr (t) = (v TS − v H ) − vCr (t1 ) cos ωr (t − t1 ) (36)
[v TS − v H − vCr (t1 )]
io (t) = sin ωr (t − t1 ) (37)
Zr
is (t) = io (t) + i Lm (t) (38)
Mode 3: [t2 ≤ t ≤ t3 ]:
As shown in Figures 17 and 18c, the converter operation in this mode is the same
as that in Mode 2 except that iLm is positive and linearly rising, and once the switch S5 is
turned off with relatively low current, proceeds to Mode 4. During Mode 3, iLm is linearly
falling as in Equation (39):
i Lm (t) = (v TS /Lm )t (39)
Mode 4: [t3 ≤ t ≤ t4 ]:
As shown in Figures 17 and 18d, vTS is negative and equal to −nVL , so iLm is linearly
falling. During this blanking time, the magnetizing current iLm charges the parasitic
capacitance of the switch S5 to double the input voltage VL and discharges the parasitic
capacitance of the switch S6 to zero. If the body diode of S6 is conducted, then S6 can
be turned on with ZVS. Once the switch S6 is turned on, this mode proceeds to Mode 5.
During this mode, the calculation for iLm linearly falling is expressed by Equation (40) as

i Lm (t) = i Lm (t3 ) − (v TS /Lm )t (40)

Mode 5: [t4 ≤ t5 ]:
As shown in Figures 17 and 18e, vTS is still negative. During this blanking time, the
voltage across the switch S5 is double the input voltage VL . Since the switch S6 is turned
with ZVS at t4 , the input voltage VL is applied to the primary-side winding Np2 , and the
corresponding duration is about one-half of the switching cycle. During this mode, iLm is
positive and linearly falling, and the power is transferred through the transformer to the
DC output on the secondary side. Thus, the voltage across the resonant capacitor Cr called
vCr is expressed by Equation (41), the voltage across the resonant inductor Lr is called vLr , is
expressed by Equation (42), the sinusoidal current io is expressed by Equation (43), and the
secondary-side current is is expressed by Equation (44). At t = t2 , this mode ends iLm = 0,
proceeding to Mode 3:
vCr (t) = vCr (t4 ) cos ωr (t − t4 ) (41)
v Lr (t) = (−v TS − v H ) − vCr (t4 ) cos ωr (t − t4 ) (42)
[−v TS − v H − vCr (t4 )]
io (t) = sin ωr (t − t4 ) (43)
Zr
is (t) = io (t) + i Lm (t) (44)
Mode 6: [t5 ≤ t ≤ t0 + Ts ]:
As shown in Figures 17 and 18f. The converter operation in this mode is the same as
in Mode 5 except that iLm is negative and linearly falls once the switch S6 is turned off with
Energies 2023, 16, 6877 18 of 34

a relatively low current, operating in Mode 1. During this mode, the calculation for iLm is
linearly falling as expressed by Equation (45):

i Lm (t) = (−v TS /Lm )t (45)

3. Design Procedure for Bidirectional Converter


In the designing process for the forward buck-type forward energy-transferring mode,
the high-voltage DC bus was defined as the input voltage, and for the boost-type backward
energy-transferring mode, the low-voltage DC power supply created by the storage system
was defined as the output voltage. Therefore, the first step was the design of the forward
buck-type converter, followed by the design of the backward boost-type converter. Finally,
the values of the commonly used components of these two modes were adjusted to meet
the required specifications for the bidirectional operation.

3.1. Forward Converter Design


3.1.1. Transformer Turns Ratio Determination
The turns ratio of the transformer was calculated when the voltage gain M is 1 un-
der the normal input condition. Therefore, the turns ratio should satisfy the following
Equation (46):
V
n = M × H_nom at M = 1 (46)
VL_nom
where VH_nom is the nominal input voltage, and VL_nom is the nominal output voltage.

3.1.2. Magnetizing Inductance Lm Design


Since the switch loss is related to the magnetizing inductance Lm , the larger the
magnetizing inductance is, the smaller the on-state loss. In addition to the turn-on loss,
the turn-off loss also depends on the turn-off current, which is equal to the magnetizing
current iLm when the switching frequency is less than or equal to the resonance frequency,
so a larger excitation inductance Lm can reduce the turn-off loss. In addition, the dead time
needs to be increased to ensure ZVS. How to fully discharge the MOSFET’s Coss junction
capacitance during the dead time to secure ZVS condition is shown in Equation (47), where
the magnetizing current iLm at the end of the dead time is equal to the peak magnetizing
current iLm,peak :
i Lm,peak × tdead = 2 × Ceq × VH_nom (47)
Also, iLm can be expressed by Equation (48):

VH_nom × T
i Lm = (48)
4 × Lm

where T is the switching period equal to the resonant period, tdead is the time interval under
the condition that two switches are both in the off state, Ceq is the output capacitance of the
MOSFET, and VH_nom is the DC input voltage of the LLC converter. From Equation (48),
Equation (49) should be satisfied as

T × tdead
Lm < (49)
8 × Ceq

3.1.3. Determining Resonant Circuit Equivalent Load Resistance Rac


As the nominal output voltage and load are determined, the equivalent AC load
resistance Rac on the secondary side of the transformer is defined in Equation (50) as

n 2 V
R ac = 8 × ( ) × ( L_nom ) (50)
π IL_nom
Energies 2023, 16, 6877 19 of 34

3.1.4. Designing Resonant Inductance Lr and Capacitance Cr


To achieve load regulation over the entire operating range, the design must satisfy the
values of Q and λ (λ = Lr /Lm ) for the maximum voltage gain. Figure 6 shows that the lower
the value of Q is, the higher the maximum voltage gain, whereas in Figure 7, it is evident
that the higher the value of λ is, the higher the maximum voltage gain. For a given value of
the resonant frequency fr , increasing λ means decreasing the magnetizing inductance Lm ,
which increases the circulating current. Therefore, there is a compromise between the range
of the available voltage gain and the conduction losses. Once the magnetizing inductance
Lm is chosen, the relationship between the values of Q and λ, as defined by Equation (51),
can be calculated as
Q 2 × π × fr
= × Lm (51)
λ R ac
Therefore, the ratio of Q to λ was also determined for the designed magnetizing
inductor Lm . A relatively large λ and a relatively small Q are usually preferred to ob-
tain a relatively wide switching frequency operating range, and a value of λ between
0.25 and 0.1 is usually recommended.

Lr = λ × L m (52)

The value of Lr can be obtained based on Equation (52), and substituting this value
into Equation (53) obtains the value of Cr as

1
Cr = (53)
(2 × π × f r )2 × Lr

The value of Q can be obtained by substituting Equations (50), (52) and (53) into
Equation (54) as √
Lr /Cr
Q= (54)
R ac

3.1.5. Transformer T Design


The primary-side and secondary-side turns, because of the output voltage being
clamped, can be easily deduced from the primary-side turns Np as in Equation (55)

VL_nom
Np = (55)
4 × f r × Bm × Ae

where VL_nom is the nominal DC output voltage, Bm is the maximum flux density, and Ae is
the magnetic core area.
Since the Ns is the turns ratio n times Np , based on Equation (56), the turns of Ns can
be obtained by
Ns = n × Np (56)

3.2. Backward Converter Design


Because the topology proposed in this paper belongs to the bidirectional DC–DC
converter, the circuit operations of the two converters use the same resonant circuit. Thus,
the design of the two components should have the same parameters, but because of the
different topologies, the design of the component parameters should comply with the
established specifications to achieve a compromise in design. Since the detailed design
of the forward buck-type LLC resonant converter is already explained, the values of its
components have been designed to ensure a wide input voltage range. The following is the
parameter design and calculation of a push–pull resonant converter. Since the backward
boost-type push–pull resonant converter is mainly operated at the resonant point, the
output voltage modulation was controlled by the PWM strategy. The maximum duty cycle,
Energies 2023, 16, 6877 20 of 34

called Dmax , was chosen to be less than 0.5, so the turns ratio n of the transformer is given
in Equation (57):
VH_nom
n= (57)
2 × VL_nom × Dmax
The backward boost-type push–pull resonant converter is supplied with an appropri-
ate AC resistance after the rectifier, called Rac , at the nominal output voltage and load. This
resistance can be defined in Equation (58) as

8 VH_nom
R ac = (58)
π 2 IH_nom

In the design procedure, choosing the switching frequency fs equal to the resonant
frequency fr was adopted. As shown in Figure 16, choosing a smaller Q curve can achieve a
smoother curve of the voltage-boosting gain.
Next, the values of the resonant components can be calculated, and hence, the values
of Lr and Cr can be solved using Equations (59) and (60)

1
Cr = (59)
2π f r R ac Q

1
Lr = (60)
(2π f r )2 Cr
From Equation (58) to (60) mentioned above, the validation of the backward boost-type
push–pull converter is similar to that of the forward buck-type LLC converter with respect
to important components. Therefore, it can be shown that the same set of components of
the resonant circuit can be used for different control methods on different structures of the
bidirectional converter.

4. Battery Charge/Discharge Control Method


At present, battery charging methods, including constant-current (CC) mode, constant-
voltage (CV) mode, constant-current constant-voltage (CC–CV) mode, and pulse mode,
are commonly used. Among these methods, the CC–CV mode is the most preferable.
The control framework of the proposed bidirectional LLC full-bridge resonant converter
for charging and discharging modes is shown in Figure 19 and consists of two main
parts. The first part comprises the power converter based on the full-bridge LLC resonant
circuit, whereas the second part is built by the digital control circuit based on the dsPIC
microcontroller. The first part was explained in detail earlier, so this section focuses on
the design of the digital controller and the software-planning process. For the forward
buck-type energy transfer, the voltage and current of the power converter were detected so
that a pulse frequency modulation (PFM) signal to control the switching frequency of the
switches S1 to S4 was created. At the same time, the switches S5 and S6 were turned off
so that the low-voltage output was rectified by the body diodes of the switches S5 and S6 .
For the backward boost-type energy transfer, a pulse width modulation (PWM) signal was
generated so that the duty cycles of the switching frequency for S5 and S6 were controlled.
At the same time, the switches S1 to S4 were turned off so that the high-voltage output was
rectified by the body diodes of the switches S1 to S4 .

4.1. Software Planning Process


The MPLAB X IDE v6.00 software planning process is mainly divided into three
parts. The first part is the main program shown in Figure 20 as a block diagram. In
this part of the code, all the primary system operations and peripheral interfaces were
initialized at the beginning. The switching operation of the forward buck charging behavior
belongs to the PFM frequency control of the LLC full-bridge converter, which was designed
to use one set of PWM1 channels containing two signals, PWM1H and PWM1L. The
to important components. Therefore, it can be shown that the same set of components of the
resonant circuit can be used for different control methods on different structures of the bi-
directional converter.

4. Ba ery Charge/Discharge Control Method


Energies 2023, 16, 6877 21 of 34
At present, battery charging methods, including constant-current (CC) mode, constant-
voltage (CV) mode, constant-current constant-voltage (CC–CV) mode, and pulse mode, are
commonly
PWM1H used.
drives theAmong these methods,
high-voltage-side switchthe
S1 CC–CV mode is the most
of the secondary-side forearmpreferable. The con-
half-bridge
leg and the low-voltage-side switch S4 of the secondary-side rear-arm half-bridge leg. charg-
trol framework of the proposed bidirectional LLC full-bridge resonant converter for
ing and drives
PWM1L discharging modes is shown
the low-voltage-side in Figure
switch 19 secondary-side
S2 of the and consists offorearm two main parts. The first
half-bridge
partand
leg comprises the power converter
the low-voltage-side based
switch S3 of on the full-bridge
the secondary-side LLC half-bridge
rear-arm resonant circuit,
leg. Thewhereas
the second part is built by the digital control circuit based on the dsPIC microcontroller. The
backward boost discharge behavior belongs to the PWM duty cycle control for the push–
firstconverter
pull part was designed
explained to in
usedetail earlier,
one set so this
of PWM3 section
channels focuses on
containing twothe design
signals, of the digital
PWM3H
and PWM3L, which drives the primary-side switches S 5 and S
controller and the software-planning process. For the forward buck-type energy to
6 , respectively. According transfer,
the literature [30], since the voltage source is embedded in the DC grid, the converter will
the voltage and current of the power converter were detected so that a pulse frequency mod-
be unstable when the converter is controlled under the constant voltage output. Therefore,
ulation (PFM) signal to control the switching frequency of the switches S1 to S4 was created.
the discharge mode proposed in this paper sets the battery to be discharged in a constant
At the same
current modetime, the switches
according S5 andvoltage
to the battery S6 weretoturned
avoid off
theso that the
battery low-voltage
discharging output
under a was
rectified
high by the
current at a body diodes
low state of the(SOC),
of charge switches S5 andinSreducing
resulting 6. For thethe backward boost-type energy
battery temperature
transfer,
and a pulse
increasing thewidth modulation
battery life. When(PWM) signal was
the converter was generated
operated insothe that the duty
forward cycles of
buck
the switching
charging mode,frequency
the backgroundfor S5 and
loopSwas
6 were controlled.
used At the
to determine thesame
statustime, switches S1 to
theconstant
of the
S4 weremode/constant
current turned off so that voltagethemode
high-voltage
and detectoutput wasstatus.
the fault rectified
When bythetheconverter
body diodes
was of the
switches to
switched S1the
to Sbackward
4. boost discharge mode, the background loop detected the battery
voltage to set the reference value for the constant current output and the fault status.

 
vds1 vds 3 Forward Buck-Type Energy Transfer
S1 
S3 

Lr
v1
N p2 ip
 iLr i
Lm
VH CH
 Cr Lm Ns
v2 N p1 
i p5 ip6 VL
    CL 
vds 2 vds 4 vds 5 vds 6
   
S2 S4 Backward Boost-Type Energy S5 S6
Transfer

S 2 & S3 S1 & S4 S5 S6

PFM PWM
Gate Drivers Gate Drivers

Voltage PWM1~3 Iref Current Voltage


CC Mode Sensor Sensor
Sensor

Gi ( s) 
PWM
Limiter
Generator
Gv ( s ) 

dsPIC33EP16GS502 CV Mode Vref

Figure 19.
Figure 19. System configuration
System forfor
configuration thethe
bidirectional LLCLLC
bidirectional full-bridge resonant
full-bridge converter
resonant charge/dis-
converter
charge.
charge/discharge.
ducing the ba ery temperature and increasing the ba ery life. When the converte
operated in the forward buck charging mode, the background loop was used to dete
the status of the constant current mode/constant voltage mode and detect the fault s
When the converter was switched to the backward boost discharge mode, the backgr
Energies 2023, 16, 6877 loop detected the ba ery voltage to set the reference value for the constant
22 of current
34 o
and the fault status.

START

Initializations

Start Command
1. Forword
2. Backword

Backword Forword

Soft Start Soft Start

Background Loop Background Loop


1.Check CCM 1.Check CCM/CVM
2.Check Fault Status 2.Check Fault Status

Figure 20. Block diagram of the main program.


Figure 20. Block diagram of the main program.
4.2. Forward Charge Mode
The second part of the code is the flowchart of the CC–CV mode control software for
the forward buck LLC full-bridge resonant converter charging mode, as shown in Figure 21.
The current sensor measured the battery charging current Ich and subtracted the battery
charging current Ich from the reference current Iref to obtain the error value. After this, a
proportional integral controller was used to calculate the compensation value for this error,
and a PFM signal was obtained from the compensation value to drive the switches S1 to
S4 to realize constant current charging. When the converter operated in constant current
charging mode, the DSP digital control circuit continued to detect the battery voltage.
If the battery voltage reached the preset value of the constant voltage mode VCVM , the
converter switched to the CV charging mode. Therefore, the voltage sensor measured
the battery voltage VL and obtained an error value by subtracting the battery voltage VL
from the reference voltage Vref . Afterward, a proportional integral controller was used
to calculate the compensation value for this error, and a PFM signal was obtained from
the compensation value to drive the switches S1 to S4 to realize output constant voltage
charging. When the converter was switched to CV charging mode, the DSP digital control
circuit continued to measure the battery charging current Ich . When the battery charging
current was less than or equal to the preset battery cutoff current Icut_off , the charging
process was completed, and the DSP digital control circuit sent a termination signal to the
switches S1 to S4 to turn off the converter.
for this error, and a PFM signal was obtained from the compensation value to driv
switches S1 to S4 to realize output constant voltage charging. When the converter
switched to CV charging mode, the DSP digital control circuit continued to measur
battery charging current Ich. When the battery charging current was less than or equal t
Energies 2023, 16, 6877 preset battery cutoff current Icut_off, the charging process was completed, and the
23 of 34 DSP d
control circuit sent a termination signal to the switches S1 to S4 to turn off the converter

Forward
Charge Mode

Measure Battery
Volt VL

VL> VCVM
no yes

CC_Mode CV_Mode

Measure Battery Measure Battery


Volt VL and Ich Volt VL and Ich
yes
no no
DSP control with DSP control with
Gi(s) Loop Gv(s) Loop

VL> VCVM Icharge< Icut_off

yes

Charging
Completed
Figure 21. Flowchart
Figure 21. Flowchartof
ofba erycharging.
battery charging.
4.3. Forward-Mode DSP Control ISR
Figure 22 shows the flowchart of forward-mode DSP control ISR, where “ISR” is
an abbreviation of “interrupt service routine”. The program entered the ADC interrupt
subroutine to obtain information on voltage and current when the interrupt was triggered.
Through try and error, the proportional gain kp and integral gain ki in the constant voltage
mode (CVM) were set at 0.1 and 0.05, respectively, whereas the values of kp and ki in the
constant current mode (CCM) were set at 0.1 and 0.06, respectively. At the same time,
the corresponding periods in CCM and CVM were calculated out and compared together.
After this, the period in CVM, called V_Period, was compared with the period in CCM,
called I_Period, and the smaller one was chosen to control the switches S1 to S4 .
routine to obtain information on voltage and current when the interrupt was triggered.
Through try and error, the proportional gain kp and integral gain ki in the constant voltage
mode (CVM) were set at 0.1 and 0.05, respectively, whereas the values of kp and ki in the
constant current mode (CCM) were set at 0.1 and 0.06, respectively. At the same time, the
corresponding periods in CCM and CVM were calculated out and compared together. After
Energies 2023, 16, 6877 24 of 34
this, the period in CVM, called V_Period, was compared with the period in CCM, called I_Pe-
riod, and the smaller one was chosen to control the switches S1 to S4.

Forward Mode
DSP Control_ISR

ADC Interupt
Measure Battery
Volt VL and Idis

Cal.
CVM PIV_Period
CCM PII_Period

V_Period
<I_Period
Yes No

PWM_Period=V_Period PWM_Period=I_Period

PWM_Period=PWM_Period

Context Restore

Exit

Figure 22.
Figure 22. Flowchart
Flowchart of
offorward-mode
forward-modeDSP
DSPcontrol ISR.
control ISR.

4.4. Backward Discharge Mode


The third part of the code is the flowchart of the CC control software for the backward
boost push–pull converter discharging mode, as shown in Figure 23. First, the voltage
sensor measured the battery voltage VL , and the reference discharge current Idis_ref was
set according to the battery voltage VL . At that time, the converter entered the CC mode,
the current sensor measured the battery discharge current Idis , and subtracted the refer-
ence current Idis_ref from the battery discharge current Idis to obtain the error value. A
proportional integral controller was used to calculate the compensation value for this error
value, and then the duty cycles of the switching frequency were obtained according to the
compensation value to drive the switches S5 and S6 to realize constant current discharge.
Simultaneously, the DSP digital control circuit detected the battery voltage VL and then
determined whether the battery voltage was less than the battery cutoff voltage Vcut_off .
If the battery voltage VL equaled the battery cutoff voltage Vcut_off , the discharge process
was terminated. In this case, the DSP digital control circuit stopped sending signals to the
switches S5 and S6 , thus stopping the converter and preventing damage to the battery.
pensation value to drive the switches S5 and S6 to realize constant current discharge. S
ultaneously, the DSP digital control circuit detected the ba ery voltage VL and then de
mined whether the ba ery voltage was less than the ba ery cutoff voltage Vcut_off. If
ba ery voltage VL equaled the ba ery cutoff voltage Vcut_off, the discharge process was
Energies 2023, 16, 6877 minated. In this case, the DSP digital control circuit stopped sending25 signals
of 34 to
switches S5 and S6, thus stopping the converter and preventing damage to the ba ery

Backward
Discharge Mode

CC_Mode

Measure Battery
Volt VL

Measure Battery Volt


VL to set discharge
current Idis_ref

Measure Battery
Volt VL and Idis

no
DSP control with
Gi(s) Loop

VL< Vcut_ off

yes

Stop
Discharging
FigureFigure
23. Flowchart ofofbabattery
23. Flowchart ery discharge.
discharge.

4.5. Backward-Mode DSP Control ISR


Figure 24 shows the flowchart of backward-mode DSP control ISR. The program
entered the ADC interrupt subroutine to obtain information on voltage and current when
the interrupt was triggered. Via try and error, the proportional gain kp and integral gain ki
in CCM were set at 0.15 and 0.01, respectively. After this, the duty in CCM, called I_Duty,
was chosen to control the switches S5 and S6 .
Figure 24 shows the flowchart of backward-mode DSP control ISR. The pro
tered the ADC interrupt subroutine to obtain information on voltage and curr
the interrupt was triggered. Via try and error, the proportional gain kp and integ
Energies 2023, 16, 6877 in CCM were set at 0.15 and 0.01, respectively. After this, the duty in26CCM,
of 34 calle
was chosen to control the switches S5 and S6.

Backward Mode
DSP Control_ISR

ADC Interupt
Measure Battery
Volt VL and Idis

Cal.
CCM PII_Duty

PWM_Duty=I_Duty

PWM_Duty=PWM_DRV

Context Restore

Exit

Figure
Figure 24.24. Flowchart
Flowchart of backward-mode
of backward-mode DSP
DSP control ISR.control ISR.
5. Experimental Results
5. Experimental Results
First, the operating high-side voltage range of the bidirectional converter was deter-
mined First, the operating
to be between 360 V andhigh-side
410 V for thevoltage
forward range
buck modeof the bidirectional
fed from converter w
the high-voltage
mined to be between 360 V and 410 V for the forward buck mode fed from the h
DC bus, and the low-side voltage range was between 43 V and 52 V for the backward boost
mode fed from the low-voltage DC storage source. In this study, a sample 500 W bidi-
age DCfull-bridge
rectional bus, andresonant
the low-side
convertervoltage range was
was presented, and between 43ofVbidirectional
its capability and 52 V for the
boosttransfer
power modebetween
fed fromthe the low-voltage
low-voltage DCthe
system and storage source.
high-voltage DC In
busthis
was study,
verified. a samp
bidirectional
The full-bridge
system and component resonantofconverter
specifications was
the converter are presented, and in
listed as described itsTable
capability
2. o
tional power transfer between the low-voltage system and the high-voltage DC
verified. The system and component specifications of the converter are listed as
in Table 2.
Energies 2023, 16, 6877 27 of 34

Table 2. System specifications and component specifications.


Energies 2023, 16, 6877 28 of 35
Parameter Symbol Specification
Low-side voltage VL 43~52 V
Table 2. System specifications and component specifications.
High-side voltage VH 360~410 V
Parameter
Output power Po Symbol Specification
100~500 W
Low-side voltage VL 43~52 V
Resonant frequency fr 125 kHz
High-side voltage VH 360~410 V
PFM switching frequency Fllc_s 96~160 kHz
Output power Po 100~500 W
Resonant frequency
PWM switching frequency Fpp_s fr 125125
kHzkHz
PFM
Dutyswitching
cycle frequency D Fllc_s 96~160 kHz
0.36~0.46
PWM switching frequency
Transformer turns ratio Np1 :Np2 :N Fpp_s
s
1254:4:36
kHz
Duty cycle D 0.36~0.46
Magnetizing inductance Lms 586 µH
Transformer turns ratio Np1:Np2:Ns 4:4:36
Leakage inductance
Magnetizing inductance Llk (Lr ) Lms 586114
µHµH
Leakage inductance
Resonant capacitance Cr Llk (Lr) 11414.1
µHnF
Resonant capacitance
Transformer core T1 Cr 14.1 nF (LP2930)
PC40
Transformer
Primary-side core
switches S1 , S2 , S3T, 1S4 PC40 (LP2930)
IPP60R120P7
Primary-side switches S1, S2, S3, S4 IPP60R120P7
Secondary-side switches S5 , S6 IPP200N15N3G
Secondary-side switches S5, S6 IPP200N15N3G
DSP microcontroller
DSP microcontroller DSP DSP dsPIC33EP16GS502
dsPIC33EP16GS502

5.1. Instrumentation
5.1. Instrumentation Configuration
Configuration
Figure 25
Figure 25 shows
showsthe
theinstrumentation
instrumentation configuration
configuration for for
the the
experimental setup,
experimental where
setup, where
High Volt Source
High Source(Model:
(Model: GWINSTEK
GWINSTEK PSWPSW 800-4.32) supplied
800-4.32) the voltage
supplied from 360from
the voltage to 410
360 to
V, Low
410 Volt Source
V, Low (Model:
Volt Source GWINSTEK
(Model: PSW 80-27)
GWINSTEK PSWsupplied
80-27)the voltage 43~52
supplied V, DC Elec-
the voltage 43~52 V,
tronic
DC Load (Model:
Electronic LoadChroma
(Model: 63308A)
Chromaprovided
63308A)the output
provided load,
theand Digitalload,
output Storage
andOSCDigital
(Model: OSC
Storage KEYSIGHT
(Model:DSOX4024)
KEYSIGHT was used to measure
DSOX4024) was usedthe voltage
to measureand current waveforms.
the voltage and current
Test Board is Test
waveforms. the proposed
Board is prototype circuit.
the proposed In addition,
prototype the measurement
circuit. In addition, condition was
the measurement
that Electronic
condition LoadElectronic
was that was set at the
LoadCVwas
modesetfor the forward
at the CV mode voltage-bucking
for the forward and backward
voltage-bucking
voltage-boosting
and operation.
backward voltage-boosting operation.

Figure 25.
Figure 25. Instrumentation
Instrumentationconfiguration forfor
configuration thethe
experimental setup.
experimental setup.

Figure 26
Figure 26shows
showsthe theproposed
proposed main power
main stagestage
power on theon
top side
the topand its and
side peripheral cir-
its peripheral
circuits, where Aux. Power mainly supplies the operating voltages of the circuit as
cuits, where Aux. Power mainly supplies the operating voltages of the circuit board, such board,
12 V for
such theVsecondary-side
as 12 drive circuit,
for the secondary-side 12 Vcircuit,
drive for the primary-side
12 V for thedrive circuit anddrive
primary-side 5 V for
circuit
the control
and 5 V forboard, dsPICboard,
the control Controller
dsPICis the control kernel
Controller of the circuit
is the control kerneloperation to measure
of the circuit operation
the voltage and current signals as well as to output the gate driving signals
to measure the voltage and current signals as well as to output the gate driving signals to drive the to
switches, L r/T1 is the transformer which integrates the resonant inductor, S1 to S4 are the
drive the switches, L /T is the transformer which integrates the resonant inductor, S to
r 1 1
Energies
Energies 2023, 16,16,
2023, 6877
6877
Energies 2023, 16, 6877 29
29 of
of 35
28 of 34
35

Ssecondary-side
secondary-side switches, SS55switches,
switches,
4 are the secondary-side and SS66 are
and areSthe
the primary-side
S6 are theswitches,
primary-side
5 and switches, V
VHH is
primary-side is the
the high
high voltage
switches, VH is out-
voltage out-
the high
put/input,
put/input,
voltage and V is the low
and VL is the and
L
output/input, voltage
low voltage
VL is theoutput/input.
output/input.
low voltage output/input.

Figure
Figure 26.
26. Proposed
Figure26. Proposed main
Proposed mainpower
main powerstage
power stageon
stage the
onon
the top
top
the side
side
top and
and
side its
its peripheral
and peripheral
its circuits.
circuits.
peripheral circuits.

Figure
Figure 27
Figure 27 shows
27 showsthe
shows theproposed
the proposedmain
proposed main
mainpower
power
power stage
stage on the
onon
stage bottom
thethe
bottom side and
sideside
bottom its
andandits peripheral
peripheral
its peripheral
circuits,
circuits, where
circuits, where Gate
where Gate Drivers_H
Gate Drivers_H
Drivers_Hand and Gate
andGate Drivers_L
GateDrivers_L
Drivers_L are the
areare individual
thethe
individual drive
drive
individual circuits
circuits
drive for
for the
circuits the
for the
secondary-side
secondary-side high-voltage
secondary-side high-voltage full-bridge
high-voltagefull-bridge
full-bridgeswitches
switches
switches and
and the primary-side
thethe
and primary-side push-pull
push-pull
primary-side push-pullswitches,
switches,
switches,
CC is
Crrris the
the resonant
is the resonant capacitor,
resonant capacitor,the
capacitor, theVolt
the VoltSensor
Volt Sensor
Sensoris the
is is isolated
thethe
isolated voltage
voltage
isolated detector
detector
voltage on
on the
detector onsecondary
the secondary
the secondary
side, and the Current Sensor is the current detector on the primary
side, and the Current Sensor is the current detector on the primary side. side.
side, and the Current Sensor is the current detector on the primary side.

Figure 27. Proposed main power stage on the bo om side and its peripheral circuits.
Figure 27. Proposed main power stage on the bo om side and its peripheral circuits.
Figure 27. Proposed main power stage on the bottom side and its peripheral circuits.
5.2. Forward
Forward Charge
5.2. Forward
5.2. ChargeMode
Charge Mode
Mode
The CC–CV
CC–CV charging
The CC–CV charging mode of the forward buck converter takes aa two-stage constant
The chargingmodemodeofofthe theforward
forward buck
buckconverter
converter takestakes two-stage constant
a two-stage constant
current
current charging.
charging. As
As shown
shown in
in Figure
Figure 28,
28, the
the blue
blue color
color is
is the
the constant
constant current
current charging
charging
current charging. As shown in Figure 28, the blue color is the constant current charging
curve.
curve. When
When the the low-side voltage was lower than 46 V,
V, the charging current was aa constant
curve. When the low-side
low-sidevoltage
voltagewas waslower
lowerthan 46 46
than the
V, thecharging
charging current waswas
current constant
a constant
current
current of
of 5
5 A.
A. When
When the
the low-side
low-side voltage
voltage exceeded
exceeded 46
46 V,
V, the
the charging
charging current
current was
was aa con-
con-
current
stant
of
current
5 A.
of
When
9.5 A. As
the low-side
shown in
voltage
Figure 23, the
exceeded
black color
46is
V,
the
the charging
low-side
current
voltage curve,
was a
stant
constantcurrent of
current 9.5 A.
of As
9.5 shown
A. As in
shownFigure
in 23, the
Figure black
23, thecolor is
black the low-side
color is the voltage
low-side curve,
voltage
and
and the voltage
theand
voltage increased
increased with
with the increase
the with
increase in charging time. When the
the low-side voltage
curve,
reached the voltage increased the in charging
increase in time. Whentime.
charging low-side
When the voltage
low-side
reached 5252 V,
V, it
it was
was charged
charged with
with constant
constant voltage,
voltage, and
and the
the charging
charging current
current started
started to
to de-
de-
voltage
crease. reached 52 V, it was charged with constant voltage, and the charging current started
crease.
to decrease.
As shown in Figure 29, the waveforms are measured under a high-side input voltage
DC bus of 390 V, the charging current is 5 A, the low-side voltage is 45 V, and the corre-
sponding power was 225 W. The yellow curve is the gate drive signals vgs1 and vgs4 for
the switches S1 and S4 , respectively; the green curve is the gate drive signals vgs2 and vgs3
for the switches S2 and S3 , respectively, and the blue curve is the voltage v2 , which is the
Charging Voltage

Energies 2023, 16, 6877 29 of 34


Charging Current

Low-Side Voltage (V)


Charging Current (A)
voltage across the switch S4 , called vds4 . From these waveforms, it can be seen that the
Energies 2023, 16, 6877 switch S4 had a ZVS turn-on. In addition, the switching frequency fs operated at 30 139.3
of 35 kHz,
larger than the resonance frequency
C.C. Mode fr (125 kHz). Accordingly, the resonant inductance
current iLr of the red curve was larger than that of iLm at the turn-off of the switch S1 .

Charging Voltage
CV Mode

Charging Current
Charging time (min)

Low-Side Voltage (V)


Charging Current (A)

Figure 28. Forward charging mode: charging voltage (black) and charging current (blue).

As shown in Figure 29, the waveforms are measured under a high-side input voltage
DC bus of 390 V, the charging current is 5 A, the low-side voltage is 45 V, and the corre-
C.C. Mode
sponding power was 225 W. The yellow curve is the gate drive signals vgs1 and vgs4 for the
switches S1 and S4, respectively; the green curve is the gate drive signals vgs2 and vgs3 for
the switches S2 and S3, respectively, and the blue curve is the voltage v2, which is the volt-
age across the switch S4, called vds4. From these waveforms, CV Modeit can be seen that the switch

S4 had a ZVS turn-on. In addition, the switching frequency fs operated at 139.3 kHz, larger
than the resonance frequency fr (125
Charging kHz). Accordingly, the resonant inductance current
time (min)
iLr of the red curve was larger than that of iLm at the turn-off of the switch S1.
Figure
Figure28.28.Forward
Forwardcharging mode:
charging mode:charging
chargingvoltage (black)
voltage and and
(black) charging current
charging (blue).(blue).
current

2μs
As shown in Figure 29, the waveforms are measured under a high-side input voltage
DC bus of 390 V, the charging current is 5 A, the low-side voltage is 45 V, and the corre-
vgs1
sponding
vgs 4 power was 225 W. The yellow curve is the gate drive signals vgs1 and vgs4 for the
10V
switches S1 and S4, respectively; the green curve is the gate drive signals vgs2 and vgs3 for
vgs 2switches S2 and S3, respectively, and the blue curve is the voltage v2, which is the volt-
the
vgs 3 across the switch S4, called vds4. From these waveforms, it can
age 10V be seen that the switch

S4 had a ZVS turn-on. In addition, the switching frequency fs operated at 139.3 kHz, larger
than the resonance frequency fr (125 kHz). Accordingly, the resonant inductance current
iLr
iLr of the red curve was larger than that of iLm at the turn-off of the
2A switch S1.

2μs
ZVS

vgsv1
2
vgs 4 10V
200V

vgs 2
vgs 3
Figure 29. Forward 10V current of 5 A: vgs1 and vgs4
Figure 29. Forwardcharging
chargingmodemodeunder
under output voltage
output of 44
voltage of V
44and
V and current of 5 A: vgs1 and vgs4
(yellow); vgs2 and vgs3 (green); iLr (red); v2 (blue).
(yellow); vgs2 and vgs3 (green); iLr (red); v2 (blue).
iLr
As
As shown
shownininFigure
Figure30,30,the
thewaveforms
waveformsareare
measured
measuredunder a high-side
under inputinput
a high-side voltage
voltage
2A
DC bus of 390 V, the charging current was 9.5 A, the low-side voltage is 48 V, and the corre-
DC bus of 390 V, the charging current was 9.5 A, the low-side voltage is 48 V, and the
sponding power was 450 W. The yellow curve is the gate drive signals vgs1 and vgs4 for the
corresponding power was 450ZVS W. The yellow curve is the gate drive signals vgs1 and vgs4
switches S1 and S4, respectively; the green curve is the gate drive signals vgs2 and vgs3 for the
for the switches S1 and S4 , respectively; the green curve is the gate drive signals vgs2 and
switches S2 and S3, respectively, and the blue curve is the voltage v2, which is the voltage
vvgs3
2 for the switches S2 and S3 , respectively, and the blue curve is the voltage v2 , which
across the switch S4, called vds4. From these waveforms, it can be seen that the switch S4 had
is the voltage across the switch S4 , called vds4 . From these 200V waveforms, it can be seen
a ZVS turn-on. In addition, the switching frequency fs operated at 110.3 kHz, which is lower
that the switch S4 had a ZVS turn-on. In addition, the switching frequency fs operated
Figure 29.kHz,
at 110.3 Forward
whichcharging mode
is lower under
than theoutput voltagefrequency
resonance of 44 V andfrcurrent vgs1 and vgs4 the
of 5 A:Accordingly,
(125 kHz).
resonantvgs2
(yellow); and vgs3 (green);
inductance iLr (red);
current iLr ofv2the
(blue).
red curve was larger than that of iLm at the turn-off of
the switch S1 .
As shown in Figure 30, the waveforms are measured under a high-side input voltage
DC bus of 390 V, the charging current was 9.5 A, the low-side voltage is 48 V, and the corre-
sponding power was 450 W. The yellow curve is the gate drive signals vgs1 and vgs4 for the
switches S1 and S4, respectively; the green curve is the gate drive signals vgs2 and vgs3 for the
switches S2 and S3, respectively, and the blue curve is the voltage v2, which is the voltage
across the switch S4, called vds4. From these waveforms, it can be seen that the switch S4 had
a ZVS turn-on. In addition, the switching frequency fs operated at 110.3 kHz, which is lower
Energies 2023, 16, 6877 31 of 35
Energies 2023, 16, 6877 31 of 35

than the resonance frequency fr (125 kHz). Accordingly, the resonant inductance current iLr
Energies 2023, 16, 6877 than
of thethe
redresonance
curve wasfrequency
larger thanfr (125 kHz).
that of iLm atAccordingly, thethe
the turn-off of resonant
switch inductance
S1. current iLr30 of 34
of the red curve was larger than that of iLm at the turn-off of the switch S1.

2μs
2μs

vgs1
vvgsgs41
10V
vgs 4
10V
vgs 2
vvgsgs32 10V
vgs 3 10V

iLr
iLr 2A
2A

ZVS
v2 ZVS
v2 200V
200V

Figure 30. Forward power flow under output voltage of 48 V and current of 9.5 A: vgs1 and vgs4 (yel-
Figure
low); vgs230.
Figure and
30. Forward power
vgs3 (green);
Forward iLrflow
power under
(red);
flow output
v2under
(blue). voltage
output of 48 V
voltage ofand current
48 V of 9.5 A:ofvgs1
and current A: vvgs4
9.5and (yel-
gs1 and vgs4
low); vgs2 and vgs3 (green); iLr (red); v2 (blue).
(yellow); vgs2 and vgs3 (green); iLr (red); v2 (blue).
As shown in Figure 31, the efficiency curve of the CC–CV charging mode obtained
from AsAs shown
the showninin
forward Figure
buck
Figure 31,
31,the
converter, efficiency
thethe curve
red curve
efficiency of the
shows
curve CC–CV
ofthat
the the charging
efficiency
CC–CV ofmode
charging obtained
the mode
CC charg-
obtained
from
ing
from the
mode forward buck
was maintained
the forward converter,
above 95%,
buck converter, the red curve
thewhere shows
the output
red curve that
showspower the efficiency
locates
that the of
between
efficiency the CC charg-
215 CC
of the W and
charging
ing W
mode was maintained 5above 95%, where theoutput
235
mode in
wasthe first stage of above
maintained A charging,
95%, and the
where theoutput
output powerlocates
power
power locatesbetween
between460
locates between215WW and
and
215 W and
235 W
500 W inin the
the second
first stage of of
stage 5 A9.5charging,
A and On
charging. the the
output
other power
hand, locates
the between
blue curve 460 W that
shows and
235 W in the first stage of 5 A charging, and the output power locates between 460 W and
500efficiency
the W in the second stage of 9.5 Amode
charging.
was On the other hand, the blue 95%,
curvedrops
showswith
that
500 W in the of the CV
second charging
stage of 9.5 A charging. initially
On themaintained
other hand, above
the blue curve shows that
the
the efficiency of the CV charging mode was initially maintained above 95%, drops with
the decrease
efficiencyofofthe theoutput power, and
CV charging mode finally
was drops to maintained
initially 88% when the output
above 95%,power
dropswas
with the
the W.
100 decrease of the output power, and finally drops to 88% when the output power was
decrease of the output power, and finally drops to 88% when the output power was 100 W.
100 W.
Efficiency
Efficiency

CC Mode
CCMode
CV Mode
CV Mode

Output Power (W)


Output Power (W)
Figure
Figure31.
31.Efficiency forfor
Efficiency forward power
forward flow:
power CC CC
flow: mode (red);
mode CV mode
(red); (blue).
CV mode (blue).
Figure 31. Efficiency for forward power flow: CC mode (red); CV mode (blue).
5.3.
5.3.Backward
BackwardDischarge
Discharge Mode
Mode
5.3. Backward Discharge Mode
The
TheCCCCdischarge
discharge mode of the
mode of backward
the backward boost converter takes constant
boost converter current dis-
takes constant current
The
discharge CC discharge
when the mode
low-sideof the
source backward
is boost
discharged. converter
As shown takes
in constant
charge when the low-side source is discharged. As shown in Figure 32, the blue color is
Figure 32,current
the bluedis-
color is
charge when the low-side source is discharged. As shown in Figure 32,
the CC discharge curve. When the low-side voltage exceeded 47 V, the low-side source
the CC discharge curve. When the low-side voltage exceeded 47 V, thethe blue
low-side color is was
source
the
was CC discharge
discharged
discharged curve.
at aatconstantWhen
a constant the
current
current low-side
ofof9.6 voltage
9.6AAtotothe exceeded
thehigh-voltage 47
high-voltage DC V, the
DC bus. low-side
bus.When
Whenthe source
thelow-
low-side
was discharged
source at a between
voltage was constant current
47 V and of469.6V,Athe
to the high-voltage
low-side DC bus.
source was When the
discharged at alow-
constant
current of 6 A to the high-voltage DC bus. When the low-side source voltage was between
46 V and 44.5 V, the low-side source was discharged at a constant current of 4 A to the
high-voltage DC bus. When the low-side source voltage was lower than 44.5 V, the low-side
source was discharged at a constant current of 2 A to the high-voltage DC bus. As shown
in Figure 27, the black color is the curve of the low-side source voltage, and this voltage
decreases as the discharge time increases.
voltage decreases as the discharge time increases.
side source voltage was between 47 V and 46 V, the low-side source was discharged at a
constant current of 6 A to the high-voltage DC bus. When the low-side source voltage was
between 46 V and 44.5 V, the low-side source was discharged at a constant current of 4 A
to the high-voltage DC bus. When the low-side source Discharging
voltageVoltage
was lower than 44.5 V, the
low-side source was discharged at a constant current of 2 A to the high-voltage DC bus.
Energies 2023, 16, 6877 31 of 34
As shown in Figure 27, the black color is the curve of the low-side source voltage, and this
Discharging Current

Current (A)
voltage decreases as the discharge time increases.

Low-Side Voltage (V)


Discharging Voltage

Discharging
Discharging Current

(A)

Low-Side Voltage (V)


CC Mode

Discharging Current

CC Mode
Charging time (min)

Figure 32. Backward power flow: discharging voltage (black); discharging current (blue).
Charging time (min)
As shown in Figure 33, the high-side output voltage DC bus was 408 V and 493 W
Figure
Figure32.
the input 32.Backward
Backwardpower
constant power flow:
current
flow:discharging
of voltage
the converter
discharging (black);
voltage
was discharging
(black);
9.65 A, current
discharging (blue).
andcurrent
the low-side
(blue).
source volta
wasAs 51shown
As V. Theinin
shown yellow
Figure
Figure curve
33, thethe
33, ishigh-side
the gate
high-side outputdriving
outputvoltage signal
voltageDC bus DCvgs5
wasfor408
bus the
was switch
V408
and V493and S5493
W, , and W, the gre
curve
the
the input is the
inputconstantvoltage
constantcurrent across
current ofof the
thethe switch
converter
converter S ,
waswas
5 called
9.659.65
A, and v . The blue
the low-side
ds5
A, and the low-side curve
source is the
voltage
source voltage
voltage v1, t
input
was
was51 51voltage
V.
V.The of the
Theyellow
yellow full-bridge
curve
curve is is
the gate
the rectifier
driving
gate driving on
signal the
signal vgs5 vhigh-voltage
for
gs5 the
for switch S5side.
the switch , and This
S5 ,the
andgreenfigure
the green shows th
curve
the
curve isisthe
switch thevoltage
S5 hadacross
voltage aacross
ZVS the switch
turn-on,
the switch S5and
,Scalledthevds5PWM
5 , called v. ds5
The blue
. The curve
switching
blue is frequency
curve theisvoltage vwas
the voltage1, thev125 kHz with
1 , the
input
input voltage of the
thefull-bridge
full-bridgerectifier
rectifierononthethehigh-voltage
high-voltageside. side.This figure shows that
duty cycle
voltageof of0.43. This figure shows that the
the switch
switch S5 had
S5 had a ZVS
a ZVS turn-on,
turn-on, andthe
and thePWM
PWMswitching
switchingfrequency
frequency was
was 125
125 kHz
kHz with
with aa duty
duty
cyclecycle of 0.43.
of 0.43.
2μs
2μs

v
vgsgs55 10V
10V

ZVS ZVS
vvdsds55
100V 100V

ip
ip i p5 i p6 10A
i p5 i p6 10A

v1
v1 200V

200V
Figure 33. Backward power flow: under low-side source voltage of 51 V and current of 9.5 A: vgs5 (yel-
low); vds5 (green); is5 and is6 (red); v1 (blue).
Figure 33. Backward
Figure 33. powerflow:
Backward power flow:under
underlow-side
low-sidesource
sourcevoltage
voltageof of
5151
VV and
and current
current of of A: A: vgs5 (y
9.59.5
gs5 vds5 (green);
low);
v (yellow); vds5 is5 and is5
(green); i s6 (red);s6v1 (blue).
and i (red); v 1 (blue).

As shown in Figure 34, the high-side output voltage DC bus was 360 V, the power was
170 W, the input constant current of the converter was 4 A, and the low-side source voltage
was 44.5 V. The yellow curve is the gate drive signal vgs5 for the switch S5 , and the green
curve is the voltage across the switch S5 , called vds5 . The blue curve is the voltage v1 , which
is the input voltage of the full-bridge rectifier on the high-voltage side. This figure shows
that the switch S5 had a ZVS turn-on, and the PWM switching frequency was 125 kHz with
a duty cycle of 0.36.
As shown in Figure 34, the high-side output voltage DC bus was 360 V, the power
As shown in Figure 34, the high-side output voltage DC bus was 360 V, the power
was 170 W, the input constant current of the converter was 4 A, and the low-side source
was 170 W, the input constant current of the converter was 4 A, and the low-side source
voltage was 44.5 V. The yellow curve is the gate drive signal vgs5 for the switch S5, and the
voltage was 44.5 V. The yellow curve is the gate drive signal vgs5 for the switch S5, and the
green curve is the voltage across the switch S5, called vds5. The blue curve is the voltage v1,
green curve is the voltage across the switch S5, called vds5. The blue curve is the voltage v1,
which is the input voltage of the full-bridge rectifier on the high-voltage side. This figure
which is the input voltage of the full-bridge rectifier on the high-voltage side. This figure
Energies 2023, 16, 6877 shows that the switch S5 had a ZVS turn-on, and the PWM switching frequency was 12532 of 34
shows that the switch S5 had a ZVS turn-on, and the PWM switching frequency was 125
kHz with a duty cycle of 0.36.
kHz with a duty cycle of 0.36.

2μs
2μs

vgs 5
vgs 5 10V
10V
ZVS
v ZVS
vdsds55 100V
100V

i
i pp 10A
i p5 i p6 10A
i p5 i p6

v1
v1
200V
200V

Figure
Figure34.
34.Backward
Backwardpower power flow under
flow input
under voltage
input 44.544.5
voltage V and current
V and 4 A:4vA:
current gs5 (yellow) and vand
vgs5 (yellow) ds5 vds5
Figure
(green);34. Backward
is5i and power
is6 i(red); flow under input voltage 44.5 V and current 4 A: vgs5 (yellow)
v1 (blue). and vds5
(green);
(green); is5s5 and (red);
and is6 (red);
s6 v (blue).
v1 (blue).
1

Figure 3535shows
Figure35 showsthe efficiency curve of theof
CC discharge for the backward boost con-
Figure shows thethe efficiency
efficiency curvecurve
of the CCthe CC discharge
discharge for the backward
for the backward boost con- boost
verter, where
converter, the
where red curve
the for
red for the
curve efficiency under
for the efficiency the CC discharge mode initially main-
verter, where the red curve the efficiency under theunder the CC mode
CC discharge discharge mode
initially initially
main-
tains more
maintains than
more 95%.
than The discharge
95%. The current
discharge was determined
current was by the
determined low-side
by the source
low-sidevolt-source
tains more than 95%. The discharge current was determined by the low-side source volt-
age, and the corresponding output power was concentrated in 450~500 W, 180 W, and 80
age, and the
voltage, andcorresponding outputoutput
the corresponding powerpower
was concentrated in 450~500
was concentrated W, 180 W,
in 450~500 W,and18080W, and
W, as shown by blue color. However, the efficiency was reduced to 88% at the output
W, as shown by blue color. However, the efficiency was reduced to 88% at the output
80 W, as shown by blue color. However, the efficiency was reduced to 88% at the output
power of 100 W.
power
powerofof100
100W. W.
Efficiency
Efficiency

CC Mode
CC Mode

Output Power (W)


Output Power (W)
Figure 35. Efficiency for backward power flow: CC mode (red).
Figure
Figure35.
35.Efficiency forfor
Efficiency backward power
backward flow:
power CC CC
flow: mode (red).(red).
mode

5.4. Experimental Summarization


The experimental method adopts CC and CV mode control for forward buck-type
energy transfer on the low-voltage side and the CC mode control for boost-type energy
transfer on the low-voltage side. Stepwise segmented current charging and discharging
techniques are adopted to avoid battery temperature rise caused by high power charging
and discharging at low battery capacity, and this will reduce the battery life.

6. Conclusions
This paper proposed a bidirectional control strategy, which performs the bidirectional
energy transfer function without changing the topology of the LLC resonant converter. The
conventional PFM switching technique was used to control the full-bridge LLC switches
for forward buck mode. The push–pull switches were controlled by the PWM switching
technique with a variable duty cycle for backward boost mode. The proposed system
Energies 2023, 16, 6877 33 of 34

utilized the resonant tank on the high-side voltage for bidirectional energy transfer, with
ZVS on both the input switches and used the battery as the main target in the control
strategy. When the battery was charged, there were three charging stages, and when the
battery was discharged, the discharge control method was based on the stored energy of
the battery (SOC). That is, the battery was discharged with low current at a low voltage
to prolong the life of the battery, as well as to minimize temperature rise and internal
solid electrolyte interphase (SEI). Furthermore, as compared with Table 1, the proposed
converter had an input voltage range of 43–52 V, an output voltage range of 360–410 V,
an output power of 500 W, and a maximum efficiency of 95.1%. We used LLC topology,
adopted the PFM/PWM control technique, six main switches, and the number of induc-
tors/transformers/capacitors was one each. Accordingly, the proposed control strategy
can achieve wide input and output ranges with relatively few components.

Author Contributions: Conceptualization, Y.-K.T. and K.-I.H.; methodology, Y.-K.T. and K.-I.H.;
software, Y.-K.T.; validation, Y.-K.T. and K.-I.H.; formal analysis, Y.-K.T. and K.-I.H.; investigation,
Y.-K.T.; resources, Y.-K.T.; data curation, Y.-K.T.; writing—original draft preparation, Y.-K.T. and
K.-I.H.; writing—review and editing, K.-I.H.; visualization, Y.-K.T.; supervision, K.-I.H.; project
administration, K.-I.H.; funding acquisition, K.-I.H. All authors have read and agreed to the published
version of the manuscript.
Funding: This research was funded by the Ministry of Science and Technology, Taiwan, under the
Grant Number: NSTC 112-2221-E-027-015-MY2.
Data Availability Statement: No new data were created or analyzed in this study. Data sharing is
not applicable to this article.
Conflicts of Interest: The authors declare no conflict of interest.

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