INTRODUCTION TO ELECTRONICS ENGINEERING

UNIT II -TRANSISTORS
BJT:
 Bipolar junction transistor is a bidirectional device that uses both electrons and holes
as charge carriers.
 BJT is a current controlled device.

CONSTRUCTION OF NPN AND PNP BJT

a) PNP CONSTRUCTION:
 In PNP BJT, the N-type material is sandwiched between two P-type material.

 PNP transistors can be formed by connecting cathodes of 2 diodes.

 The cathode of two diodes is connected at a common point is known as base while the
anodes of the diodes on the opposite sides are known as collector and emitter.
 The emitter-base junction is forward biased while collector-base junction is reverse
biased. Hence in PNP current flows from emitter to collector.
 So, in PNP type, current flows from emitter to collector.

b) NPN CONSTRUCTION
 In NPN BJT, the P-type material is sandwiched between two N-type material.
  PNP transistors can be formed by connecting anodes of 2 diodes.
 The anode of two diodes is connected at a common point is known as base while the
cathodes of the diodes on the opposite sides are known as collector and emitter.
 The emitter-base junction is forward biased while collector-base junction is reverse
biased. Hence in PNP current flows from collector to emitter.
 So, in NPN type, current flows from collector to emitter.

• In either NPN or PNP, the emitter I heavily dopped, base is lightly dopped and the collector
is moderately doped.

 The ratio of the total size of a transistor to the base is 150:1 ratio.
 The doping of the central layer is also less compared to the outer layer by a 10:1 ratio.

TRANSISTOR OPERATION

Working of PNP transistor:

Fig. Forward and reverse biased junction of a PNP transistor

• Emitter-base p-n junction of a transistor is forward biased, while the Collector-base is reverse
biased.

When FB:

• The depletion region has been reduced in width due to the applied bias, resulting in a heavy
flow of majority carriers from the p- to the n-type material.

When RB:

• The depletion region has been increased in width due to the applied bias, resulting the flow
of majority carriers is zero, only a minority- carrier flow.

• The sandwiched n-type material is very thin and has a low conductivity, a very small number
of these carriers will take this path of high resistance to the base terminal.

• The magnitude of the base current is typically in the order of microamperes as compared to
milliamperes for the emitter and collector currents.

• The larger number of these majority carriers will diffuse across the reverse- biased junction
into the p-type material connected to the collector terminal.

• Minority carriers in the depletion region will cross the reverse-biased junction of a diode
causing minority current flow.

Applying Kirchhoff’s current law to the transistor

•
• The emitter current is the sum of the collector and base currents.

• Collector current is comprised of two components—the majority and minority carriers.

•
 COMMON BASE CONFIGURATION

PNP transistor NPN transistor

• In this configuration, input is applied between emitter and base & output is taken from the collector
and base.
• Here, the base is common to both input and output circuits hence the name is common base
configuration.

To understand complete electrical behaviour of a transistor it is necessary to study the interrelation

of the various currents and voltages. These relationships can be plotted graphically which are
commonly known as the characteristics of transistor. The most important characteristics of transistor
are,
❖ input characteristics
❖ output characteristics
a) Input characteristics for a common base transistor amplifier:
The curve describes the changes in the values of input current with respect to the values of
input voltage, keeping the output voltage constant.

Curve is plotted between an input voltage VBE and input current IE at constant collector-base voltage VCB.
The IE is taken along Y-axis and VBE is taken along X-axis.

Input or driving point characteristics:

1.After the cut-in-voltage (0.7 for Si.0.3 for Ge), the IE increases rapidly with small increase in VBE. Thus,
the input resistance is very small.

2.There is slight increase in IE with increase in VCB. This is due to change in the width of the depletion
region in the base region under reverse biased condition.

3. For fixed values of collector voltage (VCB), as the base-to-emitter voltage increases, the emitter current
increases in a manner that closely resembles the diode characteristics.

4. Voltages VBE and VCB are positive for NPN transistors & they are negative for PNP transistors.

b) Output characteristics for a common base transistor amplifier:

The curve is obtained by plotting the output current against the output voltage, keeping
input current constant.

Output curve is plotted between Collector current IC and Collector-base voltage VCB at constant emitter
current IE.
The output characteristics has 3 basic regions,

➢ Active region
➢ Saturation region
➢ Cutoff region

i)Active region:

• In the active region the collector-base junction is reverse-biased, while the base-emitter
junction is forward-biased.

• In this region, Collector current IC is approximately equal to the emitter current IE and transistor
works as an amplifier.

•
• In active region, IE is almost constant. Hence transistors work as a constant current source.
ii) Saturation region

• In the saturation region both the collector-base and base-emitter junctions are forward-biased.

• Here, IE is increasing. IC is independent of IE.

iii) Cutoff region

• In the cutoff region both the collector-base and base-emitter junctions are reverse-biased.

• The region below the curve IE=0 is known as the cut-off region where the IC is nearly zero.

Alpha (α): Common Base Current Gain

In the dc mode the levels of IC and IE due to the majority carriers are related by a quantity called
alpha.

The level of alpha typically extends from 0.90 to 0.998

ICBO (Collector to base current when emitter open)

COMMON EMITTER CONFIGURATION

(a) npn transistor (b) pnp transistor

 In this configuration, input is applied between base and emitter and output is taken from collector and
emitter. Here, emitter is common to both input and output circuits hence the name is common-emitter
configuration.

a) Input Characteristics for CE configuration:

• The input characteristics are a plot of the input current IB verses the input voltage VBE for a
constant output voltage VCE.

Input or driving point characteristics:

1.After the cut-in-voltage (0.7 for Si.0.3 for Ge), the IB increases rapidly with small increase in VBE.
Thus, the input resistance is very small.

2.There is slight decrease in IB with increase in VCB.

3. Voltages VBE and VCE are positive for NPN transistors & they are negative for PNP transistors.

b) Output characteristics of CE configuration:

The output characteristics are a plot of the output current (I C) versus output voltage (VCE) for
a constant values of input current (IB).

The output characteristics has 3 basic regions,

➢ Active region
➢ Saturation region
 ➢ Cutoff region

i)Active region:

• In the active region the collector-base junction is reverse-biased, while the base-emitter
junction is forward-biased.

• The collector current IC rises more sharply with increasing VCE in the active(linear) region.

ii) Saturation region

• In the saturation region both the collector-base and base-emitter junctions are forward-biased.

• Here, VCE(Sat) usually ranges between 0.1V to 0.3V.

iii) Cutoff region

• In the cutoff region both the collector-base and base-emitter junctions are reverse-biased.

• The region below the curve IB=0 is known as the cut-off region where the IB is nearly zero.

Beta (β): Common Emitter Current Gain

• In the dc mode the levels of IC and IB are related by a quantity called beta.

• The level 𝛽 of typically ranges from about 50 to over 400.

• It is usually included as hFE with the h derived from an ac hybrid equivalent circuit [large
signal (dc) forward current gain].

Relation between Alpha (α) and Beta (β)

Problem solving
Q1) If α for a transistor is 0.99, the base current is 100uA, estimate the collector current.

Q2) If a transistor collector current is 1mA and base current is 10uA, determine its α and β.

Q3) A transistor amplifier connected in CE mode has β =100 & IB=50uA. Compute the
values of IC, IE & α.

Q4) In a common base connection, the current amplification factor is 0.9. If the emitter
current is 1mA, determine the value of base current.
Q5)In a common base connection, IC = 0.95 mA and IB = 0.05 mA. Find the value of α.

SIGNIFICANCE OF DIFFERENT REGIONS OF OPERATION

 The supply of suitable external dc voltage is called as biasing.

 Either forward or reverse biasing is done to the emitter and collector junctions of the
transistor.

 These biasing methods make the transistor circuit to work in four kinds of regions such
as Active region, Saturation region and Cutoff region.

REGION OF OPERATION EMITTER-BASE JUNCTION COLLECTOR-BASE JUNCTION

Active region Forward biased Reverse biased

Saturation region Forward biased Forward biased

Cutoff region Reverse biased Reverse biased

(i) Active region:

• This region lies between saturation and cutoff. The transistor operates in active region
when the emitter junction is forward biased, and collector junction is reverse biased.
• This is also called as linear region. A transistor while in this region, acts better as
an Amplifier.
 In the active state, collector current is β times the base current,

i.e., IC=βIB
Where, IC = collector current

β = current amplification factor

IB = base current

(ii) Saturation region:

• The transistor operates in saturation region when both the emitter and collector
junctions are forward biased.
• This is the region in which transistor tends to behave as a closed switch. The transistor
has the effect of its collector and Emitter being shorted. The collector and Emitter
currents are maximum in this mode of operation.
• The figure below shows a transistor working in saturation region.

we can say that IC=IE

Where, IC = collector current

IE = emitter current

(iii) Cutoff region:

• The transistor operates in cutoff region when both the emitter and collector junctions
are reverse biased.
• This is the region in which transistor tends to behave as an open switch.
• The transistor has the effect of its collector and base being opened.
• The collector, emitter and base currents are all zero in this mode of operation.
• The following figure shows a transistor working in cutoff region.

we can write as

TRANSISTOR AS SWITCH
 A transistor can be used as a solid-state switch.
  If the transistor is operated in saturation region it acts as closed switch and if the
transistor is operated in cut-off region it is acting as open switch.
a) Cut-off mode (Open switch):

In the cut-off region, the operating conditions of transistor are

b) Saturation mode(closed switch):

In the saturation region, the operating conditions of transistor are,

 TRANSISTOR AMPLIFICATION ACTION
 A transistor acts as an amplifier by raising the strength of a weak signal.

 The DC bias voltage applied to the emitter-base junction, makes it remain in forward
biased condition.
 This forward bias is maintained regardless of the polarity of the signal.
 The low resistance in input circuit, lets any small change in input signal to result in an
appreciable change in the output.
 The emitter current caused by the input signal contributes to the collector current,
which when flows through the load resistor RL, results in a large voltage drop across it.
 Thus, a small input voltage results in a large output voltage, which shows that the
transistor works as an amplifier.
Example
Let there be a change of 0.1v in the input voltage being applied, which further produces a
change of 1mA in the emitter current. This emitter current will obviously produce a change
in collector current, which would also be 1mA.
A load resistance of 5kΩ placed in the collector would produce a voltage of
5 kΩ × 1 mA = 5V
Hence it is observed that a change of 0.1v in the input gives a change of 5v in the output,
which means the voltage level of the signal is amplified.

TRANSISTOR BIASING
Need for biasing:
 In order to operate the transistor in the desired operating region, we have to apply
external DC voltage with correct polarity and magnitude to the two junctions of the
transistor to obtain proper Collector current (IC) and Collector-emitter voltage (VCE).
This process is known as biasing.
 Either forward or reverse biasing is done to the emitter and collector junctions of the
transistor.
  These biasing methods make the transistor circuit to work in four kinds of regions such
as Active region, Saturation region and Cutoff region.
Q-point:
 The Q point or operating point is a fixed DC voltage and current level at which a
transistor functions. The point which is obtained from the values of the IC (collector
current) or VCE (collector-emitter voltage) when no signal is given to the input is
known as the operating point or Q-point in a transistor.
 The operating point is also called quiescent (silent) point or simply Q-point because it
is a point on IC – VCE characteristic when the transistor is silent, or no input signal is
applied to the circuit.
 The operating point can be easily obtained by the DC load line method.

It plays a significant role in determining the power consumption and amplification capacity of
the transistor.

TYPES OF BIASING CIRCUITS

The circuit used for biasing is called biasing circuits.
1) Fixed bias circuit

2) Emitter bias circuit

3) Collector to base bias circuit

4) Voltage divider bias circuit

1)FIXED BIAS CONFIGURATION:

For dc analysis, the capacitor is open circuit (As f= 0, XC = ∞)

DC analysis:
Input circuit (Base-Emitter Loop):

Also, IC is given by
b) Output circuit (Collector-Emitter Loop):

• Since the base current is controlled by the level of RB and IC is related

to IB by a constant, the magnitude of IC is not a function of the
resistance RC.
• Change in RC will not affect the level of IB or IC as long as we remain
in the active region of the device.
2)VOLTAGE DIVIDER BIAS CONFIGURATION:

In this circuit, biasing is provided by 3 resistors R1, R2 & RE. R1 and R2 are acting as a
potential divider giving a fixed voltage to point B which is base. This circuit provides improved
stability against variation in the temperature and transistor gain.
i)Exact Analysis:
• This method uses Thevenin’s equivalent theorem.
The input section of the circuit can be redrawn Thevenin’s equivalent circuit of input
section as below. can be redrawn as below,

a) Input circuit (Base-Emitter Loop):

Apply KVL to the base-emitter loop,
VTH-IBRB-VBE-IERE=0-------------------equ 1
Sub IE=(1+β)IB in equ 1
→VTH-VBE=IB[RTH+(1+β)RE]

IB=

IC= βIB
 b) Output circuit (Collector-Emitter Loop):
Applying KVL to collector-emitter loop
VCC-ICRC-VCE-IERE=0

Substituting IE ≅ IC and grouping terms

VCE=VCC-IC(RC+RE)

ii) Approximate Analysis:

Problem solving
INTRODUCTION TO FIELD EFFECT TRANSISTOR
 Field Effect Transistor (FET) is a type of transistor.
 It is a three-terminal semiconductor unipolar device.
 Terminals are Gate Drain and Source
 Source: The majority carriers are entering the FET through the source terminal.
 Drain: The majority carriers leave the channel through drain.
 Gate: By controlling the gate voltage, the flow of majority carriers from source to
drain can be controlled.
 FETs are used for weak signal amplification and to switch electronic signals.

 Its operation is based on a controlled input voltage.

Types:
JUNCTION FIELD EFFECT TRANSISTOR (JFET)
 JFET is one of the types of FET.
 JFET or Junction Field Effect Transistor is a unipolar current-controlled semiconductor
device with three terminals: source, drain, and gate.
 JFETs are commonly used as switches and amplifiers.
 There are two types of JFETs.
❖ N-channel JFET
❖ P-channel JFET
 In N-channel JFET, the generation of current is due to the movement of electrons.

 P-channel JFET, the generation of current is due to the movement of holes.

 Symbols

CONSTRUCTION OF JFET
N-Channel JFET:
The JFET in which the electrons as majority charge
carriers due to this only current conduction takes place is
known as N-channel JFET.
 In the N-channel JFET, a major part of the
structure is the N-type material which forms the channel
between the embedded layers of P-type material.
 The two PN junctions are form by P type regions
and the space between the junctions that is N type
regions is known as a channel.
 Both the P type regions are connected internally,
and a single wire is taken out in the form of a terminal is
known as the gate (G).
 The top of the N-type channel is connected through an ohmic contact to a terminal
referred to as drain(D).
 Whereas the lower end of the N-type channel is connected through an ohmic contact
to a terminal referred to as Source(S).
  The electrons enter the semiconductor through the source (S) terminal and the drain
(D) terminal in which the electrons leave the semiconductor.

Operation of N-channel JFET

i)Case 1: VGS=0V(no bias voltage), VDS=Positive
• Positive voltage VDS is applied between drain and
source and VGS=0V.
• At this stage, due to positive VDS, electrons start moving
from source to drain and current flows from drain to source.
• Width of the depletion region is less; hence the current
flow is more.
• Here, the width of the depletion region is more at drain
side and less at source side. This is due to PN junction in the
drain side is reverse biased and PN junction in the source
side is forward biased.

ii) Case 2: VGS=Small negative VDS=Positive

• Positive VDS is applied between drain and source and
small negative voltage is applied between gate and source.
• Due to negative VGS, both the PN junctions are reverse
biased, and the depletion region increases, and width of the
N-channel reduces.
• Hence, electron flow reduces hence less current flow.
iii) Case 3: VGS=Large negative VDS=Positive
• As the negative voltage increases, the depletion region
increases. At one point it completely blocks the electron flow and
drain current becomes zero.

• This condition is known as pinch off mode and the gate-

source voltage (VGS) at which pinch off occurs is called Pinch off
voltage.

CHARACTERISTICS OF JFET
• Output (V-I) characteristics
• Transfer characteristics

a) Output (V-I) characteristics of N-channel JFET:

The Regions that make up a transconductance curve are the following:

Cutoff Region- This is the region where the JFET transistor is off, meaning no drain current,
ID flows from drain to source.
Ohmic Region- This is the region ID is beginning to flow from drain to source. This is the only
region in the curve where the response is linear.
Saturation Region- This is the region where the JFET transistor is fully operation and
maximum current is achieved. During this region, the JFET is On and active.
Breakdown Region- This is the region where the voltage VDS that is supplied to the drain of
the transistor exceeds the necessary maximum. At this point, the JFET loses its ability to
resist current because too much voltage is applied across its drain-source terminals. The
transistor breaks down and current flows from drain to source.

b) Transfer characteristics

The transfer characteristic shows the relationship between gate voltage and drain current,
with the drain-to-source voltage kept at the pinch-off voltage.
When the gate is at zero potential, the maximum drain current (I DSS) flows through the
transistor. As the gate’s negative potential increases, the drain current decreases.
At a certain negative gate voltage, the drain current becomes zero. This voltage, where the
drain current is zero at pinch-off voltage, is called the gate-to-source cutoff voltage VGS(off).

MOSFET
 Metal Oxide Silicon Field Effect Transistors commonly known as MOSFETs are
electronic devices used to switch or amplify voltages in circuits. It is a voltage-
controlled device and is constructed by three terminals. The terminals of MOSFET are
named as follows:
➢ Source
➢ Gate
➢ Drain
➢ Body
 The body (B) is frequently connected to the source terminal, reducing the terminals
to three.
It is used for switching or amplifying signals. The ability to change conductivity with the
amount of applied voltage can be used for amplifying or switching electronic signals.
CONSTRUCTION OF N-CHANNEL DEPLETION MOSFET

• An N-channel DE-MOSFE is consists of a lightly

doped P-type substrate into which two blocks of
heavily doped N-type material are diffused forming
the source and drain.
• An N-channel is formed by diffusion between the
source and drain.
• The type of impurity for the channel is the same
as for the source and drain.
• Now a thin layer of SiO2 dielectric is grown over
the entire surface and holes are cut through the
SiO2 (silicon dioxide) layer to make contact with the
N-type blocks (Source and Drain).

• Metal is deposited through the holes to provide drain and source terminals, and on
the surface area between drain and source, a metal plate is deposited.
• This layer constitutes the gate. SiO2 layer results in an extremely high input impedance
of the order of 1010 to 1015 Ω for this device.
• The chip area of a MOSFET is typically 0.003 μm2 or less which is about only 5% of the
area required by a BJT.

TRANSFER CHARACTERISTICS N-CHANNEL DEPLETION MOSFET

  The transfer characteristics of an N Channel Depletion MOSFET illustrate the
relationship between the gate-source voltage (VGS) and the resulting drain current (ID).
 The graph shows that the current ID will flow for both positive and negative values
of VGS.
 The drain current is less than the saturation current for the negative value of gate
voltage, whereas for the positive value of gate voltage, the drain current exceeds the
saturation current.
 VGS = VP is also represented in this graph for which drain current is zero irrespective of
drain to source voltage.
1. Forward Bias (Negative VGS): In the forward bias region, where VGS is negative, the
MOSFET operates with a naturally conductive channel. As V GS becomes more negative,
the depletion region widens, reducing the conductive channel’s width and,
consequently, the drain current (ID).

2. Threshold Voltage (Vth): The threshold voltage is the point at which the MOSFET
transitions from the naturally conductive state to the pinched-off state. It signifies the
minimum VGS required to control the channel.
3. Pinched-Off Region: As VGS continues to become more negative, the MOSFET enters
the pinched-off region. In this region, the channel is depleted, and I D is significantly
reduced.

CONSTRUCTION OF N-CHANNEL ENHANCEMENT MOSFET

 A lightly doped P-type substrate is

taken into which two heavily doped N-type
regions are diffused, which act as source and
drain.
 Between these two N+ regions, there
occurs diffusion to form an N-channel, connecting
drain and source.
 A thin layer of Silicon dioxide (SiO2) is
grown over the entire surface and holes are made
to draw ohmic contacts for drain and source
terminals.
 A conducting layer of aluminum is laid over the entire channel, upon this SiO2 layer
from source to drain which constitutes the gate.
  The SiO2 substrate is connected to the common or ground terminals.

TRANSFER CHARACTERISTICS OF N-CHANNEL ENHANCEMENT MOSFET

 The graphs or curves showing the relationship
between drain current (ID) and gate-to-source voltage (VGS)
for a constant value of VDS are called transfer characteristics
of E-MOSFET.
 From these transfer characteristics, we may conclude
the following important points:
❖ For VGS < VTh, the drain current (ID) is zero. This is
because no significant channel is induced between the source
and drain regions to support the flow of charge carriers
(electrons or holes).
❖ For VGS > VTh, the drain current (ID) increases sharply
with the increase in VGS in a parabolic sense.