JBL Ms-A1004 Rev1 Car Amplifier SM
JBL Ms-A1004 Rev1 Car Amplifier SM
JBL Ms-A1004 Rev1 Car Amplifier SM
4 CHANNEL
Digital Signal Processing Amplifier
SERVICE MANUAL
- CONTENTS -
SPECIFICATIONS ………………………………………..1
PACKING……………………………………………..…....2
CONTROL/INSTALLATION DRAWINGS………………3
CONTROL/INSTALLATION INSTRUCTIONS………....4
NOTE ON SETTINGS AND TESTING…..………………5
CONNECTIONS …..………………………………………6
DISPLAY………………………..………………………….9
EXPLODED VIEW/PARTS LIST…….….….……..……10
AMPLIFIER BLOCK DIAGRAMS………………….……11
P.C.B. DRAWINGS….………………………...…….……13
ELECTRICAL PARTS LIST ..……….……….…….……19
IC/TRANSISTOR PINOUTS..…………………….….…..25
SCHEMATICS……………..……………….………..…...64
MS-A1004 Specifications
JBL continually strives to update and improve existing products, as well as create new ones. The specifications and details in
this and related JBL publications are therefore subject to change without notice.
1
MS-A1004
13 PLASTIC BAG 2
15 14 6 5 .1 .2 R 5 2 0 2.5mm ALLEN WRENCH 1
15 6 5 .1 .0 4 2 0 4.0mm ALLEN WRENCH 1
16 2 6 .1 2 1 .1 1 2 1 0 1 RCA to bare wire Adapters 4
MADE IN CHINA
2010.06.24
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MS-A1004
3 4
30 A
x
30 A
8
9 10 11 12
3 4
1 x 60A
- +
6
11 12
12
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4 10
6 11
2
7 12
3 9
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1 x 60A
- +
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1 2 3 4 5 6 7 8
11 10 9
1
6 7
3 4
9
10
5
11
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MS-A1004
DC 12V
Flexible
REM_IN_ACT
PWREN
VCC
VEE
VBIAS
VCAR
HEVN
GND
GND
Main Amp
Tramsmit
WBC
3V
Power Regulator Receive
(TDA3681) u-Control
PWREN
Auto OCP, OTP
Sense
VCC
VEE
Head Unit
VBIAS
VDIF,+8P5VA, 5V-ON 3P3V-ON 5V-ON
Lo -8P5VA
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MS-A1004
MS-A1004 Electrical Parts List
Part Number Description Qty Reference Designator or Application
PREAMP/INPUT PCB
Semiconductors
Resistors
19
MS-A1004
Part Number Description Qty Reference Designator or Application
PREAMP/INPUT PCB
20
MS-A1004
Part Number Description Qty Reference Designator or Application
PREAMP/INPUT PCB
Capacitors
CAP0161R0-0402 SMD Capacitor CAP, SM 1PF 16V +/-0.1P NPO 0402 1 C161
CAP050103-0603 SMD Capacitor CAP, SM 0.01uF 50V 10%NPO 0603 1 C155
CAP016333-0402 SMD Capacitor CAP, SM 0.033UF 16V 10%NPO 0402 1 C153
C6,C37,C40,C41,C47,C63,C66,C69,C70,
C71,C78,C87,C125,C126,C128,C180,C188,
CAP050104-0603 SMD Capacitor CAP, SM 0.1UF 50V 10%NPO 0603 33 C196,C197,C203,C204,C206,C207,C210,
C214,C242,C183,C262,C270,C271,C272,
C273,C127
C8,11,14,19,20,22,29,36,94,112,186,185,
CAP050224-1206 SMD Capacitor CAP, SM 0.22UF 50V 10%NPO 1206 14
190,198
CAP0161R5-0402 SMD Capacitor CAP, SM 1.5PF +/-0.1P 16V NPO 0402 1 C159
CAP050102-0603 SMD Capacitor CAP, SM 1000PF 50V 5%NPO 0603 11 C52,80,81,82,83,106,107,108,109,154,220
C39,53,58,59,130,132,134,136,137,138,
CAP025106-1206 SMD Capacitor CAP, SM 10UF cer -20%+80% 25V 1206 15
139,140,177,178,187
CAP050151-0603 SMD Capacitor CAP, SM 150PF 50V 5%NPO 0603 4 C85 ,97 ,114 ,117
CAP050122-0603 SMD Capacitor CAP, SM 1200PF 50V 10%NPO 0603 1 C194
CAP050152-0603 SMD Capacitor CAP, SM 1500PF 50V 10%NPO 0603 2 C265,266
CAP050105-1206 SMD Capacitor CAP, SM 1UF 50V 10% 1206 5 C191,192,201,202,176
C34,35,65,68,74,75,76,141,142,143,145,
CAP050225-0805 SMD Capacitor CAP, SM 2.2UF 50V 10%CER 0805 14
267,268,269
CAP050222-0402 SMD Capacitor CAP, SM 2200PF 50V 10%NPO 0402 1 C157
CAP050221-0603 SMD Capacitor CAP, SM 220PF 50V 10%NPO 0603 1 C99
CAP050270-0402 SMD Capacitor CAP, SM 27PF 50V 2%NPO 0402 2 C152,160
CAP0164R7-0402 SMD Capacitor CAP, SM 4.7PF 16V 2%NPO 0402 1 C158
C7,10,12,13,15,16,18,21,23,28,30,50,79,86,
CAP050470-0603 SMD Capacitor CAP, SM 47PF 50V 5%NPO 0603 20
92,93,129,131,133,135 ,
C5,9,17,24,25,26,27,31,111,119,247,248,
CAP0316100-4 SMD electrolytic Capacitor 10UF/16V 4 20% 20
251,252,253,254,256,257,258,259
CAP0316101-6.3 SMD electrolytic Capacitor CAP, E 100UF 16V 20% SM6X6 1 C38
CAP1016101-D SMD Ta electrolytic Capacitor 100uf/16V “D” type 1 C72
CAP0616220-6.3 SMD electrolytic Capacitor 22UF/16V 6.3 20% Bipolar-NP 4 C89,95,103,105
CAP0616101-6.3 SMD electrolytic Capacitor 100UF/16V 6.3 20% Bipolar-NP 1 C162
CAP0316221-6.3 SMD electrolytic Capacitor 220UF/16V 6.3 20% 1 C240
CAP0350221-8 SMD electrolytic Capacitor 220UF/50V 8 20% 4 C124,144,151,156
CAP0335330-5 SMD electrolytic Capacitor 33UF/35V 5 20% 1 C195
CAP0310101-6.3 SMD electrolytic Capacitor CAP 33uF 20% 10V ELECTROLYTIC 1 C88
CAP050225-0805 SMD Capacitor CAP, SM 2.2UF 50V 10%XR5 0805 2 C73,199
CAP050222-0603 SMD Capacitor CAP, SM 2200PF 50V 5%NPO 0603 4 C243,244,245,246
CAP050223-0603 SMD Capacitor CAP, SM 22000PF 50V 10%NPO 0603 4 C90,96,102,104
CAP025106-1206 SMD Capacitor CAP, SM 10UF cer -20%+80% 25V 1206 8 C57,60,61,77,91.98,101,146
CAP050105-0805 SMD Capacitor CAP, SM 105PF 50V 5%NPO 0805 1 C241
CAP050152-0603 SMD Capacitor CAP, SM 1500PF 50V 10%NPO 0603 2 C263,264
CAP050470-0603 SMD Capacitor CAP, SM 47PF 50V 5%NPO 0603 12 C43,44,48,49,51,54,62,184,189,255,260,26
C1,2,3,4,32,120,121,122,123,175,182,193,
CAP050104-0603 SMD Capacitor CAP, SM 0.1UF 50V 10%NPO 0603 25 200,205,208,209,211,213,215,216,217,236,
237,238, 239
C147,148,149,150,224,225,226,227,228,
CAP050104-0805 SMD Capacitor CAP, SM 0.1UF 100V 10%NPO 0805 16
229,230,231,232,233,234,235
CAP050105-1206 SMD Capacitor CAP, SM 1UF 50V 10%CER 1206 6 C67,100,171,212,249,250
CAP1020100-B SMD Ta electrolytic Capacitor 10uf/20V “B” type 2 C55,64
CAP106R3220-A SMD Ta electrolytic Capacitor 22uf/6.3v “A” type 1 C110
CAP10251R0-A SMD Ta electrolytic Capacitor 1uf/25v “A” type 1 C56
CAP100102-M cassette Capacitor CAP,B 102J 100V ±5% 4 C274,275,276,277
CAP250104-M cassette Capacitor 0.1uf 250V CBB21B 4 C164,166,168,170
CAP250474-M cassette Capacitor 0.47uf 250V CBB21B 4 C163,165,167,169
Miscellaneous
PREAMP/INPUT PCB
POWER PCB
Semiconductors
Resistors
Capacitors
22
MS-A1004
Part Number Description Qty Reference Designator or Application
POWER PCB
Miscellaneous
DISPLAY PCB
Semiconductors
Resistors
Capacitors
23
MS-A1004
Part Number Description Qty Reference Designator or Application
DISPLAY PCB
MECHANICAL
24
MS-A1004
STA309A
Features
8 channels of 24-bit DDX® TQFP64
>100 dB SNR and dynamic range
Selectable 32 kHz - 192 kHz input sample rates Advanced PopFree operation
6 channels of DSD/SACD input Advanced AM interference frequency
Digital gain/attenuation +58 dB to -100 dB in switching and noise suppression modes
0.5 dB steps I2S output channel mapping function
Soft volume update Independent channel volume and DSP bypass
Individual channel and master gain/attenuation Channel mapping of any input to any
plus channel trim (-10 dB to +10 dB) processing/DDX® channel
Up to 10 independent 32-bit user DC blocking selectable high-pass filter
programmable biquads (EQ) per channel
Selectable per-channel DDX® damped ternary
Bass/treble tone control or binary PWM output
Pre and post EQ full 8-channel input mix on all Max power correction for lower full-power THD
8 channels
Variable per channel DDX® output delay control
Dual independent limiters/compressors
192 kHz internal processing sample rate, 24-bit
Dynamic range compression or anti-clipping to 36-bit precision
modes
AutoModes: Description
– 5-band graphic EQ
– 32 preset EQ curves (rock, jazz, pop, etc.) The STA309A is a single chip solution for digital
– Automatic volume controlled loudness audio processing and control in multi-channel
applications. It provides output capabilities for
– 5.1 to 2-channel downmix
DDX® (direct digital amplification). In conjunction
– Simultaneous 5.1- and 2-channel downmix with a DDX® power device, it provides high-
outputs quality, high-efficiency, all digital amplification.
– 3 preset volume curves The device is extremely versatile, allowing for
– 2 preset anti-clipping modes input of most digital formats including 6.1/7.1-
– Preset movie nighttime listening mode channel and 192 kHz, 24-bit DVD-audio,
– Preset TV channel/commercial AGC mode DSD/SACD. In 5.1 application the additional 2
channels can be used for audio line-out or
– 5.1, 2.1 bass management configurations
headphone drive. In speaker mode, with 8
– AM frequency automatic output PWM channel outputs in parallel, the STA309A can
frequency shifting deliver more than 1 W.
– 8 preset crossover filters
Individual channel and master soft/hard mute Table 1. Device summary
Automatic zero-detect and invalid input mute Order code Package
Automatic invalid input detect mute STA309A TQFP64
25
MS-A1004
1 Block diagram
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26
MS-A1004
2 Pin connections
OUT1_A
OUT1_B
SDO_78
SDO_56
SDO_34
SDO_12
LRCKO
BICKO
PWDN
EAPD
GND
GND
VDD
VDD
NC
NC
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
MVO 1 48 OUT2_A
GND 2 47 OUT2_B
VDD 3 46 NC
GND 4 45 GND
NC 5 44 VDD
SDI_78 6 43 OUT3_A
SDI_56 7 42 OUT3_B
SDI_34 8 41 OUT4_A
SDI_12 9 40 OUT4_B
LRCKI 10 39 OUT5_A
BICKI 11 38 OUT5_B
VDD 12 37 NC
GND 13 36 GND
NC 14 35 VDD
RESET 15 34 OUT6_A
PLLB 16 33 OUT6_B
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SDA
NC
GNDA
VDDA
CKOUT
NC
GND
VDD
OUT8_B
OUT8_A
OUT7_B
OUT7_A
SA
SCL
XTI
FILTER_PLL
STA308APINCON
10/67
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MS-A1004
Philips Semiconductors Product specification
PACKAGES
TYPE NUMBER TEMPERATURE
PINS PACKAGE MATERIAL CODE MARKING
RANGE
74AHC1G04GW −40 to +125 °C 5 SC-88A plastic SOT353 AC
74AHCT1G04GW −40 to +125 °C 5 SC-88A plastic SOT353 CC
74AHC1G04GV −40 to +125 °C 5 SC-74A plastic SOT753 A04
74AHCT1G04GV −40 to +125 °C 5 SC-74A plastic SOT753 C04
PINNING
handbook, halfpage
n.c. 1 5 VCC handbook, halfpage
2 A Y 4
A 2 04
GND 3 4 Y MNA108
MNA107
handbook, halfpage 1
2 4 handbook, halfpage
A Y
MNA110
MNA109
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MS-A1004
MC9S08GT16A/GT8A Features
8-Bit HCS08 Central Processor Unit (CPU) • Software selectable pullups on ports when used as
input
• 40-MHz HCS08 CPU • Internal pullup on RESET and IRQ pin to reduce
• HC08 instruction set with added BGND instruction customer system cost
• Support for up to 32 interrupt/reset sources • Up to 38 general-purpose input/output (I/O) pins,
plus one output-only pin, depending on package
Memory Options selection
• FLASH read/program/erase down to 1.8 V Development Support
• Up to 16K FLASH; up to 2K RAM
• Background debugging system
Power-Saving Modes • Breakpoint capability to allow single breakpoint
setting during in-circuit debugging (plus two more
• Three very low power stop modes breakpoints in on-chip debug module)
• Reduced power wait mode • On-chip, in-circuit emulation (ICE) debug module
• Very low power real time interrupt for use in run, with real-time bus capture. On-chip ICE debug
wait, and stop module containing two comparators and nine trigger
modes. Eight deep FIFO for storing change-of-flow
Clock Source Options
addresses and event-only data.
• Clock sources to internal hardware frequency • Single-wire background debug interface
locked-loop (FLL): internal, external, crystal, or
Package Options
resonator
• Internal clock with ±0.2% trimming resolution and • 48-pin QFN
±0.5% deviation across voltage or across • 44-pin QFP
temperature
• 42-pin PSDIP
System Protection • 32-pin QFN
Peripherals
Input/Output
31
MS-A1004
Device Overview
VREFH
VREFL
VSSAD
VDDAD
4
8 PTA7/KBIP7–
PORT A
HCS08 CORE 8-BIT KEYBOARD PTA4/KBIP4 NOTE 6
INTERRUPT (KBI) 4
BKGD PTA3/KBIP3–
PTA0/KBIP0
CPU BDC
4
PTB7/ADP7–
PORT B
10-BIT 8 PTB4/ADP4
ANALOG-TO-DIGITAL 4
HCS08 SYSTEM CONTROL CONVERTER (ATD) PTB3/ADP3–
RESET PTB0/ADP0
NOTE 4 RESETS AND INTERRUPTS
MODES OF OPERATION PTC7
POWER MANAGEMENT PTC6
PTC5
PTC4
PORT C
SCL NOTE 5
RTI COP PTC3/SCL
INTER-IC (IIC) SDA
PTC2/SDA
IRQ IRQ LVD
RXD2
NOTES 2, 3 SERIAL COMMUNICATIONS PTC1/RxD2
TXD2 PTC0/TxD2
INTERFACE (SCI2)
PORT D
CH0
PTD2/TPM1CH2
3-CHANNEL TIMER/PWM CH1 PTD1/TPM1CH1
(TPM1) CH2 PTD0/TPM1CLK/TPM1CH0
USER RAM
(GT16A = 2048 BYTES)
(GT8A = 1024 BYTES) SPSCK PTE5/SPSCK
MOSI
SERIAL PERIPHERAL PTE4/MOSI
MISO PTE3/MISO
INTERFACE (SPI)
PORT E
SS PTE2/SS
ON-CHIP ICE
DEBUG
RXD1
MODULE (DBG) SERIAL COMMUNICATIONS PTE1/RxD1
TXD1 PTE0/TxD1
INTERFACE (SCI1)
INTERNAL CLOCK
GENERATOR (ICG)
PTG3
EXTAL
PORT G
PTG2/EXTAL
XTAL PTG1/XTAL
LOW-POWER OSCILLATOR
BKGD PTG0/BKGD/MS
VDD
VOLTAGE
VSS
REGULATOR = Pins not available in 44-, 42-, or 32-pin packages
VSS = Pins not available in 42- or 32-pin packages
= Pins not available in 32-pin packages
NOTES:
1. Port pins are software configurable with pullup device if input port.
2. Pin contains pullup/pulldown device if IRQ enabled (IRQPE = 1).
3. IRQ does not have a clamp diode to VDD. IRQ should not be driven above VDD.
4. Pin contains integrated pullup device.
5. High current drive
6. Pins PTA[7:4] contain both pullup and pulldown devices. Pulldown available when KBI enabled (KBIPn = 1).
32
MS-A1004
Device Overview
Module Version
ICGOUT BUSCLK
÷2
ICGLCLK*
33
MS-A1004
Chapter 2
Pins and Connections
2.1 Introduction
This section describes signals that connect to package pins. It includes a pinout diagram, a table of signal
properties, and detailed discussion of signals.
PTG0/BKGD/MS
PTG2/EXTAL
PTA5/KBIP5
PTA4/KBIP4
PTA2/KBIP2
PTA7/KBIP7
PTA6/KBIP6
PTA3/KBIP3
PTG1/XTAL
VDDAD
VSSAD
43
42
41
40
44
39
38
37
36
35
34
RESET 1 33 PTA1/KBIP1
PTC0/TxD2 2 32 PTA0/KBIP0
PTC1/RxD2 3 31 VREFL
PTC2/SDA 4 30 VREFH
PTC3/SCL 5 29 PTB7/ADP7
PTC4 6 28 PTB6/ADP6
PTC5 7 27 PTB5/ADP5
PTC6 8 26 PTB4/ADP4
PTE0/TxD1 9 25 PTB3/ADP3
PTE1/RxD1 10 24 PTB2/ADP2
IRQ 11 23 PTB1/ADP1
22
13
14
15
16
17
18
19
20
21
12
PTE2/SS
PTE3/MISO
PTE5/SPSCK
VSS
VDD
PTD0/TPM1CLK/TPM1CH0
PTD1/TPM1CH1
PTD3/TPM2CLK/TPM2CH0
PTD4/TPM2CH1
PTB0/ADP0
PTE4/MOSI
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MS-A1004
Figure 2-5 shows pin connections that are common to almost all MC9S08GT16A application systems. A
more detailed discussion of system connections follows.
VREFH PTA0/KBIP0
VDDAD MC9S08GT16A PTA1/KBIP1
CBYAD
PTA2/KBIP2
0.1 μF
PTA3/KBIP3
VSSAD PORT
SYSTEM VDD A PTA4/KBIP4
VREFL
POWER PTA5/KBIP5
VDD
+ PTA6/KBIP6
3V CBLK + CBY
10 μF 0.1 μF PTA7/KBIP7
VSS
NOTE4 PTB0/ADP0
VSS
PTB1/ADP1
BACKGROUND HEADER
PTB2/ADP2
BKGD/MS PORT PTB3/ADP3
VDD
B PTB4/ADP4
VDD PTB5/ADP5
I/O AND
PTB6/ADP6
4.7 kΩ–10 kΩ PERIPHERAL
PTB7/ADP7
RESET INTERFACE TO
0.1 μF NOTE 3 PTC0/TxD2
PTC1/RxD2 APPLICATION
OPTIONAL
MANUAL VDD PTC2/SDA
SYSTEM
RESET PORT PTC3/SCL
4.7 kΩ–10 kΩ C PTC4
ASYNCHRONOUS
INTERRUPT PTC5
IRQ
INPUT 0.1 μF NOTE 3 PTC6
PTC7
PTD0/TPM1CLK/TPM1CH0
PTG0/BKDG/MS
PTD1/TPM1CH1
PTG1/XTAL PORT PORT PTD2/TPM1CH2
PTG2/EXTAL G D
PTD3/TPM2CLK/TPM2CH0
PTG3
PTD4/TPM2CH1
NOTE 1 RF
RS XTAL PTE0/TxD1
PTE1/RxD1
C1 X1 C2 PTE2/SS
PORT
E PTE3/MISO
EXTAL
PTE4/MOSI
PTE5/SPSCK
NOTES:
1. Not required if using the internal oscillator option.
2. The 48-pin QFN has 2 VSS pins (VSS1 and VSS2), both of which must be connected to GND.
3. RC filters on RESET and IRQ are recommended for EMC-sensitive applications and systems.
35
MS-A1004
March 5, 2009
Datasheet No – PD97381
IRS20957S
Protected Digital Audio Driver
Note: Please refer to Lead Assignments for correct pin configuration. This diagram shows
electrical connections only.
36
MS-A1004
IRS20957S
UV
HIGH
Q
SIDE
INPUT CS
LOGIC HO
IN
15.3V
10.2V
HV
LEVEL VS
SHIFT HV HV
FLOATING HIGH SIDE
LEVEL LEVEL
VSS SHIFT SHIFT
5V REG VCC
UV
CHARGE/ DETECT
DISCHARGE
CSD
DEAD-TIME
LO
20.4V
SD DT
HV
LEVEL
COM
SHIFT
PROTECTION
CONTROL HV
LEVEL LOW SIDE CS OCSET
SHIFT
DT
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MS-A1004
IRS20957S
Lead Definitions
Lead Assignments
VDD 1 16 CSH
CSD 2 15 VB
IN 3 14 HO
IRS20957
VSS 4 13 VS
NC 5 12 NC
VREF 6 11 VCC
OCSET 7 10 LO
DT 8 9 COM
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MS-A1004
MIC2981/2982 Micrel, Inc.
MIC2981/2982
High-Voltage High-Current Source Driver Array
General Features
The MIC2981/82 is an 8-channel, high-voltage, high-current • Output voltage to 50V
source driver array ideal for switching high-power loads from • Output current to 500mA
logic-level TTL, CMOS, or PMOS control signals. • Transient-protected outputs
These drivers can manage multiple loads of up to 50V and • Integral clamp diodes
500mA, limited only by package power dissipation. • TTL, CMOS, or PMOS compatible inputs
Micrel’s MIC2981/82 features inputs compatible with 5V TTL Applications
and 5V to 15V CMOS or PMOS logic outputs. Micrel’s • Relay and solenoid switching
dual-marked device replaces either UDN2981 or UDN2982 • Stepping motor
devices. • LED and incandescent displays
The MIC2981/82 is available in the 18-pin plastic DIP and
18-lead wide SOP package. Both devices operate in the
industrial temperature range.
Ordering Information
Part Number
Reference Manufacturing* PbFree Temperature Range Package
MIC2981BN** MIC2981/82BN MIC2981/82YN –40ºC to +85ºC 18-pin DIP
MIC2982BN** MIC2981/82BN MIC2981/82YN –40ºC to +85ºC 18-pin DIP
MIC2981BWM** MIC2981/82BWM MIC2981/82YWM –40ºC to +85ºC 18-pin wide SOP
MIC2982BWM** MIC2981/82BWM MIC2981/82YWM –40ºC to +85ºC 18-pin wide SOP
* Order entry P/N.
**Orders for MIC2981BN or MIC2982BN will be filled with dual-marked MIC2981/82BN.
**Orders for MIC2981YN or MIC2982YN will be filled with dual-marked MIC2981/82YN.
**Orders for MIC2981BWM or MIC2982BWM will be filled with dual-marked MIC2981/82BWM.
**Orders for MIC2981YWM or MIC2982YWM will be filled with dual-marked MIC2981/82YWM.
Functional Diagrams
IN1 OUT1
VS
IN2 OUT2
20k
IN3 OUT3
1.8k
IN4–IN7 4 OUT4–OUT7 IN
800
GND
VS GND
MIC2981 Typical MIC2891/2982 Source Driver
MIC2982
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
39
MS-A1004
Pin Configuration
IN1 1 18 OUT1
IN2 2 17 OUT2
IN3 3 16 OUT3
IN4 4 15 OUT4
IN5 5 14 OUT5
IN6 6 13 OUT6
IN7 7 12 OUT7
IN8 8 11 OUT8
VS 9 10 GND
Pin Description
Pin No. Pin No. Pin Name Pin Function
1–8 IN1–IN8 Input 1 through Input 8: Base drive to driver input transistor.
9 VS Supply Input
10 GND Ground
11–18 OUT8–OUT1 Output 8 through Output 1: Emitter of Darlington driver output.
40
MS-A1004
6276
26185.201E
Data Sheet
16-BIT SERIAL-INPUT, CONSTANT-
CURRENT LATCHED LED DRIVER
The A6276 is specifically designed for LED-display applications.
A6276ELW Each BiCMOS device includes a 16-bit CMOS shift register, accom-
V DD
LOG IC panying data latches, and 16 npn constant-current sink drivers. Except
G R OUND 1 24
S UP P LY
for package style and allowable package power dissipation, the device
S E R IAL IO
DAT A IN
2
R E G ULATOR
23 R E XT
options are identical.
C LOC K 3 CK 22
S E R IAL
DAT A OUT The CMOS shift register and latches allow direct interfacing with
LAT C H 4 L OE 21 OUT P UT microprocessor-based systems. With a 5 V logic supply, typical serial
E NAB LE E NAB LE
R E G IS TE R
data-input rates are up to 20 MHz. The LED drive current is deter-
OUT 0 5 LAT C HE S 20 OUT 15
mined by the user’s selection of a single resistor. A CMOS serial data
OUT 1 6 19 OUT 14
output permits cascade connections in applications requiring additional
OUT 2 7 18 OUT 13 drive lines. For inter-digit blanking, all output drivers can be disabled
OUT 3 8 17 OUT 12 with an ENABLE input high. Similar 8-bit devices are available as the
A6275EA and A6275ELW.
OUT 4 9 16 OUT 11
Three package styles are provided: through-hole DIP (suffix A),
OUT 5 10 15 OUT 10
surface-mount SOIC (suffix LW) and TSSOP with exposed thermal pad
OUT 6 11 14 OUT 9 (suffix LP). Under normal applications, a copper lead frame and low
OUT 7 12 13 OUT 8
logic-power dissipation allow the dual in-line package to sink maxi-
mum rated current through all outputs continuously over the operating
Dwg. P P -029-11 temperature range (90 mA, 0.75 V drop, +85°C).
Note that three packages offered are electrically
identical and share a common terminal number as-
signment.
FEATURES
■ To 90 mA Constant-Current Outputs
ABSOLUTE MAXIMUM RATINGS
■ Under-Voltage Lockout
Supply Voltage, VDD ....................... 7.0 V ■ Low-Power CMOS Logic and Latches
Output Voltage Range,
■ High Data Input Rate
VO ............................. -0.5 V to +17 V
■ Functional Replacement for TB62706BN/BF
Output Current, IO ........................ 90 mA
Ground Current, IGND .............. 1475 mA Selection Guide
Input Voltage Range, Ambient
Part Number Pb-free* Package Packing
Temperature (°C)
VI .................... -0.4 V to VDD + 0.4 V
A6276EA-T Yes 24-pin DIP 15 per tube –40 to 85
Package Power Dissipation, A6276ELP-T Yes 24-pin TSSOP 62 per tube –40 to 85
PD ..................................... See Graph A6276ELPTR-T Yes 24-pin TSSOP 4000 per reel –40 to 85
Operating Temperature Range, A6276ELW-T Yes 24-pin SOICW 31 per tube –40 to 85
A6276ELWTR-T Yes 24-pin SOICW 1000 per reel –40 to 85
TA ............................. -40°C to +85°C A6276SLW-T Yes 24-pin SOICW 31 per tube –20 to 85
Storage Temperature Range, A6276SLWTR-T Yes 24-pin SOICW 1000 per reel –20 to 85
TS ........................... -55°C to +150°C *Pb-based variants are being phased out of the product line. The variants cited in this
footnote are in production but have been determined to be NOT FOR NEW DESIGN.
Caution: These CMOS devices have input static This classification indicates that sale of this device is currently restricted to existing
protection (Class 2) but are still susceptible customer applications. The variants should not be purchased for new design applica-
to damage if exposed to extremely high static tions because obsolescence in the near future is probable. Samples are no longer
electrical charges. available. Status change: May 1, 2006. These variants include:A6276EA, A6276ELW,
A6276ELWTR, A6276SA, A6276SLW, and A6276SLWTR.
41
MS-A1004
6276
16-BIT SERIAL-INPUT,
CONSTANT-CURRENT
LATCHED LED DRIVER
4.0
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
3.5
24-PIN TSSOP*, R θJA = 32°C/W
3.0
24-PIN DIP, RθJA = 50°C/W
2.5
24-LEAD SOIC, RθJA = 85°C/W
2.0
1.5
1.0
0.5
0
25 50 75 100 125 150
AMBIENT TEMPERATURE IN ° C
*Mounted on single-layer, two-sided PCB, with 3.8 in2 copper each side;
additional information on Allegro Web site
VDD
LOGIC
UVLO
CLOCK SUPPLY
SERIAL SERIAL
SERIAL-PARALLEL SHIFT REGISTER
DATA IN DATA OUT
LATCH
LATCHES
ENABLE
OUTPUT ENABLE
GROUND (ACTIVE LOW)
MOS
BIPOLAR
IO R
EXT
REGULATOR
42
MS-A1004
Philips Semiconductors Product specification
TYPICAL
SYMBOL PARAMETER CONDITIONS UNIT
HC HCT
tPHL/ tPLH propagation delay CL = 15 pF; VCC = 5 V
An to Yn 14 18 ns
E3 to Yn 16 20 ns
En to Yn 17 21 ns
CI input capacitance 3.5 3.5 pF
CPD power dissipation capacitance per package notes 1 and 2 72 76 pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
43
MS-A1004
PIN DESCRIPTION
(a)
(b)
44
MS-A1004
FUNCTION TABLE
INPUTS OUTPUTS
E1 E2 E3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
H X X X X X L L L L L L L L
X H X X X X L L L L L L L L
X X L X X X L L L L L L L L
L L H L L L H L L L L L L L
L L H H L L L H L L L L L L
L L H L H L L L H L L L L L
L L H H H L L L L H L L L L
L L H L L H L L L L H L L L
L L H H L H L L L L L H L L
L L H L H H L L L L L L H L
L L H H H H L L L L L L L H
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
45
MS-A1004
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48
MS-A1004
AK5384
107dB 24-Bit 96kHz 4-Channel ADC
GENERAL DESCRIPTION
The AK5384 is a 4-channel A/D Converter with wide sampling rate of 8kHz ∼ 96kHz and is suitable for
Multi-channel audio system. The AK5384 achieves high accuracy and low cost by using Enhanced dual
bit ΔΣ techniques. The AK5384 supports master mode and TDM format. Therefore, the AK5384 is
suitable for multi-channel audio system.
FEATURES
4-Channel ΔΣ ADC
Differential Inputs
Digital HPF for DC-Offset Cancel
S/(N+D): 100dB@5V for 48kHz
DR: 107dB@5V for 48kHz
S/N: 107dB@5V for 48kHz
Sampling Rate Ranging from 8kHz to 96kHz
Master Clock:
256fs/384fs/512fs/768fs (∼ 48kHz)
256fs/384fs (∼ 96kHz)
TTL Digital Input Level
Output format: 24bit MSB justified, I2S or TDM
Cascade TDM Interface
Master & Slave Mode
Overflow Flag
Power Supply: 4.75 to 5.25V
Power Supply for output buffer: 3.0 to 5.25V
Ta = −40 ∼ 85°C
28pin VSOP
AVDD AVSS DVDD DVSS TVDD
49
MS-A1004
Ordering Guide
Pin Layout
LIN2+ 1 28 LIN1+
LIN2- 2 27 LIN1-
RIN2+ 3 26 RIN1+
RIN2- 4 25 RIN1-
TEST 5 24 M/S
VCOM 6 23 CKS
AVSS 7 Top View 22 PDN
AVDD 8 21 DVSS
DIF 9 20 DVDD
TDM1 10 19 TVDD
TDM0 11 18 SDTO1
TDMIN 12 17 SDTO2
MCLK 13 16 BICK
OVF 14 15 LRCK
50
MS-A1004
PIN/FUNCTION
51
MS-A1004
AK4382A
112dB 192kHz 24-Bit 2ch ΔΣ DAC
GENERAL DESCRIPTION
The AK4382A offers the perfect mix for cost and performance based audio systems. Using AKM's multi
bit architecture for its modulator the AK4382A delivers a wide dynamic range while preserving linearity
for improved THD+N performance. The AK4382A has full differential SCF outputs, removing the need
for AC coupling capacitors and increasing performance for systems with excessive clock jitter. The 24 Bit
word length and 192kHz sampling rate make this part ideal for a wide range of applications including
DVD-Audio. The AK4382A is offered in a space saving 16pin TSSOP package.
FEATURES
Sampling Rate Ranging from 8kHz to 192kHz
128 times Oversampling (Normal Speed Mode)
64 times Oversampling (Double Speed Mode)
32 times Oversampling (Quad Speed Mode)
24-Bit 8 times FIR Digital Filter
On chip SCF
Digital de-emphasis for 32k, 44.1k and 48kHz sampling
Soft mute
Digital Attenuator (256 steps)
I/F format: 24-Bit MSB justified, 24/20/16-Bit LSB justified or I2S
Master clock: 256fs, 384fs, 512fs or 768fs (Normal Speed Mode)
128fs, 192fs, 256fs or 384fs (Double Speed Mode)
128fs, 192fs (Quad Speed Mode)
THD+N: -94dB
Dynamic Range: 112dB
High Tolerance to Clock Jitter
Power supply: 4.75 to 5.25V
Very Small Package: 16pin TSSOP (6.4mm x 5.0mm)
MCLK
VDD
Clock VSS
CSN De-emphasis
μP Control Divider
CCLK Interface DZFL
CDTI
DZFR
8X ΔΣ AOUTL+
LRCK Audio Interpolator Modulator SCF
AOUTL-
BICK
Data
Interface AOUTR+
SDTI 8X ΔΣ
Interpolator Modulator SCF
AOUTR-
PDN
52
MS-A1004
Ordering Guide
Pin Layout
MCLK 1 16 DZFL
BICK 2 15 DZFR
SDTI 3 14 VDD
CSN 6 11 AOUTL-
CCLK 7 10 AOUTR+
CDTI 8 9 AOUTR-
PIN/FUNCTION
53
MS-A1004
Philips Semiconductors Product specification
ORDERING INFORMATION
TYPE PACKAGE
NUMBER NAME DESCRIPTION VERSION
TDA3681J DBS17P plastic DIL-bent-SIL power package; 17 leads (lead length 7.7 mm) SOT243-3
TDA3681JR DBS17P plastic DIL-bent-SIL (special bent) power package; 17 leads SOT475-1
(lead length 12 mm)
TDA3681TH HSOP20 plastic, heatsink small outline package; 20 leads; low stand-off height SOT418-2
54
MS-A1004
Philips Semiconductors Product specification
8 TEMPERATURE
ENSW & LOAD DUMP
PROTECTION
(14 V/
BACKUP SWITCH 13 100 mA)
BU
BACKUP CONTROL
(5 V/
12 300 mA)
REGULATOR 2 REG2
20
VP2
(3.3 V/
1 1 A)
REGULATOR 4 REG4
&
6
EN4
11
HEATTAB (5 V/
n.c. 15 19 1400 mA)
REGULATOR 3 REG3
18 &
n.c.
TDA3681TH
(8.5 V/
17 600 mA)
REGULATOR 1 REG1
&
7
EN1/3
9
HOLD
+
OR
&
4
RES
5
CRES
2 3
IGNIN IGNITION BUFFER IGNOUT
10
MGU353
GND
55
MS-A1004
Philips Semiconductors Product specification
Note
1. The pin is used for final test purposes. In the
application it should be connected directly to ground.
56
MS-A1004
TL494
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
www.ti.com SLVS074E – JANUARY 1983 – REVISED FEBRUARY 2005
DESCRIPTION
The TL494 incorporates all the functions required in the construction of a pulse-width-modulation (PWM) control
circuit on a single chip. Designed primarily for power-supply control, this device offers the flexibility to tailor the
power-supply control circuitry to a specific application.
The TL494 contains two error amplifiers, an on-chip adjustable oscillator, a dead-time control (DTC) comparator,
a pulse-steering control flip-flop, a 5-V, 5%-precision regulator, and output-control circuits.
The error amplifiers exhibit a common-mode voltage range from –0.3 V to VCC – 2 V. The dead-time control
comparator has a fixed offset that provides approximately 5% dead time. The on-chip oscillator can be bypassed
by terminating RT to the reference output and providing a sawtooth input to CT, or it can drive the common
circuits in synchronous multiple-rail power supplies.
The uncommitted output transistors provide either common-emitter or emitter-follower output capability. The
TL494 provides for push-pull or single-ended output operation, which can be selected through the output-control
function. The architecture of this device prohibits the possibility of either output being pulsed twice during
push-pull operation.
The TL494C is characterized for operation from 0°C to 70°C. The TL494I is characterized for operation from
–40°C to 85°C.
AVAILABLE OPTIONS
PACKAGED DEVICES (1)
TA SHRINK SMALL THIN SHRINK
SMALL OUTLINE PLASTIC DIP SMALL OUTLINE
OUTLINE SMALL OUTLINE
(D) (N) (NS)
(DB) (PW)
0°C to 70°C TL494CD TL494CN TL494CNS TL494CDB TL494CPW
–40°C to 85°C TL494ID TL494IN — — —
(1) The D, DB, NS, and PW packages are available taped and reeled. Add the suffix R to device type (e.g., TL494CDR).
57
MS-A1004
TL494
PULSE-WIDTH-MODULATION CONTROL CIRCUITS www.ti.com
SLVS074E – JANUARY 1983 – REVISED FEBRUARY 2005
FUNCTION TABLE
INPUT TO
OUTPUT FUNCTION
OUTPUT CTRL
VI = GND Single-ended or parallel output
VI = Vref Normal push-pull operation
≈ 0.7 V Q2 11
PWM
Error Amplifier 1 C2
Comparator
1 10
1IN+ + E2
2 Pulse-Steering
1IN
Flip-Flop
Error Amplifier 2 12
16 VCC
2IN+ +
2IN 15 Reference 14
REF
Regulator
7
GND
3 0.7 mA
FEEDBACK
58
MS-A1004
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