EE419/519 Experiment #1

Buck Converter
Preliminary (Due Oct 4, 2024)
Consider the Buck converter shown below. Note that this is a negative Buck converter that converts a
negative voltage –Vd to a smaller negative voltage –Vo.

Vd=9+mod(BilkentID,7)

Vo=2.5+mod(BilkentID,7)+mod(BilkentID,4)

where mod(x,y) is the remainder of the x divided by y.

The Buck converter uses a pulse generator (NE555) generating a pulse of adjustable duty cycle between
0 and VCC. NE555 can generate pulses with a duty cycle greater than 50%. So, the first circuit shown
below is suitable for Vo>Vd/2. If your assignment requires Vo<Vd/2, use the second circuit, which
includes an inverter built by a PNP transistor, BC308, to generate pulses with a duty cycle smaller than
50%. Use UF4007 fast diode as the Buck converter diode. IRFZ44 is the switching transistor. Use a 100μF
(at least 25V) capacitor for C1, which acts like a power supply bypass capacitor.

The first circuit (for Vo>Vd/2):

R3 is a pull‐up resistor connected between the output pin (3) and VCC (pin 8) of NE555 since NE555
output contains an open‐collector output transistor. Choose the current through R3 as about 20mA
when output is low (R3=Vd/0.02). RL represents the load resistance. RS is the series resistance of the
inductor. ESR is the equivalent series resistance of the filter capacitor. RA, RB, and C set the pulse
repetition frequency and pulse duration applied to the transistor gate. R4 and R5 are small resistors (1Ω
each) used to measure the diode's current.

The figure above shows the output voltage (pin 3) of NE555. The output of NE555 (VP) high‐level
duration (when T1 is ON) is th=0.693C(RA+RB) while the repetition period is given by
Ts=0.693C(RA+2RB)=0.693C(RA+RB)(1+RB/( RA+RB)). Choose standard resistor and capacitor values.
For RA+RB, use a trimpot of RA+RB=10KΩ to adjust the switching timing and, hence, the output voltage
accurately. Use a repetition period, TS, between 15μs to 40μs.

The second circuit (for Vo<Vd/2):

R1 is a pull‐up resistor connected between the output pin (3) and VCC (pin 8) of NE555 (an open‐collector
output). Choose the current through R1 as about 5mA (R1=Vd/0.005). R2 provides the base current for
the pnp transistor. Choose R2 to provide a base current of 1mA (R2=Vd/0.001). R3 is the collector
resistance of the pnp transistor. Choose R3 to pass a current of 20mA (R3=Vd/0.02). R4 and R5 are small
resistors (1Ω each) used to measure the diode's current.

The output of NE555 (vN) low‐level duration (when vP is high and T1 is ON) is tL=0.693CRB while the
repetition period is given by Ts=0.693C(RA+2RB). Choose standard resistor and capacitor values.

To change RB, use a trimpot of RA+RB=10KΩ to adjust the switching timing and, hence, the output
voltage accurately. Use a repetition period, TS, between 15μs to 40μs.

Inductor
The parameters of the inductors are given in the following list. The series resistance, RS, of the inductor,
is also given in the list. You will be assigned to one of the inductors.

Questions
a) Find the maximum value of load resistance, Rmax, such that the inductor current is never iL=0
(continuous case). Find the minimum value of the load resistance, Rmin, to keep the inductor
peak current below 1.5A.
b) Choose a load resistance, RL=RL1, with a sufficient power rating (8.2, 10, 15, 33, 47, 68, 100, and
150Ω power resistors are available in the lab) between those limits (Rmin<RL1<Rmax), find the
corresponding duty cycle, D, to generate the required output voltage. Ignore the voltage drop
on the diode and the resistors, RS, R4, and R5, for this calculation.
c) Estimate and plot the diode current, iD(t), waveform for the chosen RL1, and the diode voltage,
vX(t) in PSS. Note that the diode current and the inductor current are equal when the switch is
off. Hence, the peak diode current is the same as the peak inductor current.
d) Estimate and plot the output ripple voltage. Assume that the ESR is the dominant mechanism
for the ripple and ESR=0.25Ω.
e) Keeping all parameters the same, estimate the output voltage, Vo, if the load resistance, RL, is
increased to above the maximum limit, RL=RL2>Rmax. For RL2, choose one of the standard values.
In this case, the inductor current is sometimes zero (discontinuous case). Estimate and plot iD(t)
and vX(t) in this case.
f) What should be the duty cycle, D, to keep the output voltage the same at the desired output
voltage with RL=RL2.
g) Perform an LTSpice simulation of the circuit using RL=RL1 as in (b). Use .include uf4007.txt spice
directive to simulate UF4007 fast diode. Use .include irfz44.txt spice directive to simulate
IRFZ44 nMOS transistor. Use C2=100μF with ESR=0.25Ω as the filter capacitor. Do not ignore the
resistors, RS, R1, and R2 for this case. By trial and error, find the duty cycle D to get the required
output voltage. Note that the duty cycle, D, value will be greater than that found in (b) because
of the voltage drop on the diode and the resistances.
h) From LTSpice simulation, plot the diode current, iD(t), and the diode voltage, vX(t) in PSS (all for
RL=RL1).
i) From LTSpice simulation, plot the output voltage in PSS and determine the value of the peak‐to‐
peak ripple (Vripple).
j) From LTSpice simulation, determine the converter's efficiency (η) in PSS. For this purpose,
record the supply current, Id, and use the equations: Pin=VdId, Pout=Vo2/RL, η=Pout/Pin.
k) Perform an LTSpice simulation using the load resistor R=RL2 as in (d) while the duty cycle is kept
at the same value as (f). Determine the output voltage.
l) In LTSpice, with R=RL2, and by trial‐and‐error determine the value of duty cycle, D, to keep the
output voltage at the desired value. Compare with the result in (f).

Inductors:
Inductor # L (μH) Rs (Ω) (@ 50 KHz)
1 502 0.96
2 446 1.06
3 131 0.50
4 119 0.41
5 347 0.91
7 652 1.11
8 173 0.61
9 169 0.56
11 326 0.52
12 337 0.55
13 169 1.14
14 119 0.43
17 201 0.53
18 315 0.43
24 408 0.55
25 108 1.39
26 326 1.90
27 155 0.80
28 147 1.09
29 174 0.92
30 137 0.49
31 482 1.91
33 160 0.60
34 319 0.55
35 278 0.55
36 258 0.42
37 459 1.22
40 245 1.23
41 245 1.06
45 356 0.61
47 435 1.25
Experimental work (Due Oct 12, 2024)
Bring with you an oscilloscope probe and a breadboard.

a) First, set up only your NE555 circuit on the breadboard, including the pull‐up resistor at the
output pin. If you use the second circuit, add the BC308 (pnp) transistor and its resistors (R2 and
R3). Do not add the switch transistor, the diode, or inductor, yet. As C1, use a 100μF (25V or
higher) capacitor. Watch out for the polarities of electrolytic capacitors. Incorrectly placed
electrolytic capacitors may explode and cause serious injury. Apply the supply voltage, Vd. Using
the oscilloscope probe measure the voltage vP to GND. Note that GND is the positive end of the
power supply Vd. You should have a periodic negative pulse of magnitude varying between −Vd
and zero at the intended repetition period. This voltage will be applied to the gate of the
MOSFET transistor. To turn on the MOSFET transistor fully, the gate pulse should vary between
0 to −Vd. The duty cycle is determined by the ratio of zero voltage duration to the repetition
period. If the waveform is incorrect, check the timing resistors and the capacitor connections.

b) If the repetition period and the duty cycle are correct, add the transistor IRFZ44 as the switch
and UF4007 as the diode. You may find the datasheets of these components in Moodle. Add the
inductor and the capacitor C2. Make sure that the diode direction and capacitor polarity are
correct. Add a load resistor of RL=10KΩ. Apply the supply voltage Vd, and using the oscilloscope
probe, measure the voltage between vX and GND. The voltage should vary between +0.6 to −Vd.
There will also be an oscillatory portion in the waveform toward the end of the cycle. Vo, the DC
voltage across RL, measured by the multimeter, should be nearly equal to Vd. If not, check your
connections. Some breadboard pins may be loose and not make good contact.

c) If vX(t) voltage looks like the expected waveform, change the load resistor to RL1. Apply the
supply voltage, Vd. Record the output ripple voltage. Use AC coupling in the oscilloscope
channel to zoom in on the waveform. Use external triggering using the NE555 output pulse.
Compare with the results of the preliminary work (g), (i), and (j).

Vd Id RL=RL1 D Vo η (%) Vripple

d) Record vX(t) and iD(t). Use vR(t) to measure the diode current: iD(t)=2 × vR(t) (since R1 ∥ R2=0.5Ω).
If vR(t) is noisy, use the averaging option of the oscilloscope to get a cleaner waveform.
Compare the waveforms with those found in (h) of the preliminary work.

e) Replace the load resistance to R=RL2. Change the duty cycle by trimpot to get the desired output
voltage. Compare the results with the preliminary work (l).
Vd RL=RL2 D Vo
Preliminary
Experiment