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HDL Code Generation Onboarding

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Vidhya Pathi
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0% found this document useful (0 votes)
20 views

HDL Code Generation Onboarding

Uploaded by

Vidhya Pathi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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HDL Code Generation Onboarding Program

The HDL Code Generation Onboarding program is a learning path designed to help engineers ramp up on
generating HDL Code from Simulink® blocks, MATLAB® code, and Stateflow® charts.. The
program features a variety of resources including videos, self-paced training, webinars and on-site sessions.
To request on-site training or for more information, contact your account manager.

Category Activity Duration Resource Type Cost

Phase 1: Introduction to 45 min. Online Video Complimentary


Fundamentals of MATLAB
Model-Based Onramp
Design
Simulink 2 min. each Online Video Complimentary
Overview #1
Online Video
#2

Introduction to 1 hr Video series Complimentary


Simulink
Onramp

Modeling and 30 min. Online Video Complimentary


Simulation Made
Easy with
Simulink

MATLAB 1 day Onsite training Fee-based


Fundamentals Or training
Self-paced
Online

Simulink 2 days Onsite training- Fee-based


Fundamentals Days 2-3 of 5 training
day

Stateflow 2 days Onsite training- Fee-based


Fundamentals Days 4-5 of 5 training
day

Getting Started (2) 1 hr. MathWorks Complimentary


with Simulink / sessions Engineer Onsite
Stateflow

© 2018 The MathWorks, Inc. MATLAB and Simulink are registered trademarks of The MathWorks, Inc. See mathworks.com/trademarks for a list of additional trademarks.
Other product or brand names may be trademarks or registered trademarks of their respective holders.

mathworks.com
Getting Started N/A documentation Complimentary
with Simulink

Phase 2: Design and 40 min. On Line Video Complimentary


Modeling Verification of
Environment and FPGA and ASIC
Deployment to Applications
FPGA’s
Designing for 8 min. Online Video Complimentary
HDL Code
Generation

HDL 25 min. On-Line Video Complimentary


Implementation
and Verification
of a High-
Performance
FFT

HDL Coder Self- N/A Free Download Complimentary


Guided Tutorial

Methodology N/A Documentation Complimentary


guide for and examples
(download)
learning and
evaluating HDL
Coder

Training Class: 3 days (Link) for Details Fee Based


FPGA and
hardware design
for DSP
Engineers

Technical 2 hrs. MathWorks Complimentary


Seminar: Engineer Onsite
Introduction to
HDL Coder and
HDL Verifier

Technical 2 hours MathWorks Complimentary


Seminar: Signal Engineer Onsite

© 2018 The MathWorks, Inc. MATLAB and Simulink are registered trademarks of The MathWorks, Inc. See mathworks.com/trademarks for a list of additional trademarks.
Other product or brand names may be trademarks or registered trademarks of their respective holders.

mathworks.com
Processing
Design for
FPGAs: A
Model-Based
Approach

Generating HDL 2 days On-site training Fee-based


Code from training
Simulink

HDL Coder N/A Documentation: Complimentary


Documentation HDL Verifier

Phase 3: What is HDL 2 min. Online Video Complimentary


Verification of Verifier
VHDL and Verilog

Improve RTL 40 min. Online Video Complimentary


Verification by
Connecting to
MATLAB

Generating a 5 min. Online Video Complimentary


UVM verification
checker model

Import HDL for 5 min. Online video Complementary


Cosimulation
with Simulink

Using Custom 2 min. Online Video Complimentary


Boards for
FPGA-in-the-
Loop Verification

HDL Verifier: 4 min. Online Video Complimentary


FPGA Data
Capture

MATLAB as AXI 5 min. Online Video Complimentary


Master with
Xilinx FPGA and

© 2018 The MathWorks, Inc. MATLAB and Simulink are registered trademarks of The MathWorks, Inc. See mathworks.com/trademarks for a list of additional trademarks.
Other product or brand names may be trademarks or registered trademarks of their respective holders.

mathworks.com
Zynq SoC
Boards

HDL Verifier N/A Documentation: Complimentary


Documentation HDL Verifier

Phase 4: System Programming 13 min. Online Video Complimentary


on a Chip (SoC), Intel SoC FPGAs
and Application- with Embedded
Specific Topics Coder and HDL
Coder

Getting Started 22 min. Online Video Complimentary


with Software-
Defined Radio
using MATLAB
and Simulink

Verify Xilinx 18 min. Online Video Complimentary


RFSoC System
Performance
with MATLAB
and Simulink

Vision 5 x 5 min. Online Video Complimentary


Processing for videos Series
FPGA

CPU, FPGA, and 16 min. Online Video Complimentary


I/O Solutions for
Real-Time
Simulation and
Testing with
Simulink

Hardware-in-the- 26 min. Online Video Complimentary


Loop (HIL)
Simulation for
Power
Electronics

© 2018 The MathWorks, Inc. MATLAB and Simulink are registered trademarks of The MathWorks, Inc. See mathworks.com/trademarks for a list of additional trademarks.
Other product or brand names may be trademarks or registered trademarks of their respective holders.

mathworks.com
Systems

Programming 2 days Onsite training Fee based


Xilinx Zynq SoCs 2 days
with MATLAB
and Simulink

Software- 2 hours MathWorks Complimentary


Defined Radio Engineer
Prototyping with Onsite
Simulink

© 2018 The MathWorks, Inc. MATLAB and Simulink are registered trademarks of The MathWorks, Inc. See mathworks.com/trademarks for a list of additional trademarks.
Other product or brand names may be trademarks or registered trademarks of their respective holders.

mathworks.com

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