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Analog Assignment 1

Analog VLSI

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0% found this document useful (0 votes)
2 views

Analog Assignment 1

Analog VLSI

Uploaded by

simranjit28p
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Indian Institute of Technology

Roorkee

Analog VLSI Circuit Design


(ECC-537)
(Assignment-1)

Submitted to: Submitted by:


Dr Bishnu Prasad Das Simranjit Singh
24915017
PhD
Simranjit Singh 24915017

Assignment - 1
AIM: Transistor Characterization
a.) Plot the output I-V characteristics and input characteristics of NMOS
transistors having (W/L)=1u/0.18u, for Vgs ={ 0, 0.4, 0.8, 1.0, 1.2, 1.6, 1.8}
Volts.
b.) Plot the trans-conductance “gm” of NMOS transistors having (W/L)=
1u/0.18u versus the overdrive voltage (Vgs –Vth) for a particular Vds.
c.) Plot the trans-conductance “gm” of NMOS transistors having (W/L)=
1u/0.18u versus the drain current Id.
d.) Plot the trans-conductance “gm” of NMOS transistors having (W/L)=
1u/0.18u and Id = 200uA versus the overdrive voltage (Vgs –Vth).

Schematic/Theory: An NMOS (N-channel Metal-Oxide-Semiconductor) transistor is a


type of MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) used in electronic
circuits for switching and amplification. It has three terminals: the gate (G), the drain (D),
and the source (S). The operation of the NMOS transistor is controlled by the voltage
applied to the gate terminal relative to the source terminal.

Working Principle

 Gate Voltage (Vgs): When a positive voltage is applied to the gate relative to the
source, it creates an electric field that attracts electrons to the channel, forming a
conductive path between the drain and source.
 Drain-Source Voltage (Vds): This voltage drives the current through the channel
from the drain to the source.

The current flowing from the drain to the source (ID) is controlled by the gate-source
voltage (Vgs).

Fig 1: Schematic of NMOS Transistor


Components and Connections

1. NMOS Transistor (M0):


o Instance Label: M0.
o Model: n18 (indicating it is an NMOS transistor from the 180nm process
technology).
o Width (W): 1µm.
o Length (L): 0.18µm.
o Multiplier (m): 1 (indicating a single transistor).
2. Voltage Source for Gate (V0):
o Type: DC voltage source.
o Label: vdc=Vgs
o Connection:
 Positive terminal connected to the gate of the NMOS transistor.
 Negative terminal connected to ground.
3. Voltage Source for Drain (V1):
o Type: DC voltage source.
o Label: vdc=Vds
o Connection:
 Positive terminal connected to the drain of the NMOS transistor.
 Negative terminal connected to ground.
4. Ground Connections:
o The source of the NMOS transistor is connected to ground.
o The negative terminals of both voltage sources are connected to ground.

(a)Input and Output Characteristics of NMOS Transistor

Transfer characteristics of an NMOS transistor describe the relationship between


the gate voltage (Vgs) and the drain current (Id), while keeping the drain voltage
(Vds) constant. We have taken the value of Vds = 1.8 Volt. Fig 2 shows the transfer
characteristics of a NMOS transistor. The equation that represents this formula is:

𝑾 𝟐
𝑰𝒅 = 𝝁𝒏 𝑪𝒐𝒙 (𝑽𝒈𝒔 − 𝑽𝒕𝒉 )
𝑳

As the figure represents the drain current is zero when (Vgs < Vth). After Vth the drain
2
current increases according to formula. Id is directly proportional to the (Vgs − Vth ) ,
therefore current increases with increase in the gate voltage Vgs.
Fig 2: Input Characteristics of NMOS Transistor

Output characteristics of an NMOS transistor depict the relationship between the drain
current (Id) and the drain-source voltage (Vds), while keeping the gate voltage (Vgs)
constant. In simpler terms, it shows how the current flowing through the transistor changes
as the voltage across it changes, for different levels of gate voltage. Figure 3 shows the
diagram for the output characteristics of a NMOS transistor.

The output characteristics of an NMOS transistor are divided into three main regions:

Triode (Linear) Region (Vds < Vgs - Vth): Occurs when Vds is small compared to (Vgs -
Vth) that is , where Vth is the threshold voltage. The transistor behaves like a voltage-
controlled resistor. Drain current (Id) increases linearly with Vds. In the triode region, the
drain current (Id) is given by:

1 𝑾
𝑰𝒅 = 𝝁𝒏 𝑪𝒐𝒙 [𝟐(𝑽𝒈𝒔 − 𝑽𝒕𝒉 )𝑽𝒅𝒔 − 𝑽𝟐𝒅𝒔 ]
2 𝑳

Saturation (Active) Region (Vds >= Vgs - Vth): Occurs when Vds is larger than (Vgs - Vth). The
transistor operates as an amplifier. Drain current (Id) becomes almost independent of Vds and is
primarily determined by Vgs. In the saturation region, the drain current (Id) is given by:

𝟏 𝑾 𝟐
𝑰𝒅 = 𝝁𝒏 𝑪𝒐𝒙 (𝑽𝒈𝒔 − 𝑽𝒕𝒉 )
𝟐 𝑳

Cut-off Region (Vgs < Vth): Occurs when Vgs is less than Vt. The transistor is essentially
off, and the drain current is very small (ideally zero). In the cut-off region, the drain current
is ideally zero.

𝑰𝒅 = 𝟎
Fig 3: Output Characteristics of NMOS Transistor

(b)Trans-conductance(gm) vs Overdrive Voltage(Vgs-Vth)

Trans-conductance(gm), also known as mutual conductance, is a measure of how effectively


a field-effect transistor (FET) converts an input voltage change into an output current change.
Its essentially a measure of the transistor's gain.

Fig 4: Transconductance vs Overdrive Voltage


This graph is well described by the equation by the equation

𝑾
𝒈𝒎 = 𝝁𝒏 𝑪𝒐𝒙 (𝑽 − 𝑽𝒕𝒉 )
𝑳 𝒈𝒔
Concept: To Plot this graph in cadence we first plot gm vs Vgs graph and (Vgs-
Vth) vs Vgs graph. Then by using the feature of cadence software Y vs Y we can
plot the required Trans-conductance(gm) vs Overdrive Voltage(Vgs-Vth) plot.

(c)Trans-conductance(gm) vs Drain Current(Id)

The equation that governs this graph is with W/L remains constant.

𝑾
𝒈𝒎 = √𝟐𝝁𝒏 𝑪𝒐𝒙 𝑰
𝑳 𝒅

Concept: To Plot this graph in cadence we first plot gm vs Vgs graph and Id vs Vgs
graph. Then by using the feature of cadence software Y vs Y we can plot the
required Trans-conductance(gm) vs Drain Current(Id) plot.

Fig 5: Transconductance vs Drain Current

(d)Trans-conductance(gm) vs Overdrive Voltage(Vgs-Vth) with constant


current source of 200𝝁A.

As the question suggests we have use constant current source of 200𝜇A. The
schematic is exctly same as the previous one just we have replaced the voltage
source at the drain end with current source of 200𝜇A.
Fig 6: Schematic with Current Source of 200𝜇A

Concept: To Plot this graph in cadence we first plot gm vs Vgs graph and (Vgs-
Vth) vs Vgs graph. Then by using the feature of cadence software Y vs Y we can
plot the required Trans-conductance(gm) vs Overdrive Voltage(Vgs-Vth) plot.

The equation that describes this Trans-conductance(gm) vs Overdrive


Voltage(Vgs-Vth) with constant current is:

𝟐𝑰𝒅
𝒈𝒎 =
𝑽𝒈𝒔 − 𝑽𝒕𝒉

Fig 7: Transconductance vs Overdrive Voltage with constant current

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