UM1718

User manual
STM32CubeMX for STM32 configuration
and initialization C code generation

Introduction
STM32CubeMX is a graphical tool for STM32 products. It is part of the STM32Cube initiative
(see Section 1), and is available as a standalone application as well as in the
STM32CubeIDE toolchain.
STM32CubeMX has the following key features:
• Easy microcontroller selection covering the whole STM32 portfolio
• Board selection from a list of STMicroelectronics boards
• Easy microcontroller configuration (pins, clock tree, peripherals, middleware) and
generation of the corresponding initialization C code
• Easy switching to another microcontroller by importing a previously-saved
configuration to a new MCU project
• Easy exporting of current configuration to a compatible MCU
• Generation of configuration reports
• Generation of embedded C projects for a selection of integrated development
environment tool chains (STM32CubeMX projects include the generated initialization C
code, MISRA 2004 compliant STM32 HAL drivers, the middleware stacks required for the
user configuration, and all the relevant files for opening and building the project in the
selected IDE)
• Power consumption calculation for a user-defined application sequence
• Self-updates allowing the user to keep STM32CubeMX up-to-date
• Download and update of STM32Cube embedded software required for user application
development (see Appendix E for details on the STM32Cube embedded software offer)
• Download of CAD resources (schematic symbols, PCB footprints, and 3D models)
Although STM32CubeMX offers a user interface and generates C code compliant with
STM32 MCU design and firmware solutions, users need to refer to the product technical
documentation for details on actual implementation of peripherals and firmware. The
following documents are available on www.st.com:
• STM32 microcontroller reference manuals and datasheets
• STM32Cube HAL/LL driver user manuals for STM32C0 (UM2985), STM32F0
(UM1785), STM32F1 (UM1850), STM32F2 (UM1940), STM32F3 (UM1786), STM32F4
(UM1725), STM32F7 (UM1905), STM32G0 (UM2303), STM32G4 (UM2570), STM32H5
(UM3132), STM32H7 (UM2217), STM32L0 (UM1749), STM32L1 (UM1816),
STM32L4/L4+ (UM1884), STM32L5 (UM2659), STM32MP1
(https://wiki.st.com/stm32mpu), STM32U5 (UM2883), STM32WL (UM2642), STM32WB
(UM2442), and STM32WBA (UM3131).

November 2024 UM1718 Rev 46 1/557

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Contents

1 STM32Cube overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2 Getting started with STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2.1 Principles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.2 Key features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.3 Rules and limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

3 Installing and running STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . 31

3.1 System requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.1.1 Supported operating systems and architectures . . . . . . . . . . . . . . . . . . 31
3.1.2 Memory prerequisites . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.1.3 Software requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.2 Installing/uninstalling STM32CubeMX standalone version . . . . . . . . . . . 33
3.2.1 Installing STM32CubeMX standalone version . . . . . . . . . . . . . . . . . . . . 33
3.2.2 Installing STM32CubeMX from command line . . . . . . . . . . . . . . . . . . . 41
3.2.3 Uninstalling STM32CubeMX standalone version . . . . . . . . . . . . . . . . . 42
3.3 Launching STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.3.1 Running STM32CubeMX as a standalone application . . . . . . . . . . . . . 44
3.3.2 Running STM32CubeMX in command-line mode . . . . . . . . . . . . . . . . . 44
3.4 Getting updates using STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.4.1 Running STM32CubeMX behind a proxy server . . . . . . . . . . . . . . . . . . 49
3.4.2 Updater configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.4.3 Installing STM32 MCU packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.4.4 Installing STM32 MCU package patches . . . . . . . . . . . . . . . . . . . . . . . . 54
3.4.5 Installing embedded software packs . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.4.6 Removing already installed embedded software packages . . . . . . . . . . 59
3.4.7 Checking for updates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

4 STM32CubeMX user interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

4.1 Home page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.1.1 File menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.1.2 Window menu and Outputs tabs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.1.3 Help menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
4.1.4 Social links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

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4.2 New Project window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

4.2.1 MCU selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.2.2 Board selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.2.3 Example selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.2.4 Cross selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.3 Project page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.4 Boot chain (STM32MPUs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.4.1 Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.4.2 Coprocessor initializers (STM32MP2x) . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.4.3 Boot device selection (STM32MP25) . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.5 Pinout & Configuration view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.5.1 Component list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.5.2 Component Mode panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.5.3 Pinout view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.5.4 Pinout menu and shortcuts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.5.5 Pinout view advanced actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
4.5.6 Keep Current Signals Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.5.7 Pinning and labeling signals on pins . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.5.8 Pinout for multi-bonding packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.5.9 System view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.5.10 Component configuration panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.5.11 User Constants configuration window . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.5.12 GPIO configuration window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
4.5.13 DMA configuration window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
4.5.14 NVIC configuration window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
4.5.15 FreeRTOS configuration panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
4.5.16 Setting HAL timebase source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
4.6 Pinout & Configuration view for STM32MPUs . . . . . . . . . . . . . . . . . . . . 126
4.6.1 Run time configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
4.6.2 Boot stages configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
4.7 RIF configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
4.7.1 Configuration approach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
4.7.2 RIF global configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
4.7.3 Peripherals protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
4.7.4 Peripheral instance protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
4.7.5 IP feature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

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4.7.6 Software constraints validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

4.7.7 Masters configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
4.7.8 Service peripherals protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
4.7.9 System peripherals (STM32MP2 and STM32N6 series) . . . . . . . . . . . 147
4.7.10 Memories protection for STM32MP2 series . . . . . . . . . . . . . . . . . . . . 154
4.7.11 Memories protection for STM32N6 series . . . . . . . . . . . . . . . . . . . . . . 162
4.7.12 RIF code generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
4.7.13 Implementation of illegal access controller (IAC) feature on
STM32N6 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
4.8 Pinout & Configuration view for STM32H7 dual-core products . . . . . . . 167
4.9 Enabling security in Pinout & Configuration view
(STM32L5 and STM32U5 series only) . . . . . . . . . . . . . . . . . . . . . . . . . . 169
4.9.1 Privilege access for peripherals, GPIO EXTIs and DMA requests . . . 169
4.9.2 Secure/nonsecure context assignment for
GPIO/peripherals/middleware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
4.9.3 NVIC and context assignment for peripherals interrupts . . . . . . . . . . . 173
4.9.4 DMA (context assignment and privilege access settings) . . . . . . . . . . 173
4.9.5 GTZC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
4.9.6 OTFDEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
4.10 Clock Configuration view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
4.10.1 Clock tree configuration functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
4.10.2 Securing clock resources (STM32L5 series only) . . . . . . . . . . . . . . . . 181
4.10.3 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
4.10.4 STM32F43x/42x power overdrive feature . . . . . . . . . . . . . . . . . . . . . . 185
4.10.5 Clock tree glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
4.11 Project Manager view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
4.11.1 Project tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
4.11.2 Code Generator tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
4.11.3 Advanced Settings tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
4.12 Import Project window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
4.13 Set unused/reset used GPIOs windows . . . . . . . . . . . . . . . . . . . . . . . . . 203
4.14 Update Manager windows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
4.15 Software Packs component selection window . . . . . . . . . . . . . . . . . . . . 205
4.15.1 Introduction on software components . . . . . . . . . . . . . . . . . . . . . . . . . 207
4.15.2 Filter panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
4.15.3 Packs panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
4.15.4 Component dependencies panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210

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4.15.5 Details and Warnings panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211

4.15.6 Updating the tree view for additional software components . . . . . . . . 212
4.16 LPBAM Scenario & Configuration view . . . . . . . . . . . . . . . . . . . . . . . . . 213
4.17 CAD Resources view section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
4.18 Boot path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
4.18.1 Available boot paths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
4.18.2 Creating a boot path project: an example . . . . . . . . . . . . . . . . . . . . . . 223
4.18.3 How to configure an OEM-iRoT boot path . . . . . . . . . . . . . . . . . . . . . . 223
4.18.4 How to configure an ST-iRoT boot path . . . . . . . . . . . . . . . . . . . . . . . . 237
4.18.5 How to configure an ST-iRoT with a secure manager NS application
boot path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
4.18.6 How to configure an assembled boot path . . . . . . . . . . . . . . . . . . . . . 250
4.18.7 How to configure OEM-uRoT (STiRot uROT) boot path . . . . . . . . . . . 255
4.18.8 How to configure ST-iRoT boot path with STM32H7RS devices . . . . . 260
4.19 User authentication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264
4.19.1 Login with an existing my.st.com account . . . . . . . . . . . . . . . . . . . . . . 264
4.19.2 Create a my.st.com account . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
4.19.3 Password restoration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270
4.19.4 Authentication through command line interface . . . . . . . . . . . . . . . . . . 272
4.20 About window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273

5 STM32CubeMX tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274

5.1 External Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
5.2 Compare Projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
5.2.1 User interface of the Compare Projects tool . . . . . . . . . . . . . . . . . . . . 275
5.2.2 Steps of comparing two projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276
5.2.3 The output of the comparison of 2 projects . . . . . . . . . . . . . . . . . . . . . 278
5.2.4 Saving the comparison result of the two projects . . . . . . . . . . . . . . . . 281
5.3 Power Consumption Calculator view . . . . . . . . . . . . . . . . . . . . . . . . . . . 283
5.3.1 Building a power consumption sequence . . . . . . . . . . . . . . . . . . . . . . 284
5.3.2 Configuring a step in the power sequence . . . . . . . . . . . . . . . . . . . . . 288
5.3.3 Managing user-defined power sequence and reviewing results . . . . . 291
5.3.4 Power sequence step parameters glossary . . . . . . . . . . . . . . . . . . . . . 294
5.3.5 Battery glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
5.3.6 SMPS feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
5.3.7 Bluetooth Low-Energy®/ZigBee® support (STM32WB series only) . . . 302

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5.3.8 Sub-GHz support (STM32WL series only) . . . . . . . . . . . . . . . . . . . . . . 304

5.3.9 Example feature (STM32MPUs and STM32H7 dual-core only) . . . . . 304
5.4 DDR Suite (STM32MPUs only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 306
5.4.1 DDR configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307
5.4.2 Connection to the target and DDR register loading . . . . . . . . . . . . . . . 309
5.4.3 DDR testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
5.5 STM32CubeMX Memory Management Tool . . . . . . . . . . . . . . . . . . . . . 313
5.5.1 STM32U5, STM32H5, STM32WBA, and STM32WBAM
with TrustZone activated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
5.5.2 An end-to-end usage example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
5.5.3 STM32H7 single core and STM32U5 without TrustZone activated . . . 328
5.5.4 STM32WBxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334
5.5.5 STM32H7 Dual-core without Trust Zone activated . . . . . . . . . . . . . . . 336
5.5.6 STM32H7RS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349
5.5.7 STM32WB0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361
5.5.8 Notification MMT/boot path (STM32H7RS and STM32H5) . . . . . . . . . 363

6 STM32CubeMX C Code generation overview . . . . . . . . . . . . . . . . . . . 366

6.1 STM32Cube code generation using only HAL drivers
(default mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 366
6.2 STM32Cube code generation using Low Layer drivers . . . . . . . . . . . . . 368
6.3 Custom code generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374
6.3.1 STM32CubeMX data model for FreeMarker user templates . . . . . . . . 374
6.3.2 Saving and selecting user templates . . . . . . . . . . . . . . . . . . . . . . . . . . 375
6.3.3 Custom code generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375
6.4 Additional settings for C project generation . . . . . . . . . . . . . . . . . . . . . . 377

7 Code generation for dual-core MCUs

(STM32H7 dual-core product lines only) . . . . . . . . . . . . . . . . . . . . . . . 381

8 Code generation with TrustZone® enabled (STM32L5 series only) . 383

9 Device tree generation (STM32MPUs only) . . . . . . . . . . . . . . . . . . . . 387

9.1 Device tree overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387
9.2 STM32CubeMX Device tree generation . . . . . . . . . . . . . . . . . . . . . . . . . 389

10 Support of additional software components using

CMSIS-Pack standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 391

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11 Tutorial 1: From pinout to project C code generation

using an MCU of the STM32F4 series . . . . . . . . . . . . . . . . . . . . . . . . . 394
11.1 Creating a new STM32CubeMX Project . . . . . . . . . . . . . . . . . . . . . . . . 394
11.2 Configuring the MCU pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 396
11.3 Saving the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399
11.4 Generating the report . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400
11.5 Configuring the MCU clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400
11.6 Configuring the MCU initialization parameters . . . . . . . . . . . . . . . . . . . . 403
11.6.1 Initial conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 403
11.6.2 Configuring the peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 404
11.6.3 Configuring the GPIOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 406
11.6.4 Configuring the DMAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 407
11.6.5 Configuring the middleware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 408
11.7 Generating a complete C project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412
11.7.1 Setting project options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412
11.7.2 Downloading firmware package and generating the C code . . . . . . . . 413
11.8 Building and updating the C code project . . . . . . . . . . . . . . . . . . . . . . . . 418
11.9 Switching to another MCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423

12 Tutorial 2 - Example of FatFs on an SD card using

STM32429I-EVAL evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . 424

13 Tutorial 3 - Using the Power Consumption Calculator

to optimize the embedded application consumption and more . . . . 432
13.1 Tutorial overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 432
13.2 Application example description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433
13.3 Using the Power Consumption Calculator . . . . . . . . . . . . . . . . . . . . . . . 433
13.3.1 Creating a power sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433
13.3.2 Optimizing application power consumption . . . . . . . . . . . . . . . . . . . . . 435

14 Tutorial 4 - Example of UART communications with

an STM32L053xx Nucleo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 442
14.1 Tutorial overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 442
14.2 Creating a new STM32CubeMX project and
selecting the Nucleo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 442
14.3 Selecting the features from the Pinout view . . . . . . . . . . . . . . . . . . . . . . 444

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14.4 Configuring the MCU clock tree from the Clock Configuration view . . . . 446
14.5 Configuring the peripheral parameters from the Configuration view . . . 447
14.6 Configuring the project settings and generating the project . . . . . . . . . . 450
14.7 Updating the project with the user application code . . . . . . . . . . . . . . . . 451
14.8 Compiling and running the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 452
14.9 Configuring Tera Term software as serial communication
client on the PC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 452

15 Tutorial 5: Exporting current project configuration to

a compatible MCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454

16 Tutorial 6 – Adding embedded software packs to user projects . . . 458

17 Tutorial 7 – Using the X-Cube-BLE1 software pack . . . . . . . . . . . . . . 461

18 Creating LPBAM projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470

18.1 LPBAM overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470
18.1.1 LPBAM operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470
18.1.2 LPBAM firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470
18.1.3 Supported series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470
18.1.4 LPBAM design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471
18.1.5 LPBAM project support in STM32CubeMX . . . . . . . . . . . . . . . . . . . . . 471
18.2 Creating an LPBAM project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472
18.2.1 LPBAM feature availability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472
18.2.2 Describing an LPBAM project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472
18.2.3 Managing LPBAM applications in a project . . . . . . . . . . . . . . . . . . . . . 473
18.3 Describing an LPBAM application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474
18.3.1 Overview (SoC & IPs configuration, runtime scenario) . . . . . . . . . . . . 474
18.3.2 SoC& IPs: configuring the clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 476
18.3.3 SoC & IPs: configuring the IPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 476
18.3.4 SoC & IPs: configuring Low Power settings . . . . . . . . . . . . . . . . . . . . 478
18.3.5 LPBAM scenario: managing queues . . . . . . . . . . . . . . . . . . . . . . . . . . 478
18.3.6 Queue description: managing nodes . . . . . . . . . . . . . . . . . . . . . . . . . . 479
18.3.7 Queue description: configuring the queue in circular mode . . . . . . . . . 480
18.3.8 Queue description: configuring the DMA channel hosting the queue . 481
18.3.9 Node description: accessing contextual help and documentation . . . . 482
18.3.10 Node description: configuring node parameters . . . . . . . . . . . . . . . . . 483

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18.3.11 Node description: configuring a trigger . . . . . . . . . . . . . . . . . . . . . . . . 484

18.3.12 Node description: reconfiguring a DMA for Data transfer . . . . . . . . . . 485
18.4 Checking the LPBAM design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
18.5 Generating a project with LPBAM applications . . . . . . . . . . . . . . . . . . . 488
18.6 LPBAM application for TrustZone® activated projects . . . . . . . . . . . . . . 489

Appendix A STM32CubeMX pin assignment rules . . . . . . . . . . . . . . . . . . . . . . 493

A.1 Block consistency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 493
A.2 Block inter-dependency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 497
A.3 One block = one peripheral mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 499
A.4 Block remapping (STM32F10x only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 499
A.5 Function remapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500
A.6 Block shifting (only for STM32F10x and when
“Keep Current Signals placement” is unchecked) . . . . . . . . . . . . . . . . . . 501
A.7 Setting and clearing a peripheral mode. . . . . . . . . . . . . . . . . . . . . . . . . . 502
A.8 Mapping a function individually . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 502
A.9 GPIO signals mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 502

Appendix B STM32CubeMX C code generation design

choices and limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 503
B.1 STM32CubeMX generated C code and user sections . . . . . . . . . . . . . . 503
B.2 STM32CubeMX design choices for peripheral initialization . . . . . . . . . . 503
B.3 STM32CubeMX design choices and limitations for
middleware initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504
B.3.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504
B.3.2 USB host. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505
B.3.3 USB device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505
B.3.4 FatFs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505
B.3.5 FreeRTOS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 506
B.3.6 LwIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 507
B.3.7 Libjpeg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 509
B.3.8 Mbed TLS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 510
B.3.9 TouchSensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513
B.3.10 PDM2PCM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516
B.3.11 STM32WPAN BLE/Thread (STM32WB series only). . . . . . . . . . . . . . . 517
B.3.12 CMSIS packs selection limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521

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B.3.13 OpenAmp and RESMGR_UTILITY

(STM32MPUs and STM32H7 dual-core products) . . . . . . . . . . . . . . . . 522

Appendix C STM32 microcontrollers naming conventions . . . . . . . . . . . . . . . 525

Appendix D STM32 microcontrollers power consumption parameters . . . . . 527

D.1 Power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527
D.1.1 STM32L1 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527
D.1.2 STM32F4 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528
D.1.3 STM32L0 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 529
D.2 Power consumption ranges. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 530
D.2.1 STM32L1 series features three VCORE ranges. . . . . . . . . . . . . . . . . . 530
D.2.2 STM32F4 series features several VCORE scales . . . . . . . . . . . . . . . . 531
D.2.3 STM32L0 series features three VCORE ranges. . . . . . . . . . . . . . . . . . 531

Appendix E STM32Cube embedded software packages . . . . . . . . . . . . . . . . . 532

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 533

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List of tables

Table 1. Command line summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Table 2. Home page shortcuts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 3. Window menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 4. Help menu shortcuts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 5. Component list, mode icons and color schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 6. Pinout menu and shortcuts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 7. Configuration states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Table 8. Peripheral and Middleware configuration window buttons and tooltips . . . . . . . . . . . . . . 100
Table 9. Clock configuration view widgets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
Table 10. Clock Configuration security settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Table 11. Voltage scaling versus power overdrive and HCLK frequency . . . . . . . . . . . . . . . . . . . . . 186
Table 12. Relations between power over-drive and HCLK frequency . . . . . . . . . . . . . . . . . . . . . . . 186
Table 13. Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
Table 14. Additional software window - Filter icons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
Table 15. Additional Software window – Packs panel columns . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
Table 16. Additional Software window – Packs panel icons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
Table 17. Component dependencies panel contextual help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211
Table 18. Boot paths without TrustZone® (TZEN = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
Table 19. Boot paths with TrustZone® (TZEN = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Table 20. Boot paths for STM32H7RS devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Table 21. LL versus HAL code generation: drivers included in STM32CubeMX projects . . . . . . . . 369
Table 22. LL versus HAL code generation: STM32CubeMX generated header files . . . . . . . . . . . . 369
Table 23. LL versus HAL: STM32CubeMX generated source files . . . . . . . . . . . . . . . . . . . . . . . . . 370
Table 24. LL versus HAL: STM32CubeMX generated functions and function calls . . . . . . . . . . . . . 370
Table 25. Files generated when TrustZone® is enabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 385
Table 26. Connection with hardware resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467
Table 27. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 533

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List of figures

Figure 1. Overview of STM32CubeMX C code generation flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 2. Full disk access for macOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 3. Select install mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 4. Welcome panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 5. License agreement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 6. Terms of use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 7. Default installation path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 8. Setup of shortcuts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 9. Package installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 10. Installation script . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 11. Installation path. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 12. Current user shortcut creation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 13. Package installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 14. Installation completed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 15. Example of installation in interactive mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 16. STM32Cube installation wizard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 17. Displaying Windows default proxy settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 18. Updater Settings window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 19. Connection Parameters tab - Manual Configuration of Proxy Server . . . . . . . . . . . . . . . . . 51
Figure 20. Connection failure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 21. Embedded Software Packages Manager window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 22. Managing embedded software packages - Help menu . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 23. Managing embedded software packages - Adding a new url . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 24. Checking the validity of vendor pack.pdsc file url . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 25. User-defined list of software packs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 26. Selecting an embedded software pack release . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 27. License agreement acceptance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 28. Embedded software pack release - Successful installation . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 29. Removing libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 30. Removing library confirmation message. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 31. Library deletion progress window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 32. Updates are available . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 33. Help menu: checking for updates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 34. STM32CubeMX Home page. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 35. Window menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 36. Output view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 37. Link to social platforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 38. New Project window shortcuts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 39. Enabling TrustZone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 40. Adjusting selector results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 41. New Project window - MCU selector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 42. Marking a favorite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 43. New Project window - Board selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 44. New project window - Example selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 45. Popup window - Starting a project from an example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 46. Cross selector - Data refresh prerequisite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 47. Cross selector - Part number selection per vendor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Figure 48. Cross selector - Partial part number selection completion . . . . . . . . . . . . . . . . . . . . . . . . . 75

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Figure 49. Cross selector - Compare cart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Figure 50. Cross selector - Part number selection for a new project . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Figure 51. STM32CubeMX Main window upon MCU selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Figure 52. STM32CubeMX Main window upon board selection (peripherals not initialized) . . . . . . . . 79
Figure 53. STM32CubeMX Main window upon board selection
(peripherals initialized with default configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Figure 54. Project choice interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 55. Contexts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 56. IPs interface assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 57. TrustZone option. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 58. Selected context . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 59. Assign IP context . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 60. OP-TEE selected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Figure 61. U-Boot selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Figure 62. FSBL synchronization output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Figure 63. Contextual Help window (default) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 64. Contextual Help detailed information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Figure 65. Pinout view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Figure 66. Modifying pin assignments from the Pinout view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Figure 67. Example of remapping in case of block of pins consistency. . . . . . . . . . . . . . . . . . . . . . . . 93
Figure 68. Pins/Signals Options window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Figure 69. Pinout view: MCUs with multi-bonding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure 70. Pinout view: multi-bonding with extended mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure 71. System view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Figure 72. Configuration window tabs (GPIO, DMA, and NVIC settings for STM32F4 series) . . . . . . 98
Figure 73. Peripheral mode and Configuration view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Figure 74. Formula when input parameter is set in No Check mode . . . . . . . . . . . . . . . . . . . . . . . . . 101
Figure 75. User Constants tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Figure 76. Extract of the generated main.h file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Figure 77. Using constants for peripheral parameter settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Figure 78. Specifying user constant value and name . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Figure 79. Deleting an user constant is not allowed when it
is already used for another constant definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Figure 80. Confirmation request to delete a constant for parameter configuration . . . . . . . . . . . . . . 104
Figure 81. Consequence when deleting a user constant for peripheral configuration . . . . . . . . . . . . 105
Figure 82. Searching for a name in a user constant list. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Figure 83. Searching for a value in a user constant list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Figure 84. GPIO configuration window - GPIO selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Figure 85. GPIO configuration grouped by peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Figure 86. Multiple pins configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Figure 87. Adding a new DMA request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Figure 88. DMA configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Figure 89. DMA MemToMem configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Figure 90. NVIC configuration tab - FreeRTOS disabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Figure 91. NVIC configuration tab - FreeRTOS enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Figure 92. I2C NVIC configuration window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Figure 93. NVIC Code generation – All interrupts enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Figure 94. NVIC Code generation – IRQ Handler generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Figure 95. FreeRTOS configuration view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Figure 96. FreeRTOS: configuring tasks and queues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Figure 97. FreeRTOS: creating a new task . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Figure 98. FreeRTOS - Configuring timers, mutexes and semaphores. . . . . . . . . . . . . . . . . . . . . . . 120

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Figure 99. FreeRTOS heap usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

Figure 100. Selecting a HAL timebase source (STM32F407 example) . . . . . . . . . . . . . . . . . . . . . . . . 122
Figure 101. TIM1 selected as HAL timebase source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Figure 102. NVIC settings when using SysTick as HAL timebase, no FreeRTOS . . . . . . . . . . . . . . . 123
Figure 103. NVIC settings when using FreeRTOS and SysTick as HAL timebase . . . . . . . . . . . . . . 124
Figure 104. NVIC settings when using FreeRTOS and TIM2 as HAL timebase . . . . . . . . . . . . . . . . . 125
Figure 105. STM32MPUs boot devices and runtime contexts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Figure 106. STM32MPUs: assignment options for GPIOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Figure 107. Select peripherals as boot devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Figure 108. Default configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 109. Default configuration for the STM32MP2 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 110. RISUP configuration panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Figure 111. Software context configuration vs. RISUP configuration . . . . . . . . . . . . . . . . . . . . . . . . . 131
Figure 112. Example of IP assignment to one context and result in RISUP . . . . . . . . . . . . . . . . . . . . 132
Figure 113. Example of IP assignment to two contexts and result in RISUP. . . . . . . . . . . . . . . . . . . . 132
Figure 114. Lock and privilege in RISUP table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Figure 115. Pseudo RIF-aware IP assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Figure 116. Peripherals (RISUP) panel for the STM32N6 series. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Figure 117. Creation of a new project for the STM32N6 series - Secure projects. . . . . . . . . . . . . . . . 134
Figure 118. Peripherals (RISUP) panel for the STM32N6 series - Secure projects . . . . . . . . . . . . . . 135
Figure 119. FMC configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Figure 120. RIF FMC panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Figure 121. RTC features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Figure 122. RTC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Figure 123. RTC parameters setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Figure 124. Color coding system and instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Figure 125. RIMU user interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Figure 126. Assigning a CID to an IP in RIMU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Figure 127. Modification of the security and privilege values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Figure 128. IP assignment to a context . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Figure 129. Result in RISUP of an IP assignment to a context . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Figure 130. Inheritance of CID, state of security, and privilege from RISUP . . . . . . . . . . . . . . . . . . . . 143
Figure 131. Default values for IPs and user modification restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 143
Figure 132. Domains (RIMU) panel for STM32N6 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
Figure 133. RIF HSEM panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Figure 134. RIF TAMP panel (STM32MP2 devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Figure 135. RIF TAMP panel (STM32N6 devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Figure 136. RIF-aware peripherals for STM32N6 MCUs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
Figure 137. IO protection inheritance for a non-RIF-aware IP (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Figure 138. GPIO IP panel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Figure 139. Inheritance in RIF GPIO panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Figure 140. PIN reservation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Figure 141. HPDMA1 features with RIF implementation (STM32N6 MCUs). . . . . . . . . . . . . . . . . . . . 150
Figure 142. I2C IP panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
Figure 143. I2C mode panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Figure 144. I2C features panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Figure 145. DMA RIF-aware IP inheritance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Figure 146. RIF RCC panel (STM32MP2 MPUs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Figure 147. RCC features with RIF implementation (STM32N6 MCUs) . . . . . . . . . . . . . . . . . . . . . . . 153
Figure 148. RIF panel for EXTI1 (STM32N6 MCUs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Figure 149. RISAF configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Figure 150. Configuration of a new subregion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156

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Figure 151. Non editable columns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156

Figure 152. Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Figure 153. OCTOSPI1&2 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Figure 154. OCTOSPI1&2 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Figure 155. OCTOSPI1&2 region size configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Figure 156. OCTOSPI1&2 inheritances from RISUP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Figure 157. OCTOSPI1&2 Master CID activation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Figure 158. DDR memory configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Figure 159. DDR_CTRL_PHY activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Figure 160. Configuration of RISAF4 (DDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Figure 161. PCIE memory configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Figure 162. Global lock in RISAF panel for STM32N6 MCUs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Figure 163. RISAF configuration for STM32N6 series. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Figure 164. Sub-regions activation in RISAF (showing activated subregions) . . . . . . . . . . . . . . . . . . 165
Figure 165. Sub-regions activation in RISAF (check the filtering parameter) . . . . . . . . . . . . . . . . . . . 165
Figure 166. Example: RISUP configuration and generated code . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Figure 167. Example: RISAF configuration and generated code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Figure 168. IAC feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Figure 169. STM32H7 dual-core: peripheral and middleware context assignment . . . . . . . . . . . . . . . 168
Figure 170. STM32H7 dual-core: GPIOs context assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Figure 171. Pinout & Configuration view for TrustZone®-enabled projects . . . . . . . . . . . . . . . . . . . . . 169
Figure 172. Setting privileges for peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Figure 173. Setting privileges for GPIO EXTIs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
Figure 174. Configuring security and privilege of DMA requests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Figure 175. RCC privilege mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Figure 176. Configuring security and privilege of DMA requests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Figure 177. Securing peripherals from GTZC panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
Figure 178. OTFDEC secured when TrustZone® is active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
Figure 179. STM32F469NIHx clock tree configuration view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
Figure 180. Clock tree configuration view with errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
Figure 181. Clock tree configuration: enabling RTC, RCC clock source
and outputs from Pinout view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
Figure 182. Clock tree configuration: RCC peripheral advanced parameters . . . . . . . . . . . . . . . . . . . 185
Figure 183. Project Settings window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
Figure 184. Project folder. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
Figure 185. Selecting a basic application structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
Figure 186. Selecting an advanced application structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
Figure 187. OpenSTLinux settings (STM32MPUs only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
Figure 188. Selecting a different firmware location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
Figure 189. Firmware location selection error message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
Figure 190. Recommended new firmware repository structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
Figure 191. Project Settings code generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
Figure 192. Template Settings window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
Figure 193. Generated project template . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
Figure 194. Advanced Settings window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
Figure 195. Generated init functions without C language “static” keyword . . . . . . . . . . . . . . . . . . . . . 198
Figure 196. Automatic project import . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
Figure 197. Manual project import . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
Figure 198. Import Project menu - Try Import with errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
Figure 199. Import Project menu - Successful import after adjustments . . . . . . . . . . . . . . . . . . . . . . . 202
Figure 200. Set unused pins window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
Figure 201. Reset used pins window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203

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Figure 202. Set unused GPIO pins with Keep Current Signals Placement checked . . . . . . . . . . . . . . 204
Figure 203. Set unused GPIO pins with Keep Current Signals Placement unchecked . . . . . . . . . . . . 205
Figure 204. Additional software window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
Figure 205. Component dependency resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
Figure 206. Details and Warnings panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Figure 207. Selection of additional software components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Figure 208. Additional software components - Updated tree view. . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Figure 209. LPBAM window. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Figure 210. CAD Resources view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Figure 211. CAD Resources not available . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
Figure 212. CAD Resources selection for download . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
Figure 213. CAD Resources in Tools panel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Figure 214. CAD Resources for STM32CubeMX project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Figure 215. Boot path configuration ecosystem. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
Figure 216. Boot paths for STM32H57x devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Figure 217. Boot paths for STM32H56x devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Figure 218. Application boot paths (legacy and ST-iRoT projects) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
Figure 219. Application boot paths (OEM-iRoT and secure manager projects). . . . . . . . . . . . . . . . . . 220
Figure 220. Application boot path (OEM-uRoT assembled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
Figure 221. Application boot path: ST-iRoT and uRoT secure/nonsecure project. . . . . . . . . . . . . . . . 221
Figure 222. Application boot path:
ST-iRoT and secure/nonsecure user application assembled . . . . . . . . . . . . . . . . . . . . . . 222
Figure 223. Application boot path: ST-iRoT dual figure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
Figure 224. Application boot path:
(OEM-iRoT and secure/nonsecure user application assembled) . . . . . . . . . . . . . . . . . . . 222
Figure 225. Select the device or board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Figure 226. Select the STM32H5 device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Figure 227. Peripheral initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Figure 228. Boot paths for STM32H56x devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Figure 229. Activate TrustZone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Figure 230. Device and peripherals configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
Figure 231. Configuring the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
Figure 232. Saving the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
Figure 233. Boot path selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Figure 234. Select OEM-iRoT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Figure 235. First boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Figure 236. Select Secure Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Figure 237. Last boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Figure 238. Project provisioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Figure 239. Flash size not aligned . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
Figure 240. Boot path and debug authentication panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
Figure 241. Authentication and encryption keys regeneration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
Figure 242. Secure image configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
Figure 243. Nonsecure image configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
Figure 244. Generate the code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
Figure 245. Code is generated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
Figure 246. Secure and nonsecure IDE directories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
Figure 247. IDE post build commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
Figure 248. Trusted Package Creator output directory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
Figure 249. Board provisioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
Figure 250. On-screen instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
Figure 251. Error message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237

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Figure 252. Select ST-iRoT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238

Figure 253. Final boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
Figure 254. Boot path and Debug Authentication tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
Figure 255. Select the project structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
Figure 256. Code is generated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
Figure 257. Secure project completed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
Figure 258. IDE post build commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241
Figure 259. Board provisioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Figure 260. On-screen instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Figure 261. Environment configuration file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
Figure 262. EWARM patch installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
Figure 263. First boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
Figure 264. Second boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
Figure 265. Final boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
Figure 266. Boot path and Debug Authentication tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
Figure 267. Select the project structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
Figure 268. Code is generated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
Figure 269. Nonsecure project completed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
Figure 270. IDE post build commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
Figure 271. Secure manager API configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
Figure 272. Code generated with secure manager API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
Figure 273. The flash_layout.h file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
Figure 274. The map.properties file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252
Figure 275. Boot path project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252
Figure 276. Secure generated project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
Figure 277. Non Secure generated project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
Figure 278. Compilation project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
Figure 279. Project folder. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
Figure 280. Boot path project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
Figure 281. Save the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
Figure 282. Boot path and debug authentication panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
Figure 283. First (left) and second (right) boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
Figure 284. Final boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
Figure 285. Boot path and debug authentication tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
Figure 286. map.properties file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
Figure 287. Code generation with EWARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
Figure 288. Non secure generated project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
Figure 289. Secure generated project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
Figure 290. Boot path project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
Figure 291. Use default configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
Figure 292. Configure the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Figure 293. Select the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Figure 294. First boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 262
Figure 295. Final boot path stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 262
Figure 296. Boot path and debug authentication panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263
Figure 297. Generate the code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263
Figure 298. Application IDE directories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263
Figure 299. Home page without the login form . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264
Figure 300. Install or remove a software package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 266
Figure 301. Missing myST information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
Figure 302. Authentication from myST tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
Figure 303. User Authentication Dialog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268

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Figure 304. The myST display after a user logs in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268

Figure 305. Blocked login cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
Figure 306. Account creation form . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270
Figure 307. Enter the email address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271
Figure 308. Password restoration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271
Figure 309. Reset password form . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272
Figure 310. About window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Figure 311. ST Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
Figure 312. User interface of the Compare Projects tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
Figure 313. Load the first .ioc file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276
Figure 314. Starting the comparison process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277
Figure 315. The result of comparing two projects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277
Figure 316. Loading the same project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 278
Figure 317. The result of comparing two projects having the same structure . . . . . . . . . . . . . . . . . . . 278
Figure 318. The structure of the Target table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
Figure 319. The structure of the Peripherals & Middleware table . . . . . . . . . . . . . . . . . . . . . . . . . . . . 280
Figure 320. The structure of the Project Settings table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281
Figure 321. Choosing the Excel format to save the comparison result . . . . . . . . . . . . . . . . . . . . . . . . 282
Figure 322. Comparison result in Excel format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282
Figure 323. Power Consumption Calculator default view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284
Figure 324. Battery selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285
Figure 325. Step management functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285
Figure 326. Power consumption sequence: New Step default view . . . . . . . . . . . . . . . . . . . . . . . . . . 286
Figure 327. Enabling the transition checker option on an already
configured sequence - All transitions valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
Figure 328. Enabling the transition checker option on an already
configured sequence - At least one transition invalid . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
Figure 329. Transition checker option - Show log . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
Figure 330. Interpolated power consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
Figure 331. ADC selected in Pinout view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
Figure 332. Power Consumption Calculator configuration window:
ADC enabled using import pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291
Figure 333. Power Consumption Calculator view after sequence building . . . . . . . . . . . . . . . . . . . . . 292
Figure 334. Sequence table management functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292
Figure 335. Power Consumption: Peripherals consumption chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
Figure 336. Description of the Results area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
Figure 337. Overall peripheral consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295
Figure 338. Selecting SMPS for the current project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297
Figure 339. SMPS database - Adding new SMPS models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298
Figure 340. SMPS database - Selecting a different SMPS model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298
Figure 341. Current project configuration updated with new SMPS model . . . . . . . . . . . . . . . . . . . . . 299
Figure 342. SMPS database management window with new model selected. . . . . . . . . . . . . . . . . . . 299
Figure 343. SMPS transition checker and state diagram helper window. . . . . . . . . . . . . . . . . . . . . . . 300
Figure 344. Configuring the SMPS mode for each step . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301
Figure 345. RF related consumption (STM32WB series only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302
Figure 346. RF Bluetooth Low-Energy mode configuration (STM32WB series only) . . . . . . . . . . . . . 303
Figure 347. ZigBee configuration (STM32WB series only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303
Figure 348. RF sub-GHz configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304
Figure 349. Power Consumption Calculator – Example set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 305
Figure 350. Power Consumption Calculator – Example sequence loading . . . . . . . . . . . . . . . . . . . . . 305
Figure 351. Power Consumption Calculator – Example sequence new selection . . . . . . . . . . . . . . . . 306
Figure 352. DDR pinout and configuration settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307

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Figure 353. DDR3 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 308

Figure 354. DDR Suite - Connection to target . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309
Figure 355. DDR Suite - Target connected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
Figure 356. DDR activity logs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
Figure 357. DDR interactive logs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
Figure 358. DDR register loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
Figure 359. DDR test list from U-Boot SPL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
Figure 360. DDR test suite results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313
Figure 361. DDR tests history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313
Figure 362. Regions settings to peripherals ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
Figure 363. Regions settings to linker files ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
Figure 364. Regions settings to peripherals OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
Figure 365. MMT usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315
Figure 366. MMT view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
Figure 367. Start a project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
Figure 368. Use TrustZone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
Figure 369. Default settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
Figure 370. Region information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318
Figure 371. Tooltip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318
Figure 372. IP configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
Figure 373. IP under control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
Figure 374. Linker files update. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
Figure 375. Configure an external memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
Figure 376. New region created. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
Figure 377. Adding a new region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 322
Figure 378. Adding a new memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 322
Figure 379. Memory assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
Figure 380. Left panel configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
Figure 381. Allocating a region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324
Figure 382. Middleware memory allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324
Figure 383. Middleware heap configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
Figure 384. Remapping the memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
Figure 385. Remapped region is renamed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
Figure 386. Remapped start address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
Figure 387. New region remapped . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
Figure 388. Resizing default region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
Figure 389. Region security change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
Figure 390. Memory map in linker file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 328
Figure 391. MMT usage (STM32U5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Figure 392. MMT usage (STM32H7 single core) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Figure 393. MMT view for U5 without TrustZone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Figure 394. MMT view for H7 single core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Figure 395. Default data region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331
Figure 396. FMC activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331
Figure 397. Default mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332
Figure 398. Before the swap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332
Figure 399. After the swap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333
Figure 400. Before remapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333
Figure 401. After remapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334
Figure 402. MMT usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335
Figure 403. Firmware version . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335
Figure 404. MMT configuration for STM32WB5x. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335

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Figure 405. CORTEX_M7 Mode and Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336

Figure 406. CORTEX_M4 Mode and Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 337
Figure 407. Default settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
Figure 408. Choose an STM32H7 dual-core product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Figure 409. Choose an STM32H7 dual-core product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Figure 410. Region 0 added . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 340
Figure 411. Activate Memory Management support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 340
Figure 412. Default setting for new application region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 341
Figure 413. Adding a new region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 341
Figure 414. Configure the NVIC1, NVIC2 and select their HSEM global interrupt. . . . . . . . . . . . . . . . 342
Figure 415. OPENAMP_M7 parameters settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342
Figure 416. OPENAMP_M4 parameters settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343
Figure 417. The reserved memory regions for OPENAMP using MMT . . . . . . . . . . . . . . . . . . . . . . . . 343
Figure 418. Linker files update(stm32h755xxx_flash_cm4.icf) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
Figure 419. Linker files update(stm32h755xxx_flash_cm7.icf) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345
Figure 420. Configuration of ETH IP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
Figure 421. ETH MMT region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
Figure 422. IP configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347
Figure 423. The defined memories under the linker file (Cortex-M7). . . . . . . . . . . . . . . . . . . . . . . . . . 348
Figure 424. The defined memories under the linker file (Cortex-M4). . . . . . . . . . . . . . . . . . . . . . . . . . 349
Figure 425. MMT usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
Figure 426. Default settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 427. Choose an STM32H7R product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Figure 428. Initialization dialogue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Figure 429. Region0 added . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353
Figure 430. Activate Memory Management support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353
Figure 431. Warning message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354
Figure 432. Configure the XSPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354
Figure 433. EXT_MEM_MANAGER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355
Figure 434. Tooltip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355
Figure 435. IP configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 356
Figure 436. Linker files update. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 356
Figure 437. Memory assignment for context Boot H7RS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 357
Figure 438. EXTMEM_MANAGER “Select boot code generation” disabled . . . . . . . . . . . . . . . . . . . . 357
Figure 439. Execute In Place . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 358
Figure 440. MMT Execute In Place . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 358
Figure 441. Load and Run . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 359
Figure 442. MMT Load and Run . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 359
Figure 443. Linker files. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 360
Figure 444. Flash option bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 360
Figure 445. ECC_ON_SRAM enabled and DTCM_AXI_SHARED set to 2. . . . . . . . . . . . . . . . . . . . . 361
Figure 446. MMT usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 362
Figure 447. User interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 362
Figure 448. Linker files update. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363
Figure 449. Impact on RADIO (STM32WB09) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363
Figure 450. MMT/boot path (STM32H7RS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 364
Figure 451. MMT/boot path (STM32H5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 364
Figure 452. Linker files location (STM32H7RS on the left, STM32H5 on the right). . . . . . . . . . . . . . . 365
Figure 453. App_User declaration (STM32H7RS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365
Figure 454. App_User declaration (STM32H5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365
Figure 455. Labels for pins generating define statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367
Figure 456. User constant generating define statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367

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Figure 457. Duplicate labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 368

Figure 458. HAL-based peripheral initialization: usart.c code snippet . . . . . . . . . . . . . . . . . . . . . . . . . 372
Figure 459. LL-based peripheral initialization: usart.c code snippet . . . . . . . . . . . . . . . . . . . . . . . . . . 373
Figure 460. HAL versus LL: main.c code snippet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373
Figure 461. Default content of the extra_templates folder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374
Figure 462. extra_templates folder with user templates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375
Figure 463. Project root folder with corresponding custom generated files . . . . . . . . . . . . . . . . . . . . . 376
Figure 464. User custom folder for templates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 376
Figure 465. Custom folder with corresponding custom generated files . . . . . . . . . . . . . . . . . . . . . . . . 377
Figure 466. Update of the project .ewp file (EWARM IDE)
for preprocessor define statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 379
Figure 467. Update of stm32f4xx_hal_conf.h file to enable selected modules . . . . . . . . . . . . . . . . . . 379
Figure 468. New groups and new files added to groups in EWARM IDE . . . . . . . . . . . . . . . . . . . . . . 379
Figure 469. Preprocessor define statements in EWARM IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 380
Figure 470. Code generation for STM32H7 dual-core devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 381
Figure 471. Startup and linker files for STM32H7 dual-core devices. . . . . . . . . . . . . . . . . . . . . . . . . . 382
Figure 472. Building secure and nonsecure images with ARMv8-M TrustZone® . . . . . . . . . . . . . . . . 383
Figure 473. Project explorer view for STM32L5 TrustZone® enabled projects . . . . . . . . . . . . . . . . . . 384
Figure 474. Project settings for STM32CubeIDE toolchain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 385
Figure 475. STM32CubeMX generated DTS – Extract 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 388
Figure 476. STM32CubeMX generated DTS – Extract 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 388
Figure 477. STM32CubeMX generated DTS – Extract 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 389
Figure 478. Project settings to configure Device tree path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 390
Figure 479. Selecting a CMSIS-Pack software component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 392
Figure 480. Enabling and configuring a CMSIS-Pack software component . . . . . . . . . . . . . . . . . . . . 392
Figure 481. Project generated with CMSIS-Pack software component . . . . . . . . . . . . . . . . . . . . . . . . 393
Figure 482. MCU selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394
Figure 483. Pinout view with MCUs selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395
Figure 484. Pinout view without MCUs selection window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395
Figure 485. GPIO pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 396
Figure 486. Timer configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 397
Figure 487. Simple pinout configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 398
Figure 488. Save Project As window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399
Figure 489. Generate Project Report - New project creation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400
Figure 490. Generate Project Report - Project successfully created . . . . . . . . . . . . . . . . . . . . . . . . . . 400
Figure 491. Clock tree view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 401
Figure 492. HSI clock enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
Figure 493. HSE clock source disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
Figure 494. HSE clock source enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
Figure 495. External PLL clock source enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
Figure 496. Pinout & Configuration view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 404
Figure 497. Case of Peripheral and Middleware without configuration parameters. . . . . . . . . . . . . . . 404
Figure 498. Timer 3 configuration window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405
Figure 499. Timer 3 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405
Figure 500. Enabling Timer 3 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 406
Figure 501. GPIO configuration color scheme and tooltip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 406
Figure 502. GPIO mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 407
Figure 503. DMA parameters configuration window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 408
Figure 504. Middleware tooltip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 408
Figure 505. USB Host configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 409
Figure 506. FatFs over USB mode enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 409
Figure 507. System view with FatFs and USB enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 410

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Figure 508. FatFs define statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411

Figure 509. Project Settings and toolchain selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412
Figure 510. Project Manager menu - Code Generator tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413
Figure 511. Missing firmware package warning message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413
Figure 512. Error during download . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414
Figure 513. Updater settings for download . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414
Figure 514. Updater settings with connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
Figure 515. Downloading the firmware package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
Figure 516. Unzipping the firmware package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 416
Figure 517. C code generation completion message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 416
Figure 518. C code generation output folder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 417
Figure 519. C code generation output: Projects folder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418
Figure 520. C code generation for EWARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 419
Figure 521. STM32CubeMX generated project open in IAR™ IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . 420
Figure 522. IAR™ options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Figure 523. SWD connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Figure 524. Project building log . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Figure 525. User Section 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
Figure 526. User Section 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
Figure 527. Import Project menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
Figure 528. Board peripheral initialization dialog box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424
Figure 529. Board selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425
Figure 530. SDIO peripheral configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425
Figure 531. FatFs mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426
Figure 532. RCC peripheral configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426
Figure 533. Clock tree view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427
Figure 534. FATFS tutorial - Project settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427
Figure 535. C code generation completion message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 428
Figure 536. IDE workspace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 428
Figure 537. Power Consumption Calculation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434
Figure 538. VDD and battery selection menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434
Figure 539. Sequence table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 435
Figure 540. sequence results before optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 435
Figure 541. Step 1 optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 436
Figure 542. Step 5 optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 437
Figure 543. Step 6 optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438
Figure 544. Step 7 optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 439
Figure 545. Step 8 optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440
Figure 546. Step 10 optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 441
Figure 547. Power sequence results after optimizations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 441
Figure 548. Selecting NUCLEO_L053R8 board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443
Figure 549. Selecting debug pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 444
Figure 550. Selecting TIM2 clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 444
Figure 551. Selecting asynchronous mode for USART2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445
Figure 552. Checking pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445
Figure 553. Configuring the MCU clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 446
Figure 554. Configuring USART2 parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 447
Figure 555. Configuring TIM2 parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 448
Figure 556. Enabling TIM2 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 449
Figure 557. Project Settings menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450
Figure 558. Generating the code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451
Figure 559. Checking the communication port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 452

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Figure 560. Setting Tera Term port parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 453

Figure 561. Setting Tera Term port parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 453
Figure 562. Existing or new project pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454
Figure 563. List of pinout compatible MCUs - Partial match
with hardware compatibility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 455
Figure 564. List of Pinout compatible MCUs - Exact and partial match . . . . . . . . . . . . . . . . . . . . . . . . 455
Figure 565. Selecting a compatible MCU and importing the configuration . . . . . . . . . . . . . . . . . . . . . 456
Figure 566. Configuration imported to the selected compatible MCU . . . . . . . . . . . . . . . . . . . . . . . . . 456
Figure 567. Additional software components enabled for the current project . . . . . . . . . . . . . . . . . . . 458
Figure 568. Pack software components: no configurable parameters . . . . . . . . . . . . . . . . . . . . . . . . . 459
Figure 569. Pack tutorial: project settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 459
Figure 570. Generated project with third party pack components . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460
Figure 571. Hardware prerequisites. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461
Figure 572. Embedded software packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 462
Figure 573. Mobile application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 462
Figure 574. Installing Embedded software packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463
Figure 575. Starting a new project - selecting the NUCLEO-L053R8 board . . . . . . . . . . . . . . . . . . . . 464
Figure 576. Starting a new project - initializing all peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 464
Figure 577. Selecting X-Cube-BLE1 components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 465
Figure 578. Configuring peripherals and GPIOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 466
Figure 579. Configuring NVIC interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467
Figure 580. Enabling X-Cube-BLE1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 468
Figure 581. Configuring the SensorDemo project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469
Figure 582. Open SensorDemo project in the IDE toolchain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469
Figure 583. LPBAM project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471
Figure 584. Project timeline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472
Figure 585. Project with LPBAM capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472
Figure 586. LPBAM scenario & configuration view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 473
Figure 587. Adding an application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474
Figure 588. SoC and IPs configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
Figure 589. LPBAM scenario: creation & configuration panels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
Figure 590. Clock tree configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 476
Figure 591. Available IPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477
Figure 592. IP configuration: advanced settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477
Figure 593. LPBAM low power settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 478
Figure 594. Adding nodes to a queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 479
Figure 595. Queue in circular mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 480
Figure 596. Queue looping back on IP data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
Figure 597. LPBAM queue: DMA configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
Figure 598. LPBAM functions contextual help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 482
Figure 599. LPBAM queue node configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 483
Figure 600. LPBAM node: configuring hardware resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484
Figure 601. LPBAM node trigger configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485
Figure 602. LPBAM node triggered using timer channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485
Figure 603. LPBAM node: reconfiguring a DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 486
Figure 604. Reconfiguring DMA for data transfer when destination is memory. . . . . . . . . . . . . . . . . . 486
Figure 605. Design check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
Figure 606. STM32CubeMX project generated with LPBAM applications. . . . . . . . . . . . . . . . . . . . . . 488
Figure 607. STM32CubeMX project - Peripheral secure context assignment . . . . . . . . . . . . . . . . . . . 490
Figure 608. STM32CubeMX project - Clock source secure context assignment. . . . . . . . . . . . . . . . . 490
Figure 609. LPBAM project - Peripheral no context assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 491
Figure 610. LPBAM application - Clock source no context assignment. . . . . . . . . . . . . . . . . . . . . . . . 491

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Figure 611. LPBAM application - Secure context assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 492

Figure 612. LPBAM design security coherency check. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 492
Figure 613. Block mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 494
Figure 614. Block remapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495
Figure 615. Block remapping - Example 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 496
Figure 616. Block remapping - Example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 496
Figure 617. Block inter-dependency - SPI signals assigned to PB3/4/5 . . . . . . . . . . . . . . . . . . . . . . . 497
Figure 618. Block inter-dependency - SPI1_MISO function assigned to PA6 . . . . . . . . . . . . . . . . . . . 498
Figure 619. One block = one peripheral mode - I2C1_SMBA function assigned to PB5. . . . . . . . . . . 499
Figure 620. Block remapping - Example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500
Figure 621. Function remapping example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500
Figure 622. Block shifting not applied . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 501
Figure 623. Block shifting applied . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 502
Figure 624. FreeRTOS HOOK functions to be completed by user . . . . . . . . . . . . . . . . . . . . . . . . . . . 506
Figure 625. LwIP 1.4.1 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 507
Figure 626. LwIP 1.5 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 508
Figure 627. Libjpeg configuration window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 510
Figure 628. Mbed TLS without LwIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511
Figure 629. Mbed TLS with LwIP and FreeRTOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 512
Figure 630. Mbed TLS configuration window. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513
Figure 631. Enabling the TouchSensing peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514
Figure 632. Touch-sensing sensor selection panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 515
Figure 633. TouchSensing configuration panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516
Figure 634. BLE and Thread middleware support in STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . 517
Figure 635. STM32CubeWB Package download . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 518
Figure 636. STM32CubeWB BLE applications folder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 519
Figure 637. BLE Server profile selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 520
Figure 638. BLE Client profile selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 520
Figure 639. Thread application selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521
Figure 640. Enabling OpenAmp for STM32MPUs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 522
Figure 641. Enabling the Resource Manager for STM32MPUs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 523
Figure 642. Resource Manager: peripheral assignment view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 524
Figure 643. STM32 microcontroller part numbering scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526
Figure 644. STM32Cube Embedded Software package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 532

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1 STM32Cube overview

STM32Cube is an STMicroelectronics original initiative to improve designer productivity

significantly by reducing development effort, time, and cost. STM32Cube covers the whole
portfolio of STM32 devices, based on 32-bit Arm®(a) Cortex® cores.
STM32Cube includes:
• A set of user-friendly software development tools to cover project development from
conception to realization, among which are:
– STM32CubeMX, a graphical software configuration tool that allows the automatic
generation of C initialization code using graphical wizards
– STM32CubeIDE, an all-in-one development tool with peripheral configuration,
code generation, code compilation, and debug features
– STM32CubeCLT, an all-in-one command-line development toolset with code
compilation, board programming, and debug features
– STM32CubeProgrammer (STM32CubeProg), a programming tool available in
graphical and command-line versions
– STM32CubeMonitor (STM32CubeMonitor, STM32CubeMonPwr,
STM32CubeMonRF, STM32CubeMonUCPD), powerful monitoring tools to
fine-tune the behavior and performance of STM32 applications in real time
• STM32Cube MCU and MPU Packages, comprehensive embedded-software platforms
specific to each microcontroller and microprocessor series (such as STM32CubeH5 for
the STM32H5 series), which include:
– STM32Cube hardware abstraction layer (HAL), ensuring maximized portability
across the STM32 portfolio
– STM32Cube low-layer APIs, ensuring the best performance and footprints with a
high degree of user control over hardware
– A consistent set of middleware components, such as ThreadX, FileX / LevelX,
NetX Duo, USBX, USB-PD, mbed-crypto, secure manager API, MCUboot, and
OpenBL
– All embedded software utilities with full sets of peripheral and applicative
examples
• STM32Cube Expansion Packages, which contain embedded software components
that complement the functionalities of the STM32Cube MCU and MPU Packages with:
– Middleware extensions and applicative layers
– Examples running on some specific STMicroelectronics development boards

a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

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2 Getting started with STM32CubeMX

2.1 Principles
Customers need to quickly identify the MCU that best meets their requirements (core
architecture, features, memory size, performance…). While board designers main concerns
are to optimize the microcontroller pin configuration for their board layout and to fulfill the
application requirements (choice of peripherals operating modes), embedded system
developers are more interested in developing new applications for a specific target device,
and migrating existing designs to different microcontrollers.
The time taken to migrate to new platforms and update the C code to new firmware drivers
adds unnecessary delays to the project. STM32CubeMX was developed within STM32Cube
initiative which purpose is to meet customer key requirements to maximize software reuse
and minimize the time to create the target system:
• Software reuse and application design portability are achieved through STM32Cube
firmware solution proposing a common Hardware Abstraction Layer API across STM32
portfolio.
• Optimized migration time is achieved thanks to STM32CubeMX built-in knowledge of
STM32 microcontrollers, peripherals and middleware (LwIP and USB communication
protocol stacks, FatFs file system for small embedded systems, FreeRTOS).
STM32CubeMX graphical interface performs the following functions:
• Fast and easy configuration of the MCU pins, clock tree and operating modes for the
selected peripherals and middleware
• Generation of pin configuration report for board designers
• Generation of a complete project with all the necessary libraries and initialization C
code to set up the device in the user defined operating mode. The project can be
directly open in the selected application development environment (for a selection of
supported IDEs) to proceed with application development (see Figure 1).
During the configuration process, STM32CubeMX detects conflicts and invalid settings and
highlights them through meaningful icons and useful tool tips.

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Figure 1. Overview of STM32CubeMX C code generation flow

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2.2 Key features

STM32CubeMX comes with the following features:
• Project management
STM32CubeMX allows the user to create, save, and load previously saved projects:
– When STM32CubeMX is launched, the user can choose to create a new project or
to load a previously saved project.
– Saving the project saves user settings and configuration performed within the
project in an .ioc file to be used when the project will be loaded in STM32CubeMX
again.
STM32CubeMX also allows the user to import previously saved projects in new ones.
STM32CubeMX projects come in two flavors:
– MCU configuration only: .ioc file is saved in a dedicated project folder.
– MCU configuration with C code generation: in this case .ioc files are saved in a
dedicated project folder along with the generated source C code. There can be
only one .ioc file per project.
• Easy project creation starting from an MCU, a board, or an example
The new project window allows the user to create a project by selecting a
microcontroller, a board, or an example project from STMicroelectronics STM32
portfolio. Different filtering options are available to ease the MCU and board selection.
There is also the possibility to select an MCU through the Cross selector tab by
comparing characteristics to those of competitors. Comparison criteria can be adjusted.
• Easy pinout configuration
– From the Pinout view, the user can select the peripherals from a list and configure
the peripheral modes required for the application. STM32CubeMX assigns and
configures the pins accordingly.
– For more advanced users, it is also possible to directly map a peripheral function
to a physical pin using the Pinout view. The signals can be locked on pins to
prevent STM32CubeMX conflict solver from moving the signal to another pin.
– Pinout configuration can be exported as a .csv file.
• Complete project generation
The project generation includes pinout, firmware and middleware initialization C code
for a set of IDEs. It is based on STM32Cube embedded software libraries. The
following actions can be performed:
– Starting from the previously defined pinout, the user can proceed with the
configuration of middleware, clock tree, services (such as RNG, CRC) and
peripheral parameters. STM32CubeMX generates the corresponding initialization
C code. The result is a project directory including generated main.c file and C
header files for configuration and initialization, plus a copy of the necessary HAL
and middleware libraries as well as specific files for the selected IDE.
– The user can modify the generated source files by adding user-defined C code in
user dedicated sections. STM32CubeMX ensures that the user C code is
preserved upon next C code generation (the user C code is commented if no
longer relevant for the current configuration).
– STM32CubeMX can generate user files by using user-defined freemarker .ftl
template files.

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– From the Project Settings menu, the user can select the development toolchain
(IDE) for which the C code has to be generated. STM32CubeMX ensures that the
IDE relevant project files are added to the project folder so that the project can be
directly imported as a new project within STM32Cube or third party IDEs (IAR™
EWARM, Keil™ MDK-Arm, KITWARE™ CMake, FSF™ Makefile).
• Power consumption calculation
Starting with the selection of a microcontroller part number and a battery type, the user
can define a sequence of steps representing the application life cycle and parameters
(choice of frequencies, enabled peripherals, step duration). STM32CubeMX Power
Consumption Calculator returns the corresponding power consumption and battery life
estimates.
• Clock tree configuration
STM32CubeMX offers a graphic representation of the clock tree as it can be found in
the device reference manual. The user can change the default settings (clock sources,
prescaler and frequency values). The clock tree is then updated accordingly. Invalid
settings and limitations are highlighted and documented with tool tips. Clock tree
configuration conflicts can be solved by using the solver feature. When no exact match
is found for a given user configuration, STM32CubeMX proposes the closest solution.
• Automatic updates of STM32CubeMX and STM32Cube MCU packages
STM32CubeMX comes with an updater mechanism that can be configured for
automatic or on-demand check for updates. It supports self-updates as well as
firmware library package updates. The updater mechanism also allows deleting
previously installed packages.
• Report generation
.pdf and .csv reports can be generated to document the user configuration work.
• Support of embedded software packages in CMSIS-Pack format (Software Packs)
STM32CubeMX allows getting and downloading updates of embedded software
packages delivered in CMSIS-Pack format. Selected software components belonging
to these new releases can then be added to the current project.
• Generating Software Packs with STM32PackCreator
STM32PackCreator is a graphical tool installed with STM32CubeMX in the Utilities
folder. It allows the user to create Software Packs and STM32Cube Expansion
packages enhanced for STM32CubeMX. It can be launched from the ST Tools tab
found in the Tools view.
• Contextual help
Contextual help windows can be displayed by hovering the mouse over Cores, Series,
Peripherals and Middleware. They provide a short description and links to the relevant
documentation corresponding to the selected item.
• Access to ST tools
From STM32CubeMX project, the Tools tab allows the user to launch Tools directly or
to access tools download pages on www.st.com.
• Video tutorials
STM32CubeMX allows the user to browse and play video tutorials. The video tutorial
browser is accessible from the Help menu.

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2.3 Rules and limitations

• C code generation covers only peripheral and middleware initialization. It is based on
STM32Cube HAL firmware libraries.
• STM32CubeMX C code generation covers only initialization code for peripherals and
middleware components that use the drivers included in STM32Cube embedded
software packages. The code generation of some peripherals and middleware
components is not yet supported.
• Refer to Appendix A for a description of pin assignment rules.
• Refer to Appendix B for a description of STM32CubeMX C code generation design
choices and limitations.

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3 Installing and running STM32CubeMX

3.1 System requirements

3.1.1 Supported operating systems and architectures

• Windows® 10 32 bits (x86) or 64 bits (x64), and Windows® 11 64 bits (x64)
• Linux®: Ubuntu® LTS 22.04, and LTS 24.04, and Fedora® 40
• macOS® 14 (Sonoma), macOS® 15 (Sequoia)
Note: Windows is a trademark of the Microsoft group of companies.
Linux® is a registered trademark of Linus Torvalds.
Ubuntu® is a registered trademark of Canonical Ltd.
Fedora® is a trademark of Red Hat, Inc.
macOS® is a trademark of Apple Inc., registered in the U.S. and other countries and
regions.
For macOS the full disk access is required to load project files or install other packages from
the file system. To enable full disk access for STM32CubeMX:
1. Go to “System preferences” and click to open “Security & Privacy” window (Figure 2)
2. Select “Privacy” tab
3. Select “Full Disk Access” from the left panel
4. Click the checkbox to enable full disk access to STM32CubeMX

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Figure 2. Full disk access for macOS

3.1.2 Memory prerequisites

• Recommended minimum RAM: 2 Gbytes

3.1.3 Software requirements

If the initial installation was completed with administrator privileges, the user also needs
these privileges to download and install the latest update package. Additionally, the user
needs administrator rights to successfully apply the update at the next start of
STM32CubeMX.

Java™ Runtime Environment

For STM32CubeMX 6.13 the bundled JRE is openJDK Runtime Environment Temurin™
21.0.3+9 (build 21.0.3+9-LTS) and JavaFX-21.0.3.
Starting with version V6.2.0, STM32CubeMX embeds the Java Runtime Environment
(JRE™(a)) required for its execution and no longer uses the one installed on the user
machine.
• For STM32CubeMX 6.3 the bundled JRE is AdoptOpenJDK-11.0.10+9 and
JavaFX-11.0.2
• For STM32CubeMX 6.2 the bundled JRE is Liberica 1.8.0_265 of BellSoft

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Versions earlier than STM32CubeMX V6.2.0 require to install a JRE, whose constraints are:
• 64-bit version mandatory, 32-bit version not supported
• the STM32PackCreator companion tool requires JRE supporting JavaFX
• minimum JRE version is 1.8_45 (known limitation with 1.8_251)
• version 11 is supported, versions 7, 9, 10, 12 and upper are not supported
STMicroelectronics promotes the use of the following JREs:
• Oracle(a), subject to license fee
• Amazon Corretto™(a), no-cost solution based on OpenJDK, JDK installer
recommended.
STM32CubeMX operation is not guaranteed with other JREs.

macOS software requirements

• Xcode must be installed on macOS computers
• Both Xcode and Rosetta must be installed on macOS computers embedding Apple®
M1 processor.

3.2 Installing/uninstalling STM32CubeMX standalone version

3.2.1 Installing STM32CubeMX standalone version

To install STM32CubeMX:
1. From an Internet browser, open the page www.st.com/stm32cubemx
2. Click “Get Software” to go to the software download section
On Windows
a) On STM32CubeMX-Win line, click “Get software” to download the package
b) Extract (unzip) the downloaded package
c) Double-click on SetupSTM32CubeMX-VERSION-Win.exe to launch the
installation wizard
d) The installation wizard is displayed (see Figure 3), it gives the choice between two
modes, namely “Install for all users”, and “Install for me only (recommended)”

a. Oracle and Java are registered trademarks of Oracle and/or its affiliates.
a. All other trademarks are the properties of their respective owners.

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Figure 3. Select install mode

If you choose “Install for all users” mode:

> Enter administrator credentials
> Welcome panel (Figure 4)
> License agreement (Figure 5)
> Terms of use (Figure 6)
> The default installation path is set to C:\Program
Files\STMicroelectronics\STM32Cube\STM32CubeMX (Figure 7)
> The shortcuts for all users are created by default (Figure 8)
> Package installation (Figure 9)
> Installation script (Figure 10)
If you choose “Install for me only (recommended)” mode:
> Welcome panel (Figure 4)
> License agreement (Figure 5)
> Terms of use (Figure 6)
> The installation path is set on the home director by default (Figure 11): note
that the default installation folder is, by default, a system hidden folder
> The shortcut can be created only for the current user (Figure 12)
> Package installation (Figure 13)
> Installation script (Figure 14)

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Figure 4. Welcome panel

Figure 5. License agreement

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Figure 6. Terms of use

Figure 7. Default installation path

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Figure 8. Setup of shortcuts

Figure 9. Package installation

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Figure 10. Installation script

Figure 11. Installation path

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Figure 12. Current user shortcut creation

Figure 13. Package installation

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Figure 14. Installation completed

Note: Upon successful installation, the STM32CubeMX icon is displayed on the desktop and the
application is available from the Program menu. STM32CubeMX .ioc files are displayed with
a cube icon, double-clicking on it opens the project in STM32CubeMX. Only the latest
installation of STM32CubeMX is enabled in the Program menu. Previous versions can be
kept on your PC (not recommended) when different installation folders have been specified.
Otherwise, the new installation overwrites the previous one(s).
On Linux:
a) On STM32CubeMX-Lin line, Click “Get software” to download the package
b) Extract (unzip) the downloaded package
c) Make sure you have administrator rights to access the target installation directory.
You can run the installation as root (or sudo) to install STM32CubeMX in shared
directories.
d) Do chmod 777 SetupSTM32CubeMX-VERSION to change the properties, so
that the file is executable
e) Double-click on the SetupSTM32CubeMX-VERSION file, or launch it from the
console window
On macOS:
a) On STM32CubeMX-Mac line, Click “Get software” to download the package
b) Extract (unzip) the downloaded package
c) Make sure you have administrator rights
d) Double-click SetupSTM32CubeMX-VERSION.app application file to launch the
installation wizard

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In case of error, try to fix it: - $sudo xattr -cr <Folder where the zip was extracted>

3.2.2 Installing STM32CubeMX from command line

There are two ways to launch an installation from a console window: either in console
interactive mode or via a script.

Interactive mode
To perform interactive installation, proceed as follows:
1. Extract (unzip) to folder the auto-extract installation file (SetupSTM32CubeMX-
VERSION-Win.exe)
2. Open a standard console window to install for the current user, or the console window
with administrator rights to install for all users
3. Go to the extracted folder (cd <folder path>)
4. Run the command jre\bin\java -jar SetupSTM32CubeMX-<VERSION>.exe -
console

At each installation step, an answer is requested (see Figure 15).

Figure 15. Example of installation in interactive mode

Note: During the installation, ignore the warnings.

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Auto-install mode
At end of an installation, performed either using STM32CubeMX graphical wizard or console
mode, it is possible to generate an auto-installation script containing user preferences (see
Figure 16).

Figure 16. STM32Cube installation wizard

You can then launch the installation by typing, from a console window (with or without
administrator rights, according to your needs), the command:
SetupSTM32CubeMX-VERSION-Win.exe ABSOLUTE_PATH_TO_AUTO_INSTALL.xml

3.2.3 Uninstalling STM32CubeMX standalone version

Uninstalling STM32CubeMX on macOS®
• Move STM32CubeMX.VERSION.app to the trash
• Use the following command line:
– For STM32CubeMX 6.2.x and later versions:
cd SetupSTM32CubeMX-VERSION.app/Contents/Resources/Uninstaller
./uninstall.sh
– For STM32CubeMX 6.1.x and older versions:
java -jar SetupSTM32CubeMX-
VERSION.app/Contents/Resources/Uninstaller/uninstaller.jar.

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Uninstalling STM32CubeMX on Linux

• From a shell prompt by launching the uninstall script
– For STM32CubeMX 6.2.x and later versions:
cd <STM32CubeMX installation path>/Uninstaller
uninstall.sh
– For STM32CubeMX 6.1.x and older versions:
java -jar <STM32CubeMX installation path>/Uninstaller/uninstaller.jar.
• From a file explorer
– Go to <STM32CubeMX installation path>/Uninstaller
– For STM32CubeMX 6.2.x and later versions: double-click the uninstall.sh script
– For STM32CubeMX 6.1.x and older versions: double-click the start uninstall
desktop shortcut

Uninstalling STM32CubeMX on Windows

• Through the Windows Control Panel:
a) Select Programs and Features from the Windows Control Panel to display the
list of programs installed on your computer.
b) Right-click STM32CubeMX and select uninstall.
• From a shell prompt, by using the following commands:
– For STM32CubeMX 6.10.x and later versions:
with administrator rights:
cd <STM32CubeMX installation path>/Uninstaller
admin_uninstall.bat
without administrator rights:
cd <STM32CubeMX installation path>/Uninstaller
uninstall.batcd <STM32CubeMX installation path>/Uninstaller
uninstall.bat
– From STM32CubeMX 6.2.x to STM32CubeMX 6.9.x versions:
cd <STM32CubeMX installation path>/Uninstaller
admin_uninstall.bat
– For STM32CubeMX 6.1.x and older versions:
java -jar <STM32CubeMX installation path>/Uninstaller/uninstaller.jar
• Through a Windows File Explorer window:
a) For STM32CubeMX 6.2.x and later versions:
Go to the Uninstaller folder in STM32CubeMX installation directory, then:
> with administrator rights, right-click on admin_uninstall.bat and “run as
administrator”
> without administrator rights, click on uninstall.bat
b) For STM32CubeMX 6.1.x and older versions:
Go to the Uninstaller folder in STM32CubeMX installation directory
Double-click startuninstall.exe, or double-click the uninstall shortcut on the
desktop

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3.3 Launching STM32CubeMX

When running STM32CubeMX behind a proxy, see Section 3.4.1.

3.3.1 Running STM32CubeMX as a standalone application

To run STM32CubeMX as a standalone application on Windows, select STM32CubeMX
from Program Files > ST Microelectronics > STM32CubeMX,or double-click
STM32CubeMX icon on your desktop.
To run STM32CubeMX as a standalone application on Linux, launch the STM32CubeMX
executable from STM32CubeMX installation directory.
To run STM32CubeMX as a standalone application on macOS, launch the STM32CubeMX
application from the launchpad.
Note: There is no STM32CubeMX desktop icon on macOS.

3.3.2 Running STM32CubeMX in command-line mode

To facilitate its integration with other tools, STM32CubeMX provides command-line modes.
Thanks to the commands listed in Table 1 it is possible to:
• load an MCU
• load an existing configuration
• save a current configuration
• set project parameters and generate corresponding code
• generate user code from templates
• load a board identified through its part number
• refresh the list of embedded software packages (packs and STM32Cube MCU
packages) and install/remove a package
• select additional software (packs) components to add to the project.
Three command-line modes are available:
• To run STM32CubeMX in interactive command-line mode, use the following command
lines:
– On Windows:
cd <STM32CubeMX installation path>
jre\bin\java -jar STM32CubeMX.exe -i
– On Linux:
cd <STM32CubeMX installation path>
./STM32CubeMX –i
– On macOS:
cd <STM32CubeMX installation path> cd Contents/MacOs
./STM32CubeMX –i
The “MX>” prompt is displayed, to indicate that the application is ready to accept
commands.
• To run STM32CubeMX in command-line mode, getting commands from a script, use
the following command lines:
– On Windows:

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cd <STM32CubeMX installation path>

jre\bin\java -jar STM32CubeMX.exe –s <script filename>
– On Linux and macOS:
./STM32CubeMX –s <script filename>
All the commands to be executed must be listed in the script file. An example of script
file content is shown below:
load STM32F417VETx
project name MyFirstMXGeneratedProject
project toolchain "MDK-ARM v4"
project path C:\STM32CubeProjects\STM32F417VETx
project generate
exit
• To run STM32CubeMX in command-line mode getting commands from a script and
without UI, use the following command lines:
– On Windows:
cd <STM32CubeMX installation path>
jre\bin\java -jar STM32CubeMX.exe –q <script filename>
– On Linux and macOS:
./STM32CubeMX –q <script filename>
Here again, the user can enter commands when the MX prompt is displayed.

Table 1. Command line summary

Command line Purpose Example

help Displays the list of available commands. help

Refreshes the list of embedded software
swmgr refresh swmgr refresh
package versions available for download.
swmgr install
Installs the specified STM32Cube MCU
stm32cube_<series> swmgr install stm32cube_f1_1.8.0 ask
package version.(1)
_<version> ask
swmgr remove
Removes the specified STM32Cube
stm32cube_<series> swmgr remove stm32cube_f1_1.8.0
MCU package version.
_<version>
swmgr install
swmgr install STMicroelectronics.
<packVendor>.<packName>. Installs the specified pack version.
X-CUBE-NFC4.1.4.1 ask
<packVersion> ask
swmgr remove
swmgr remove STMicroelectronics.
<packVendor>.<packName>. Removes the specified pack version.
X-CUBE-BLE1.4.2.0
<packVersion>

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Table 1. Command line summary (continued)

Command line Purpose Example

Selects a software pack component to

add in the project.
The presence of “/” in the second and/or
the fifth parameter(s) indicates,
pack enable <vendor> respectively, the explicit mention of a
pack enable STMicroelectronics
<pack>[/bundle] <version> bundle and/or a subgroup (reference:
“X-CUBE-BLE1/BlueNRG-MS” 1.0.0
<class> <group>[/subgroup] Arm CMSIS pack pdsc format).
"Wireless" "Controller"
[variant] To find out the pack / bundle / class /
group / subgroup names of the
component to enable, select the
component and click “Hide/Show details”
from the Additional Software window.
Applies in the project all pack
pack validate components enabled since the “pack pack validate
validate” command was last called.
load STM32F101RCTx
load <mcu> Loads the selected MCU.
load STM32F101Z(F-G)Tx
Loads the selected board with all
load <board part number> peripherals configured in their default loadboard NUCLEO-F030R8 allmodes
<allmodes|nomode> mode (allmodes) or without any loadboard NUCLEO-F030R8 nomode
configuration (nomode).
config load
config load <filename> Loads a previously saved configuration.
“C:\Cube\ccmram\ccmram.ioc”
config save
config save <filename> Saves the current configuration.
“C:\Cube\ccmram\ccmram.ioc”
Saves the current configuration with all
config saveext
config saveext <filename> parameters, including those for which
“C:\Cube\ccmram\ccmram.ioc”
values have been kept to default.
Saves the current project under a new config saveas
config saveas <filename>
name. “C:\Cube\ccmram2\ccmram2.ioc”
Exports the current pin configuration as a
csv pinout <filename> csv file. This file can be (later) imported Csv pinout mypinout.csv
into a board layout tool.
Runs all commands in the script file.
script <filename> script myscript.txt
There must be one command per line.
This option allows the user to choose
between 0 (to generate the peripheral
project couplefilesbyip <0|1> initializations in the main) and 1 (to project couplefilesbyip 1
generate each peripheral initialization in
dedicated .c/.h files).
For the supported series, STM32CubeMX
can generate peripheral initialization code
based on LL or on HAL drivers. This setDriver ADC LL
setDriver <Peripheral Name>
command line allows the user to choose,
<HAL | LL> setDriver I2C HAL
for each peripheral, between HAL- and
LL-based code generation. By default
code generation is based on HAL drivers.

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Table 1. Command line summary (continued)

Command line Purpose Example

Generates only “STM32CubeMX

generated” code and not a complete
project (including STM32Cube firmware
generate code <path> generate code C:\mypath
libraries and toolchains project files).
To generate a project, use “project
generate”.
Sets the path to the source folder
containing the .ftl user template files.
set tpl_path <path> set tpl_path C:\myTemplates\
All the template files stored in this folder
are used for code generation.
Sets the path to the destination folder that
set dest_path <path> will hold the code generated according to set dest_path C:\myMXProject\inc\
user templates.
Retrieves the path name of the user
get tpl_path get tpl_path
template source folder.
Retrieves the path name of the user
get dest_path get dest_path
template destination folder.
SetStructure
Selects the project structure to generate. SetStructure Basic
<Advanced/Basic>
SetCopyLibrary
Selects how the reference libraries are
<copy all / copy only / SetCopyLibrary "copy all"
copied to the projects.
copy as reference>
Specifies a path to STM32Cube MCU
project SetCustomFwPath
project setCustomFWPath software libraries different from
"F:/SharedRepository/STM32Cube_F
<CustomFwLocation> STM32Cube repository path (specified
W_F0_V1.11.0"
under Help > Updater settings).
EWARM
Specifies the toolchain to be used for the
MDK-Arm
project.
project toolchain <toolchain> STM32CubeIDE
Use the “project generate” command to
generate the project for that toolchain. Makefile
CMake
project name <name> Specifies the project name. project name ccmram
Specifies the path where to generate the
project path <path> project path C:\Cube\ccmram
project.
project generate Generates the full project.(1) project generate
login < email_adress> Allows you to login to download software login john.smith@st.com mypassword
<password> <remember_me> packages. y
exit Ends STM32CubeMX process. exit
1. Use the login command before using this command.

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3.4 Getting updates using STM32CubeMX

STM32CubeMX implements a mechanism to access the Internet and to:
• download embedded software packages: STM32Cube MCU packages (full releases
and patches) and third-party packages (.pack) based on the Arm® CMIS pack format
• manage a user-defined list of third-party packs
• check for STM32CubeMX and embedded software packages updates
• perform self-updates of STM32CubeMX
• refresh STM32 MCUs descriptions and documentation offer.
Installation and update related submenus are available under the Help menu and from the
home page as well.
Off-line updates can also be performed on computers without Internet access (see
Section 3.4.3). This is done by browsing the filesystem and selecting available STM32Cube
MCU packages.
If the PC on which STM32CubeMX runs is connected to a computer network using a proxy
server, STM32CubeMX needs to connect to that server to access the Internet, get
self-updates and download firmware packages. Refer to Section 3.4.2 for a description of
this connection configuration.
To view Windows default proxy settings, select Internet options from the Control panel and
select LAN settings from the Connections tab (see Figure 17).

Figure 17. Displaying Windows default proxy settings

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Several proxy types exist, and different network configurations are possible:
• Without proxy: the application directly accesses the web (Windows default
configuration).
• Proxy without login/password
• Proxy with login/password: when using an Internet browser, a dialog box opens and
prompts the user to enter its login/password.
• Web proxies with login/password: when using an Internet browser, a web page opens
and prompts the user to enter its login/password.
If needed, contact your IT administrator for proxy information (proxy type, http address,
port).
STM32CubeMX does not support web proxies. In this case, the user cannot benefit from the
update mechanism and must manually copy the STM32Cube MCU packages from
http://www.st.com/stm32cube to the repository. To do it, follow the sequence below:
1. Go to http://www.st.com/stm32cube and download the relevant STM32Cube MCU
package from the Associated Software section.
2. Unzip the zip package to your STM32Cube repository. Find out the default repository
folder location in the Updater Settings tab as shown in Figure 18 (you might need to
update it to use a different location or name).

3.4.1 Running STM32CubeMX behind a proxy server

When proxies are implementing full SSL inspection, STM32CubeMX must be configured to
use the proxy certificate.
• On Windows:
Typically, it comes down to using Windows certificate list.
a) there is no additional configuration necessary to run STM32CubeMX executable
(it is already configured to use Windows certificate list)
b) the command line must be adjusted to run STM32CubeMX from the command
line:
cd <STM32CubeMX install path>
jre\bin\java -Djavax.net.ssl.trustStoreType=WINDOWS-ROOT -jar
STM32CubeMX.exe
• On Mac/Linux and on Windows systems when the proxy certificate is not in Windows
certificate store, the certificate must be manually imported. This is done using keytool
from a command prompt, as follows:
$ cd <CUBEMX_INSTALL_DIR>/jre
$ bin/keytool -importcert -alias <your certificate alias name> -
keystore lib/security/cacerts -file <path to you proxy certificate
file>.crt
When prompted, enter the password: changeit
When prompted, accept to trust the certificate: yes
Then (Windows only) edit file <CUBEMX_INSTALL_DIR>/STM32CubeMX.l4j.ini
and remove the line: -Djavax.net.ssl.trustStoreType=WINDOWS-ROOT

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3.4.2 Updater configuration

To perform STM32Cube new library package installation or updates, the tool must be
configured as follows:
1. Select Help > Updater Settings to open the Updater Settings window.
2. From the Updater Settings tab (see Figure 18)
a) Specify the repository destination folder where the downloaded packages will be
stored.
b) Enable/Disable the automatic check for updates.

Figure 18. Updater Settings window

3. In the Connection Parameters tab, specify the proxy server settings appropriate for
your network configuration by selecting a proxy type among the following possibilities
(see Figure 19):
– No Proxy
– Use System Proxy Parameters
On Windows, proxy parameters are retrieved from the PC system settings.
Uncheck “Require Authentication” if a proxy server without login/password
configuration is used.

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– Manual Configuration of Proxy Server

Enter the Proxy server http address and port number. Enter login/password
information or uncheck “Require Authentication” if a proxy server without
login/password configuration is used.
4. Optionally uncheck Remember my credentials to prevent STM32CubeMX to save
encrypted login/password information in a file. This implies reentering login/password
information each time STM32CubeMX is launched.
5. Click the Check Connection button to verify if the connection works. A green check
mark appears to confirm that the connection operates correctly

Figure 19. Connection Parameters tab - Manual Configuration of Proxy Server

6. Select Help > Install New Libraries submenu to select among a list of possible
packages to install.
7. If the tool is configured for manual checks, select Help > Check for Updates to find out
about new tool versions or firmware library patches available to install.
Note: If STM32Cube MX is not connected to the network, or if STM32CubeMX detects a
connection failure, an icon is displayed close to the myST menu item showing that there is
no network connection. When the user clicks on that icon, “Configure network” menu is
displayed, and by clicking on it, the “Updater Settings/Connection parameters” dialog pops
up. Once the STM32CubeMX is connected to the network, the network icon disappears.

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Figure 20. Connection failure

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3.4.3 Installing STM32 MCU packages

To download new STM32 MCU packages, follow the steps below:
1. Select Help > Manage embedded software packages to open the Embedded
Software Packages Manager (see Figure 21), or use Install/Remove button from the
Home page.
Expand/collapse buttons expands/collapses the list of packages,
respectively.
If the installation was performed using STM32CubeMX, all the packages available for
download are displayed along with their version including the version currently installed
on the user PC (if any), and the latest version available from www.st.com.
If no Internet access is available at that time, choose “From Local ...”, then browse to
select the zip file of the desired STM32Cube MCU package that has been previously
downloaded. An integrity check is performed on the file to ensure that it is fully
supported by STM32CubeMX.
The package is marked in green when the version installed matches the latest version
available from www.st.com.
2. Click the checkbox to select a package then “Install Now” to start the download.
See Figure 21 for an example.

Figure 21. Embedded Software Packages Manager window

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3.4.4 Installing STM32 MCU package patches

Use the procedure described in Section 3.4.3 to download STM32 MCU package patches.
A library patch, such as STM32Cube_FW_F7_1.4.1, can be easily identified by its version
number which third digit is non-null (e.g. ‘1’ for the 1.4.1 version).
The patch is not a complete library package but only the set of library files that need to be
updated. The patched files go on top of the original package (e.g.
STM32Cube_FW_F7_1.4.1 complements STM32Cube_FW_F7_1.4.0 package).
Prior to 4.17 version, STM32CubeMX copies the patches within the original baseline
directory (e.g. STM32Cube_FW_F7_V1.4.1 patched files are copied within the directory
called STM32Cube_FW_F7_V1.4.0).
Starting with STM32CubeMX 4.17, downloading a patch leads to the creation of a dedicated
directory. As an example, downloading STM32Cube_FW_F7_V1.4.1 patch creates the
STM32Cube_FW_F7_V1.4.1 directory that contains the original
STM32Cube_FW_F7_V1.4.0 baseline plus the patched files contained in
STM32Cube_FW_F7_V1.4.1 package.
Users can then choose to go on using the original package (without patches) for some
projects and upgrade to a patched version for others projects.

3.4.5 Installing embedded software packs

Starting from the release 4.24, STM32CubeMX offers the possibility to select third-party
embedded software packages coming in the Arm® Keil™ CMSIS-Pack format (.pack),
whose contents are described thanks to the pack description (.pdsc) file. Reference
documentation is available from http://www.keil.com.
1. Select Help > Manage embedded software packages to open the New Libraries
Manager window (see Figure 22), or use Install/Remove button from the Home page,
or from the project Pinout & Configuration view (select Software Packs > Manage
Software Packs).
Use Expand/collapse buttons to expand/collapse the list of packages,
respectively.

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Figure 22. Managing embedded software packages - Help menu

2. Click From Local … button to browse the computer filesystem and select an
embedded software package. STM32Cube MCU packages come as zip archives and
embedded software packs come as .pack archives.
This action is required in the following cases:
– No Internet access is possible but the embedded software package is available
locally on the computer.
– The embedded software package is not public and hence not available on
Internet. For such packages, STM32CubeMX cannot detect and propose updates.
3. Click From URL… button to specify the download location from Internet for one of the
pack .pdsc file or from the vendor pack index (.pidx).
Proceed as follow:
a) Choose From URL … and click New (see Figure 23).
b) Specify the .pdsc file url. As an example, the url of Oryx-Embedded middleware
pack is https://www.oryx-embedded.com/download/pack/Oryx-
Embedded.Middleware.pdsc (see Figure 24).

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Figure 23. Managing embedded software packages - Adding a new url

c) Click the Check button to verify that the provided url is valid (see Figure 24).

Figure 24. Checking the validity of vendor pack.pdsc file url

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d) Click OK. The pack pdsc information is now available in the user defined pack list
(see Figure 25).
To delete a url from the list, select the url checkbox and click Remove.

Figure 25. User-defined list of software packs

e) Click OK to close the window and start retrieving psdc information. Upon
successful completion, the available pack versions are shown in the list of libraries
that can be installed. Use the corresponding checkbox to select a given release.

Figure 26. Selecting an embedded software pack release

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f) Click Install Now to start downloading the software pack. A progress bar opens to
indicate the installation progress. If the pack comes with a license agreement, a
window pops up to ask for user’s acceptance (see Figure 27). When the
installation is successful, the check box turns green (see Figure 28).
The user can then add software components from this pack to its projects.

Figure 27. License agreement acceptance

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Figure 28. Embedded software pack release - Successful installation

3.4.6 Removing already installed embedded software packages

Proceed as follows (see figures 29 to 31) to clean up the repository from old library versions,
thus saving disk space:
1. Select Help > Manage embedded software packages to open the Embedded
Software Packages Manager, or use Install/Remove button from the Home page.
2. Click a green checkbox to select a package available in stm32cube repository.
3. Click the Remove Now button and confirm. A progress window then opens to show the
deletion status.

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Figure 29. Removing libraries

Figure 30. Removing library confirmation message

Figure 31. Library deletion progress window

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3.4.7 Checking for updates

Starting with version V6.12.0, if there is a new CubeFW, X-Cube, or I-Cube available for
update, an icon is displayed close to the myST menu. The same dedicated icon is displayed
left to the “CHECK FOR UPDATES” button. When the user clicks on that icon, the Update
Manager window opens.

Figure 32. Updates are available

When the updater is configured for automatic checks, it regularly verifies if updates are
available.
When automatic checks have been disabled in the updater settings window, the user can
manually check if updates are available:
1. Click the icon to open the Update Manager window or Select Help > Check for
Updates. All the updates available for the user current installation are listed.
2. Click the check box to select a package, and then Install Now to download the update.

Warning: When performing STM32CubeMX self-updates. administrator

rights are required when downloading the self-update
package and during the STM32CubeMX launch that
completes the update process:
1. Launch STM32CubeMX with administrator account
2. Go to Help > Check for updates menu, select MX update
package and click “Install now” to start the download
3. Re-launch STM32CubeMX with the administrator account
to finish the update process

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Figure 33. Help menu: checking for updates

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4 STM32CubeMX user interface

STM32CubeMX user interface comes with three main views the user can navigate through
using convenient breadcrumbs:
1. the Home page
2. the New project window
3. the project page
They come with panels, buttons and menus allowing users to take actions and make
configuration choices with a single click.
The user interface is detailed in the following sections.
For C code generation, although the user can switch back and forth between the different
configuration views, it is recommended to follow the sequence below:
1. From the Project Manager view, configure the project settings.
2. From the Mode panel in the Pinout & Configuration view, configure the RCC
peripheral by enabling the external clocks, master output clocks, audio input clocks
(when relevant for your application). This automatically displays more options on the
Clock configuration view (see Figure 179). Then, select the features (peripherals,
middlewares) and their operating modes relevant to the application.
3. If necessary, adjust the clock tree configuration from the clock configuration view.
4. From the Configuration panel in the Pinout & Configuration view configure the
parameters required to initialize the peripherals and middleware operating modes.
5. Generate the initialization C code by clicking .

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4.1 Home page

The Home page is the first window that opens up when launching STM32CubeMX (see
Figure 34). Closing it closes down the application. It offers shortcuts for some top level
menus, an image carousel displaying STM32 latest news, as well as links to social network
sites and external tools. Top-level menus and social network links remain accessible from
the subsequent project page and are detailed in the following sections.

Figure 34. STM32CubeMX Home page

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4.1.1 File menu

Refer to Table 2 for a description of the File menu and shortcuts.

Table 2. Home page shortcuts

Name
Description Home page shortcut
Keyboard shortcut

To create a new project starting from a board click

Opens a new project window showing

New Project... all supported MCUs and a set of
Ctrl-N STMicroelectronics boards to choose To create a new project starting from an MCU click
from(1).

Loads an existing STM32CubeMX

Load Project... project configuration by selecting an
Under Other project, click browse icon
Ctrl-L STM32CubeMX configuration .ioc file
(see Caution:).
Opens a new window to select the
configuration file to be imported as
Import Project… well as the import settings. The import
None
Ctrl-I is possible only if you start from an
empty MCU configuration. Otherwise,
the menu is disabled(2).
Saves current project configuration
(pinout, clock tree, peripherals,
middlewares, Power Consumption
Save Project
Calculator) as a new project. None
Ctrl-S
This action creates a project folder
including an .ioc file, according to user
defined project settings.
Save Project as…
Saves the current project. None
Ctrl-A
Close Project Closes the current project and
None
Ctrl-C switches back to the welcome page.
Recent Projects Displays the list of the five most Under Recent Project, click icon next to
none recently saved projects. the project name.
Saves the project current configuration
Generate Report
as two documents (pdf and text None
Ctrl-R
formats).
To close the window and the application click on .
Exit Proposes to save the project (if
Ctrl-X needed), then closes the application.

1. On New project: to avoid any popup error messages at this stage, make sure an Internet connection is available
(Connection Parameters tab under Help > Updater settings menu) or that Data Auto-refresh settings are set to No
Auto-Refresh at application start (Updater Settings tab under Help > Updater Settings menu).
2. On Import, a status window displays the warnings or errors detected when checking for import conflicts. The user can then
decide to cancel the import.

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Caution: On project load: STM32CubeMX detects if the project was created with an older version of
the tool and if this is the case, it proposes the user to either migrate to use the latest
STM32CubeMX database and STM32Cube firmware version, or to continue.
Prior to STM32CubeMX 4.17, clicking Continue still upgrades to the latest database
“compatible” with the STM32Cube firmware version used by the project.
Starting from STM32CubeMX 4.17, clicking Continue keeps the database used to create the
project untouched. If the required database version is not available on the computer, it is
automatically downloaded.
When upgrading to a new version of STM32CubeMX, make sure to always backup your
projects before loading the new project (especially when the project includes user code).

4.1.2 Window menu and Outputs tabs

The Window menu allows the user to access the Outputs function.

Table 3. Window menu

Name Description

Selecting/deselecting Outputs from the Window menu hides/shows the following

Outputs tabs at the bottom of STM32CubeMX project page (see Figure 35)
– MCUs selection tab that lists the MCUs of a given family matching the user criteria
Outputs
(series, peripherals, package,...) when an MCU was selected last(1).
– Outputs tab that displays a non-exhaustive list of the actions performed, raised errors
and warnings (see Figure 36) found upon user actions.
Makes possible to change STM32CubeMX font size settings. STM32CubeMX must be
Font size
re-launched for changes to take effect.
1. Selecting a different MCU from the list resets the current project configuration and switches to the new
MCU. The user is then prompted to confirm this action before proceeding.

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Figure 35. Window menu

Figure 36. Output view

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4.1.3 Help menu

Refer to Table 4 for a description of the Help menu and shortcuts.

Table 4. Help menu shortcuts

Name
Description Home page shortcut
Keyboard shortcut

Help
Opens the STM32CubeMX user manual. None
F1
About
Shows version information. None
Alt-A
Docs & Resources Displays the official documentation available for
None
Alt-D the MCU used in the current project.
Opens the Video Tutorial browser that proposes a
Video Tutorials
list of videos and allows the user to launch a video None
Alt-V
in one click.
Opens a dialog window that proposes to refresh
STM32CubeMX database with STM32 MCU latest
Refresh Data
information (description and list of official None
Alt-R
documents), and allows the user to download of
all official documentation in one shot.
Check for Updates Shows the software and firmware release updates
Click
Alt-C available for download.
Shows all the embedded software packages
available for installation.
Manage embedded
A green check box indicates that the package is
software packages Click
already installed in the user repository folder (the
Alt-U
repository folder location is specified under
Help > Updater Settings menu).
Opens the updater settings window to configure
manual versus automatic updates, proxy settings
Updater Settings…
for Internet connections, repository folder where None
Alt-S
the downloaded software and firmware releases
will be stored.
Opens the user preference window to enable or
User Preferences None
disable collect of features usage statistics.

4.1.4 Social links

Developer communities on popular social platforms such as Facebook™, Twitter™, STM32
YouTube™ channel, as well as ST Community can be accessed from the STM32CubeMX
toolbar (see Figure 37).

Figure 37. Link to social platforms

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4.2 New Project window

The New Project window is accessible through the File Menu, or directly through shortcuts
from the Home page (see Figure 38).

Figure 38. New Project window shortcuts

The main purpose is to select from the STM32 portfolio the microcontroller or board that
best fits the user application needs, or simply to get started using an example project.
This window shows three tabs to choose from:
• an MCU selector tab (offering a list of target processors)
• a Board selector tab (showing a list of STMicroelectronics boards)
• an Example selector tab (allows the user to browse and open an example project)
The new project window also features a Cross selector tab (allows the user to find, for a
given MCU/MPU part number and for a set of criteria, the best replacement within the
STM32 portfolio)

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For the STM32L5 series the security features of the Arm Cortex-M33 processor and its
Arm® TrustZone®(a) for Armv8-M are combined with ST security implementation. Selecting
an STM32L5 MCU or board requires to choose whether to activate Arm® TrustZone®
(hardware security) or not (see Figure 39). The project is adjusted accordingly:
• if Arm® TrustZone® is not activated, the solution is the same as for other STM32Lx
series
• if Arm® TrustZone® is activated, the project configuration and the generated project
shows specificities related to the security features (refer to dedicated sections in this
manual).

Figure 39. Enabling TrustZone

The selectors result view can be adjusted (see Figure 40):

• Left click the column to sort
• Right click to add/remove columns.

Figure 40. Adjusting selector results

4.2.1 MCU selector

MCU selection
The MCU selector enables filtering on a combination of criteria: series, lines, packages,
peripherals, or additional characteristics such as price, memory size or number of I/Os (see
Figure 41), and on their graphics capabilities as well.

a. TrustZone is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

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Figure 41. New Project window - MCU selector

Export to Excel feature

By clicking on the icon, the user can save the MCU table information to an
Excel file.

Show favorite MCUs feature

Clicking the icon for an MCU from the list marks it as favorite, see Figure 42.

Figure 42. Marking a favorite

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4.2.2 Board selector

The Board selector enables filtering on STM32 board types, series and peripherals (see
Figure 43). Only the default board configuration is proposed. Alternative board
configurations obtained by reconfiguring jumpers or by using solder bridges are not
supported.
When a board is selected, the Pinout view is initialized with the relevant MCU part number
along with the pin assignments for the LCD, buttons, communication interfaces, LEDs, and
other functions. Optionally, the user can choose to initialize it with the default peripheral
modes.
When a board configuration is selected, the signals change to 'pinned', i.e. they cannot be
moved automatically by STM32CubeMX constraint solver (user action on the peripheral
tree, such as the selection of a peripheral mode, does not move the signals). This ensures
that the user configuration remains compatible with the board.

Figure 43. New Project window - Board selector

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4.2.3 Example selector

The Example selector allows the user to browse a large set of examples and to start a new
project from a selected example.
Note: An example is always for a specific board and consequently for the MCU available with that
board.
Thanks to the filter panel it is possible to filter down the example list for a specific board
type, series, peripheral or middleware as well as other characteristics (see Figure 44).

Figure 44. New project window - Example selector

Selecting an example and clicking "Start project" allows STM32CubeMX to copy the
example as a new project (the user can change the default location at this stage).

Warning: For some examples the “Start Project” button is shown with
an “Under Development” warning icon. Projects created from
these examples may be not functional (they do not compile).
Fixes are in development.

Several options are available to open the newly created project (see Figure 45):
• with STM32CubeMX (available only for examples listed with an STM32CubeMX
version set)
• with a File explorer
• with one of the supported toolchains (provided the toolchain is already installed on your
computer)

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Figure 45. Popup window - Starting a project from an example

Note: If the STM32Cube MCU package needed for the example is missing from the repository,
STM32CubeMX automatically starts the download process.

4.2.4 Cross selector

Part number selection
The Cross selector allows users to find the products that best replace the MCU or MPU they
are currently using (from ST or other silicon vendors).
To access this functionality, STM32CubeMX data must be up to date. This is ensured using
Refresh Data from the Help menu (see Figure 46).

Figure 46. Cross selector - Data refresh prerequisite

Clicking “ACCESS TO CROSS SELECTOR” under the “Start my project from Cross
Selector” section of the main page opens the New Project window on the Cross selector tab.

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Two drop downs menus allow the user to select the vendor and the part number of the
product to be compared to (see Figure 47). A part number can also be entered partially:
STM32CubeMX proposes a list of matching products (see Figure 48).

Figure 47. Cross selector - Part number selection per vendor

Figure 48. Cross selector - Partial part number selection completion

Compare cart
Once a part number is selected, a list of matching ST part number candidates is displayed
along with their matching ratio in the Matching ST candidates panel.
By default, the three closest matches are selected and added to the compare cart along with
the part number to be compared to (see Figure 49).

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Figure 49. Cross selector - Compare cart

This selection can be changed anytime in the Matching ST candidates panel.

The comparison can be customized: the features to be used for comparison can be
unselected when considered as irrelevant and their level of importance can be adjusted.
These choices affect the computed matching ratio.
The comparison is disabled for features that are not supported on the part number to be
compared with, or when the feature information is unavailable.
Buttons are available to manipulate and save a copy of the compare cart view:
• to hide criteria not used for the comparison, or show all of them
• to come back to default STM32CubeMX comparison settings
• to copy and paste the current cart view in a document or email.

MCU/MPU selection for a new project

Clicking an STM32 part number from the compare cart selects it in the MCU/MPU Selector
tab, and clicking on creates a new project for that part number (see
Figure 50).

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Figure 50. Cross selector - Part number selection for a new project

Clicking the Cross Selector Tab allows the user to go back to the cart and change the
current selection for another part number.

4.3 Project page

Once an STM32 part number or a board has been selected or a previously saved project
has been loaded, the project page opens, showing the following set of views (refer to
dedicated sections for their detailed description):
• Pinout & Configuration
• Clock Configuration
• Project Manager
• Tools
Users can move across the different views without impacting their project configuration.
A button is always accessible for the user to click and allows to
generate the code corresponding to the current project configuration. Moreover, thanks to
convenient navigation breadcrumbs (see Figure 51), the user can detect what its current
location is in STM32CubeMX user interface, and can move to other locations:
• to the home page by clicking the Home breadcrumb
• to the new project window by clicking the part number
• back to the project page by clicking the project name (or Untitled if the project does not
have a name yet).

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Figure 51. STM32CubeMX Main window upon MCU selection

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Selecting a board, then answering No in the dialog window requesting to initialize all
peripherals to their default mode, automatically sets the pinout for this board. However, only
the pins set as GPIOs are marked as configured, i.e. highlighted in green, while no
peripheral mode is set. The user can then manually select from the peripheral tree the
peripheral modes required for its application (see Figure 52).

Figure 52. STM32CubeMX Main window upon board selection (peripherals not initialized)

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Selecting a board and accepting to initialize all peripherals to their default mode
automatically sets both the pinout and the default modes for the peripherals available on the
board. This means that STM32CubeMX generates the C initialization code for all the
peripherals available on the board and not only for those relevant to the user application
(see Figure 53).

Figure 53. STM32CubeMX Main window upon board selection

(peripherals initialized with default configuration)

4.4 Boot chain (STM32MPUs)

4.4.1 Boot mode configuration

ST embedded software can support complex architectures (such as OpenSTLinux), which
require a complex boot chain, involving several processors, firmware, and a complex boot
sequence. An overview is given in the STM32MPU Wiki portal.
The boot mode defines the processor that starts the software, defines the boot sequence
scheme, and which software services can be started (such as secure services, also known
as TrustZone®).

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Creating a project for a dual core (Cortex-A35 and Cortex-M33) MPU

The first example uses the following boot mode: Cortex-A35 is the master processor,
Cortex-M33 is the secondary one, in non-secure mode.
The master always runs in a secure mode.
• Select an STM32MP257x MPU
• Select the option “with A35 Master without Cortex M33 TrustZone activated?” on the
popup window (see Figure 54)

Figure 54. Project choice interface

• Six contexts are created in the configuration panel (see Figure 55)

Figure 55. Contexts

• The Cortex-A35 runs under the OpenSTLinux operating system. It uses the following
firmware:
– TF-A BL2
– OP-TEE
– U-Boot
– Linux
• The Cortex-M33 is configured using Cube firmware: M33NS Cube FW (HAL & LL)

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Figure 56. IPs interface assignment

After assigning the IPs context go to “Project Manager” view, save the project, and generate
the code.
The second example uses the following boot mode: Cortex-A35 is the master processor,
Cortex-M33 core is the secondary one, in secure mode.
The master always runs in a secure mode.
• Select an STM32MP257x MPU
• Select the option “with A35 Master with Cortex M33 TrustZone activated?” on the
popup window (see Figure 57)

Figure 57. TrustZone option

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• Six contexts created in the configuration panel (see Figure 58)

Figure 58. Selected context

Cortex-A35 runs under the OpenSTLinux operating system. It uses the following firmware:
– TF-A BL2
– OP-TEE
– U-Boot
– Linux
Cortex-M33 secure is configured using Cube firmware: TF-M
To assign IPs context go to “Pinout & Configuration” and configure IPs.

Figure 59. Assign IP context

After assigning the IPs context go to “Project Manager” view, save the project, and then
generate code.

4.4.2 Coprocessor initializers (STM32MP2x)

The STM32MP2xx comes with two possible coprocessors (Cortex-M33 or Cortex-M0+).
STM32CubeMX manages only Cortex-M33.
The STM32CubeMX tool indicates which programs running on the main processor can be
started, or if to use the secondary processor.
When the system source code is generated, the settings that determine how the main
processor can use the coprocessor are included in the device tree. These settings are found
in the “rproc” sections (nodes) for each software component that can interact with the
coprocessor. This ensures that, when the system is running, it knows how to handle the
coprocessor according to the predefined configuration.

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As an example:
• OP-TEE is eligible to load the main processor.

Figure 60. OP-TEE selected

• Linux Kernel is eligible to load for the main processor.

• U-Boot will be available when Linux is selected.

Figure 61. U-Boot selection

4.4.3 Boot device selection (STM32MP25)

The term boot device refers to any storage device from which a microcontroller can load the
initial software used to boot up the system. This initial software is part of the boot process
that starts the computer and loads the operating system.
STM32CubeMX does not handle the configuration of the pins used by STM32 devices to
select the boot source. To configure a correct boot, ensure that the boot device settings
align with the boot pins configuration, programmed in the MCU hardware. This requires
checking the datasheet or reference manual, to understand the boot pin settings, and then
manually configuring the system to match those settings.
A boot device must be assigned to the ROM firmware and the early-stage Boot Loader
(such as TF-A BL2 for OpenSTLinux).
When configuring a microcontroller, consider the constraints that affect the choice of boot
devices, and their dependency upon the selected boot mode. STM32CubeMX checks the
boot configuration of against a set of constraints to ensure that the system boots properly.
This service is called Flexible Software Loader synchronization verification. The results of
this verification are displayed in a dedicated output window (FSBL synchro output),
providing developers with important diagnostic information.
The “FSBL synchro output” panel is displayed with the rule “Faulty state detected for
SDMMC1: FSBL-A assignments possible only if assigned in BootRom”. Users can refer to
this panel to align any misconfigurations.

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Figure 62. FSBL synchronization output

4.5 Pinout & Configuration view

The Pinout & Configuration view comes with the following main panels, function and
menu:
• A Component list that can be visualized in alphabetical order and per categories. By
default, it consists of the list of peripheral and middleware that the selected MCU
supports. Selecting a component from that list opens two additional panels (Mode and
Configuration) that allow the user to set its functional mode and configure the
initialization parameters that will be included in the generated code.
• A Pinout view that shows a graphic representation of the pinout for the selected
package (e.g. BGA, QFP) where each pin is represented with its name (e.g. PC4) and
its current alternate function assignment, if any.
• A System view that gives an overview of all the software configurable components:
GPIOs, peripherals, middleware and additional software components. Clickable
buttons allow opening the configuration options for the given component (Mode and
Configuration panels). The button icon color reflects the status of the configuration
status.
• A Software Packs menu with two sub-menus:
– Select Components to select, for the current project, software components not
available by default. This selection updates the Pinout & Configuration view
accordingly
– Manage Software Packs to install/uninstall software packs.
• An Additional Software function that allows to select, for the current project, software
components that are not available by default. Selecting an additional software
component updates the Pinout & Configuration view accordingly.
• A Pinout menu that allows the user to perform pinout related actions such as clear
pinout configuration or export pinout configuration as csv file.

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Tips
• You can resize the different panels at will: hovering the mouse over a panel border
displays a two-ended arrow: right-click and pull in a direction to either extend or reduce
the panel.
• You can show/hide the Configuration, Mode, Pinout and System views using the
open and close arrows.

4.5.1 Component list

The component list shows all the components available for the project. Selecting a
component from the component list, opens the Mode and Configuration panels.

Contextual help
The Contextual Help window is displayed when hovering the mouse over a peripheral or a
middleware short name.
By default, the window displays the extended name and source of configuration conflicts if
any (see Figure 63).

Figure 63. Contextual Help window (default)

Clicking the details and documentation link (or CTRL+d) provides additional information
such as summary and reference documentation links (see Figure 64). For a given
peripheral, clicking Datasheet or Reference manual opens the corresponding document,
stored in STM32CubeMX repository folder, at the relevant chapter. Since microcontrollers
datasheets and reference manuals are downloaded to STM32CubeMX repository only upon
user request, a functional Internet connection is required:
• To check your Internet connection, open the Connection tab from the Help > Updater
Settings menu.
• To request the download of reference documentation for the currently selected
microcontroller, click Refresh from the Help > Refresh Data menu window.

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Figure 64. Contextual Help detailed information

Icons and color schemes

Table 5 shows the icons and color scheme used in the component list view and the
corresponding color scheme in the Mode panel.

Table 5. Component list, mode icons and color schemes

Display Component status Corresponding Mode view / Tooltips

Plain black text

The peripheral is not
Example: configured (no mode is set)
and all modes are available.

Gray italic text

Peripheral is not available
Example: because some constraints
are not solved. See tooltip.

The peripheral is configured

(at least one mode is set) and
all other modes are available.
Example:: The green check mark
indicates that all parameters
are properly configured, a
cross indicates they are not.

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Table 5. Component list, mode icons and color schemes (continued)

Display Component status Corresponding Mode view / Tooltips

The peripheral is not

Example: configured (no mode is set)
and at least one of its modes
is unavailable.

The peripheral is configured

(one mode is set) and at least
Example:
one of its other modes is
unavailable.

The peripheral is not

configured (no mode is set)
and no mode is available.
Example: Move the mouse over the
peripheral name to display
the tooltip describing the
conflict.

Peripheral is not available

Example: IRTIM
because of constraints.

4.5.2 Component Mode panel

Select a component from the component list on the left panel to open the Mode panel.
The Mode panel helps the user configuring the MCU pins based on a selection of
peripherals and of their operating modes. Since STM32 MCUs allow a same pin to be used
by different peripherals and for several functions (alternate functions), the tool searches for
the pinout configuration that best fits the set of peripherals selected by the user.
STM32CubeMX highlights the conflicts that cannot be solved automatically (see Table 5).
The Mode panel also allows to enable middleware and other software components for the
project.
Note: For some middleware (USB, FATS, LwIP), a peripheral mode must be enabled before
activating the middleware mode. Tooltips guide the user through the configuration. For
FatFs, a user-defined mode has been introduced. This allows STM32CubeMX to generate
FatFs code without a predefined peripheral mode. Then, it is up to the user to connect the
middleware with a user-defined peripheral by updating the generated user_diskio.c/.h driver
files with the necessary code.

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4.5.3 Pinout view

Select to show for the selected part number, a graphic representation
of the pinout for the selected package (such as. BGA, QFP), where each pin is represented
with its name (such as PC4), its configuration state and its current alternate function
assignment, if any (such as ETH_MII_RXD0). See Figure 65 for an example.

Figure 65. Pinout view

The Pinout view is automatically refreshed to match the user’s component configuration
performed in the Mode panel.
Assigning pins directly through the Pinout view instead of the Mode panel requires a good
knowledge of the MCU since each individual pin can be assigned to a specific function.

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Tips and tricks

See Table 2 for list of menus and shortcuts.
• Use the mouse wheel to zoom in and out.
• Click and drag the chip diagram to move it.
• Click best fit to reset it to best suited position and size.
• Use Pinout > Export pinout menus to export the pinout configuration as .csv text
format.
• Some basic controls, such as insuring consistency for blocks of pins, are built-in. See
Appendix A for details.

4.5.4 Pinout menu and shortcuts

Table 6. Pinout menu and shortcuts

Name or Icon Shortcut Description

Prevents moving pin assignments to match a new peripheral operating

Keep Current Signals
Ctrl-K mode. It is recommended to use the new pinning feature that can block
Placement
each pin assignment individually and leave this checkbox unchecked.
Show User Label None Displays user defined labels in the Pinout view.
Undo Mode and pinout Ctrl-Z Undoes last configuration steps (one by one).
Redoes steps that have been undone (one by one).
Redo Mode and pinout Ctrl-Y Warning (limitation): configurations in the platform settings tabs are
not restored.
Resets to “Disabled” all peripherals and middleware modes that have
been enabled. The pins configured in these modes (green color) are
Disable All Modes Ctrl-D consequently reset to “Unused” (gray color).
Peripheral and middleware labels change from green to black (when
unused) or gray (when not available).
Clears user pinout configuration in the Pinout view.
Note that this action puts all configured pins back to their reset state
Clear Pinouts Ctrl-P
and disables all the peripheral and middleware modes previously
enabled (whether they were using signals on pins or not).
Opens a window showing the list of all the configured pins together with
the name of the signal on the pin and a Label field allowing the user to
specify a label name for each pin of the list.
For this menu to be active, at least one pin must have been configured.
Pins/Signals Option Ctrl-O Click the pin icon to pin/unpin signals individually.
Select multiple rows then right click to open contextual menu and
select action to pin or unpin all selected signals at once.
Click column header names to sort alphabetically by name or
according to placement on MCU.
Clears signal assignments to pins for signals that have no associated
Clear Single Mapped Signals Ctrl-M
mode (highlighted in orange and not pinned).

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Table 6. Pinout menu and shortcuts (continued)

Name or Icon Shortcut Description

Provides a list of MCUs that best match the pin configuration of the
current project. The matching can be:
– An exact match
– A partial match with hardware compatibility: pin locations are the
List Pinout Compatible MCUs Alt-L
same, pin names may have been changed
– A partial match without hardware compatibility: all signals can be
mapped but not all at the same pin location
Refer to Section 15.
Export pinout Generates pin configuration as a .csv text file including alternate
-
with Alternate functions functions information.
Export pinout Generates pin configuration as a .csv text file excluding alternate
Ctrl-U
without Alternate functions functions information.
Opens a window to specify the number of GPIOs to be freed among
Reset used GPIOs Alt-G
the total number of GPIO pins that are configured.
Opens a window to specify the number of GPIOs to be configured
among the total number of GPIO pins that are not used yet.
Specify their mode: Input, Output or Analog (recommended
Set unused GPIOs Ctrl-G configuration to optimize power consumption).
Caution: Before using this menu, make sure that debug pins
(available under SYS peripheral) are set to access
microcontroller debug facilities.
Layout reset - -

- Zooms-in the pinout view.

- Adjusts the chip pinout diagram to the best fit size.

- Zooms-out the pinout view.

- Rotates 90 degrees clock wise.

- Rotate 90 degrees counter-clock wise.

- Flips horizontally between bottom view and top view.

- Flips vertically between bottom view and top view.

This Search field allows the user to search the Pinout view for a pin
name, a signal name, a signal label or an alternate pin name
- When it is found, the pin or set of pins matching the search criteria
blinks on the Pinout view.
Click the Pinout view to stop blinking.

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4.5.5 Pinout view advanced actions

Manually modifying pin assignments
To manually modify a pin assignment, follow the sequence below:
1. Click the pin in the Pinout view to display the list of all other possible alternate
functions together with the current assignment highlighted in blue (see Figure 66).
2. Click to select the new function to assign to the pin.

Figure 66. Modifying pin assignments from the Pinout view

Manually remapping a function to another pin

To manually remap a function to another pin, follow the sequence below:
1. From the Pinout view, hold down the CTRL key then left-click on the pin and hold: if
any pins are possible for relocation, they are highlighted in blue and blinking.
2. Drag the function to the target pin.
Caution: A pin assignment performed from the Pinout view overwrites any previous assignment.

Manual remapping with destination pin ambiguity

For MCUs with block of pins consistency (STM32F100x / F101x / F102x / F103x and
STM32F105x / F107x), the destination pin can be ambiguous, e.g. there can be more than
one destination block including the destination pin. To display all the possible alternative
remapping blocks, move the mouse over the target pin.
Note: A “block of pins” is a group of pins that must be assigned together to achieve a given
peripheral mode. As shown in Figure 67, two blocks of pins are available on an
STM32F107xx MCU to configure the Ethernet peripheral in RMII synchronous mode:
{PC1, PA1, PA2, PA7, PC4, PC5, PB11, PB12, PB13, PB5} and {PC1, PA1, PA2, PD10,
PD9, PD8, PB11, PB12, PB13, PB5}.

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Figure 67. Example of remapping in case of block of pins consistency

Resolving pin conflicts

To resolve the pin conflicts that may occur when some peripheral modes use the same pins,
STM32CubeMX attempts to reassign the peripheral mode functions to other pins. The
peripherals for which pin conflicts cannot be solved are highlighted in fuchsia with a tooltip
describing the conflict.
If the conflict cannot be solved by remapping the modes, the user can try the following:
• If the box is checked, try to select the
peripherals in a different sequence.
• Uncheck the Keep Current Signals Placement box and let STM32CubeMX try all the
remap combinations to find a solution.
• Manually remap a mode of a peripheral when you cannot use it because there is no
pin available for one of the signals of that mode.

4.5.6 Keep Current Signals Placement

This checkbox is available from the Pinout menu. It can be selected or deselected at any
time during the configuration. It is unselected by default.
It is recommended to keep the checkbox unchecked for an optimized placement of the
peripherals (maximum number of peripherals concurrently used).
The Keep Current Signals Placement checkbox should be selected when the objective is
to match a board design.

Keep Current Signals Placement is unchecked

This allows STM32CubeMX to remap previously mapped blocks to other pins in order to
serve a new request (selection of a new peripheral mode or a new peripheral mode
function) which conflicts with the current pinout configuration.

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Keep Current Signals Placement is checked

This ensures that all the functions corresponding to a given peripheral mode remain
allocated (mapped) to a given pin. Once the allocation is done, STM32CubeMX cannot
move a peripheral mode function from one pin to another. New configuration requests are
served if feasible within current pin configuration.
This functionality is useful to:
• lock all the pins corresponding to peripherals that have been configured using the
Peripherals panel
• maintain a function mapped to a pin while doing manual remapping from the Pinout
view.

Tip
If a mode becomes unavailable (highlighted in fuchsia), try to find another pin remapping
configuration for this mode by following the steps below:
1. From the Pinout view, deselect the assigned functions one by one until the mode
becomes available again.
2. Then, select the mode again and continue the pinout configuration with the new
sequence (see Appendix A: STM32CubeMX pin assignment rules for a remapping
example). This operation being time consuming, it is recommended to deselect the
Keep Current Signals Placement checkbox.
Note: Even if Keep Current Signals Placement is unchecked, GPIO_ functions (excepted
GPIO_EXTI functions) are not moved by STM32CubeMX.

4.5.7 Pinning and labeling signals on pins

STM32CubeMX comes with a feature allowing the user to selectively lock (or pin) signals to
pins. This prevents STM32CubeMX from automatically moving pinned signals to other pins
when resolving conflicts. Labels, that are used for code generation, can also be assigned to
the signals (see Section 6.1 for details).
There are several ways to pin, unpin and label the signals:
1. From the Pinout view, right-click a pin with a signal assignment. This opens a
contextual menu:
a) For unpinned signals, select Signal Pinning to pin the signal. A pin icon is then
displayed on the relevant pin. The signal can no longer be moved automatically
(for example when resolving pin assignment conflicts).
b) For pinned signals, select Signal Unpinning to unpin the signal. The pin icon is
removed. From now on, to resolve a conflict (such as peripheral mode conflict),
this signal can be moved to another pin, provided the Keep user placement option
is unchecked.
c) Select Enter User Label to specify a user defined label for this signal. The new
label replaces the default signal name in the Pinout view.

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2. From the Pinout menu, select Pins/Signals Options

The Pins/Signals Options window (see Figure 68) lists all configured pins.

Figure 68. Pins/Signals Options window

a) Click the first column to individually pin/unpin signals.

b) Select multiple rows and right-click to open the contextual menu and select
Signal(s) Pinning or Unpinning.
c) Select the User Label field to edit the field and enter a user-defined label.
d) Order list alphabetically by Pin or Signal name by clicking the column header.
Click once more to go back to default i.e. to list ordered according to pin
placement on MCU.
Note: Even if a signal is pinned, it is still possible however to manually change the pin signal
assignment from the Pinout view: click the pin to display other possible signals for this pin
and select the relevant one.

4.5.8 Pinout for multi-bonding packages

Multi-bonding has been introduced for packages with low pin counts (less than 20 pins)
such as SO8N, TSSOP20 and WLCSP18 packages. it consists of having several MCU pads
share a same pin on the package.
Multi-bonding has been introduced on the STM32G0 series for the STM32G031/G041
MCUs.
STM32CubeMX pinout view allows to displays all signals arriving on the pin and allows to
select only one per pin, except for analog signals that can be combined with other analog
GPIOs.

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Figure 69. Pinout view: MCUs with multi-bonding

STM32CUbeMX offers also an extended mode selected by right-clicking the pin: it allows to
select more than one signal per pin. This mode is meant for test purposes such as loopback
tests. It is to be used with caution as it can lead to electrical conflicts or increased power
consumption that can damage the device.

Figure 70. Pinout view: multi-bonding with extended mode

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4.5.9 System view

Select to show all the software configurable components: GPIOs,
peripherals and middleware. Clickable buttons allow the user to open the mode and
configuration options of the component. The button icon reflects the component
configuration status (see Table 7 for configuration states and Figure System view).
When the user changes the component configuration from the Configuration panel, the
system view is automatically refreshed with the new configuration state.
If the user disables the component from the Mode panel, the system view is automatically
refreshed and there is no longer a button showing for that component.

Figure 71. System view

Table 7. Configuration states

Icon Description

Configuration is complete and correct.

Configuration is correct but some parts remain to be configured (optional).

Configuration is invalid and must be fixed for the generated C project to be functional.

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GPIO, DMA and NVIC settings can be accessed either via a dedicated button (like other
peripherals, or via a tab in the Configuration panel (see Figure 72).

Figure 72. Configuration window tabs (GPIO, DMA, and NVIC settings for STM32F4 series)

4.5.10 Component configuration panel

This panel appears when clicking on a component name in the left panel. It allows the user
to configure the functional parameters required to initialize the peripheral or the middleware
in the selected operating mode (see Figure 73). STM32CubeMX uses these settings to
generate the corresponding initialization C code.
The configuration window includes several tabs:
• Parameter settings to configure library dedicated parameters for the selected
peripheral or middleware,
• NVIC, GPIO and DMA settings to set the parameters for the selected peripheral (see
Section 4.5.14, Section 4.5.12 and Section 4.5.13).
• User constants to create one or several user defined constants, common to the whole
project (see Section 4.5.11).
Invalid settings are detected and are:
• reset to minimum / maximum valid value if user choice is, respectively, smaller / larger
than minimum / maximum threshold
• reset to the previous valid value if the previous one is neither a maximum nor a
minimum threshold value
• highlighted in fuchsia.

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Figure 73. Peripheral mode and Configuration view

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Table 8 describes peripheral and middleware configuration buttons and messages.

Table 8. Peripheral and Middleware configuration window buttons and tooltips

Buttons and messages Action

Shows / hides the description panel.

Tooltip
Guides the user through the settings of
parameters with valid min-max range.
To display it, move the mouse over a
parameter value from a list of possible
values.

Clicking on the gear icon allows to

select whether to display hexadecimal
or decimal values, or any value
unchecked (No check option).

Search

Resets the component back to its

default configuration (initial settings
from STM32CubeMX).

No check option
By default, STM32CubeMX checks that the parameter values entered by the user are valid.
This check can be bypassed by selecting the option No Check for a given parameter. This
allows entering you any value (such as a constant) that might not be known by
STM32CubeMX configuration.
The validity check can be bypassed only on parameters whose values are of integer type
(either hexadecimal or decimal). It cannot be bypassed on parameters coming from a
predefined list of possible values or on those which are of non-integer or text type.
To go back to the default mode (decimal or hexadecimal values with validity check enabled),
enter a decimal or hexadecimal value and check the relevant option (hexadecimal or
decimal check).

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Caution: When a parameter depends upon another parameter that is set to No Check:
• Case of a parameter depending on another parameter for the evaluation of its minimum
or maximum possible value: If the other parameter is set to No Check, the minimum or
maximum value is no longer evaluated and checked.
• Case of a parameter depending on another parameter for the evaluation of its current
value: If the other parameter is set to No Check, the value is no longer automatically
derived. Instead, it is replaced with the formula text showing as variable the string of
the parameter set to No check (see Figure 74).

Figure 74. Formula when input parameter is set in No Check mode

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4.5.11 User Constants configuration window

An User Constants tab is available to define user constants (see Figure 75). Constants are
automatically generated in the STM32CubeMX user project within the main.h file (see
Figure 76). Once defined, they can be used to configure peripheral and middleware
parameters (see Figure 77).

Figure 75. User Constants tab

Figure 76. Extract of the generated main.h file

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Figure 77. Using constants for peripheral parameter settings

Creating/editing user constants

Click the Add button to open the User Constants tab and create a new user-defined
constant (see Figure 78).
A constant consists of:
• A name that must comply with the following rules:
– It must be unique.
– It shall not be a C/C++ keyword.
– It shall not contain a space.
– It shall not start with digits.
• A value
The constant value can be (see Figure 75 for examples):
– a simple decimal or hexadecimal value
– a previously defined constant
– a formula using arithmetic operators (subtraction, addition, division, multiplication,
and remainder) and numeric value or user-defined numeric constants as operands
– a character string: the string value must be between double quotes (example:
“constant_for_usart”).

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Once a constant is defined, its name and/or its value can still be changed: double- click the
row that specifies the user constant to be modified. This opens the User Constants tab for
edition. The change of constant name is applied wherever the constant is used. This does
not affect the peripheral or middleware configuration state. However changing the constant
value impacts the parameters that use it and might result in invalid settings (such as
exceeding a maximum threshold). Invalid parameter settings are highlighted in fuchsia.

Figure 78. Specifying user constant value and name

Deleting user constants

Click the Remove button to delete an existing user-defined constant.
The user constant is then automatically removed except in the following cases:
• When the constant is used for the definition of another constant. In this case, a popup
window displays an explanatory message (see Figure 79).

Figure 79. Deleting an user constant is not allowed when it

is already used for another constant definition

• When the constant is used for the configuration of a peripheral or middleware library
parameter. In this case, the user is requested to confirm the deletion since the constant
removal results in a invalid peripheral or middleware configuration (see Figure 80).

Figure 80. Confirmation request to delete a constant for parameter configuration

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Clicking Yes leads to an invalid peripheral configuration (see Figure 81).

Figure 81. Consequence when deleting a user constant for peripheral configuration

Searching for user constants

The Search Constants field makes it possible the search of a constant name or value in the
complete list of user constants (see Figure 82 and Figure 83).

Figure 82. Searching for a name in a user constant list

Figure 83. Searching for a value in a user constant list

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4.5.12 GPIO configuration window

Click GPIO in the System view panel to open the GPIO configuration window to configure
the GPIO pin settings (see Figure 84). The configuration is populated with default values
that might not be adequate for some peripheral configurations. In particular, check if the
GPIO speed is sufficient for the peripheral communication speed, and select the internal
pull-up whenever needed.
Note: GPIO settings can be accessed for a specific peripheral instance via the dedicated window
in the peripheral instance configuration window. In addition, GPIOs can be configured in
output mode (default output level). The generated code is updated accordingly.

Figure 84. GPIO configuration window - GPIO selection

Click on a row or select a set of rows to display the corresponding GPIO parameters:
• GPIO PIN state
Changes the default value of the GPIO output level. It is set to low by default and can
be changed to high.
• GPIO mode (analog, input, output, alternate function)
Selecting a peripheral mode in the Pinout view automatically configures the pins with
the relevant alternate function and GPIO mode.
• GPIO pull-up/pull-down
Set to a default value, can be configured when other choices are possible.
• GPIO maximum output speed (for communication peripherals only)
Set to Low by default for power consumption optimization, can be changed to a higher
frequency to fit application requirements.
• User Label
Changes the default name (such as GPIO_input) into a user defined name. The Pinout
view is updated accordingly. The GPIO can be found under this new name via the Find
menu.

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The Group by Peripherals checkbox allows the user to group all instances of a peripheral
under the same window (see Figure 85).

Figure 85. GPIO configuration grouped by peripheral

As shown in Figure 86, row multi-selection can be performed to change a set of pins to a
given configuration at the same time.

Figure 86. Multiple pins configuration

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4.5.13 DMA configuration window

Click DMA in the System view to open the DMA configuration window.
This window is used to configure the generic DMA controllers available on the MCU. The
DMA interfaces allow to perform data transfers between memories and peripherals while the
CPU is running, and memory to memory transfers (if supported).
Note: Some peripherals (such as USB or Ethernet) have their own DMA controller, which is
enabled by default or via the Peripheral Configuration window.
Clicking Add in the DMA configuration window adds a new line at the end of the DMA
configuration window with a combo box proposing to choose between possible DMA
requests to be mapped to peripherals signals (see Figure 87).

Figure 87. Adding a new DMA request

Selecting a DMA request automatically assigns a stream among all the streams available, a
direction and a priority. When the DMA channel is configured, it is up to the application code
to fully describe the DMA transfer run-time parameters such as the start address.
The DMA request (called channel for STM32F4 MCUs) is used to reserve a stream to
transfer data between peripherals and memories (see Figure 88). The stream priority is
used to decide which stream to select for the next DMA transfer.
DMA controllers support a dual priority system using the software priority first, and in case of
equal software priorities, a hardware priority that is given by the stream number.

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Figure 88. DMA configuration

Additional DMA configuration settings can be done through the DMA configuration
window:
• Mode: regular mode, circular mode, or peripheral flow controller mode (only available
for the SDIO peripheral).
• Increment Add: the type of peripheral address and memory address increment (fixed
or postincremented, in which case the address is incremented after each transfer).
Click the checkbox to enable the post-incremented mode.
• Peripheral data width: 8, 16, or 32 bits
• Switching from the default direct mode to the FIFO mode with programmable threshold:
a) Click the Use FIFO checkbox.
b) Configure the peripheral and memory data width (8, 16, or 32 bits).
c) Select between single transfer and burst transfer. If you select burst transfer,
choose a burst size (1, 4, 8, or 16).
In case of memory-to-memory transfer (MemToMem), the DMA configuration applies to a
source memory and to a destination memory.

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Figure 89. DMA MemToMem configuration

4.5.14 NVIC configuration window

Click NVIC in the System view to open the Nested Vector interrupt controller configuration
window (see Figure 90).
Interrupt unmasking and interrupt handlers are managed within two tabs:
• NVIC, to enable peripheral interrupts in the NVIC controller and to set their priorities
• Code generation, to select options for interrupt related code generation

Enabling interruptions using the NVIC tab view

The NVIC view (see Figure 90) does not show all possible interrupts, but only the ones
available for the peripherals selected in the Pinout & Configuration panels. System
interrupts are displayed but can never be disabled.
Check/uncheck the Show only enabled interrupts box to filter or not enabled interrupts.
When DMA channels are configured in the project, check/uncheck “Force DMA channels
interrupts” to automatically enable/disable DMA channels interrupts in the generated code.
Use the search field to filter out the interrupt vector table according to a string value. As an
example, after enabling UART peripherals from the Pinout panel, type UART in the NVIC
search field and click the green arrow close to it: all UART interrupts are displayed.
Enabling a peripheral interrupt generates NVIC function calls HAL_NVIC_SetPriority and
HAL_NVIC_EnableIRQ for this peripheral.

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Figure 90. NVIC configuration tab - FreeRTOS disabled

When FreeRTOS is enabled, an additional column is shown (see Figure 91).

In this case, all the interrupt service routines (ISRs) that are calling the interrupt safe
FreeRTOS APIs must have a priority lower than the priority defined in the
LIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY parameter (the highest the value, the
lowest the priority). The check in the corresponding checkbox guarantees that the restriction
is applied.

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If an ISR does not use such functions, the checkbox can be unchecked and any priority level
can be set. It is possible to check/uncheck multiple rows (see rows highlighted in blue in
Figure 91).

Figure 91. NVIC configuration tab - FreeRTOS enabled

Peripheral dedicated interrupts can also be accessed through the NVIC window in the
configuration window (see Figure 92).

Figure 92. I2C NVIC configuration window

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STM32CubeMX NVIC configuration consists in selecting a priority group, enabling/disabling

interrupts and configuring interrupts priority levels (preemption and sub-priority levels):
1. Select a priority group
Several bits allow to define NVIC priority levels, they are divided in two groups,
preemption priority and sub-priority. For example, in the case of STM32F4 MCUs, the
NVIC priority group 0 corresponds to 0-bit preemption and 4-bit sub-priority.
2. In the interrupt table, click one or more rows to select one or more interrupt vectors.
Use the widgets below the interrupt table to configure the vectors one by one or several
at a time:
– Enable checkbox: check/uncheck to enable/disable the interrupt.
– Preemption priority: select a priority level. The preemption priority defines the
ability of one interrupt to interrupt another.
– Sub-priority: select a priority level. Defines the interrupt priority level.

Code generation options for interrupt handling

The Code Generation view allows customizing the code generated for interrupt initialization
and interrupt handlers:
• Selection/Deselection of all interrupts for sequence ordering and IRQ handler
code generation
Use the checkboxes in front of the column names to configure all interrupts at a time
(see Figure 93). Note that system interrupts are not eligible for init sequence reordering
as the software solution does not control it.

Figure 93. NVIC Code generation – All interrupts enabled

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• Default initialization sequence of interrupts

By default, the interrupts are enabled as part of the peripheral MSP initialization
function, after the configuration of the GPIOs and the enabling of the peripheral clock.
This is shown in the CAN example below, where HAL_NVIC_SetPriority and
HAL_NVIC_EnableIRQ functions are called within stm32xxx_hal_msp.c file inside the
peripheral msp_init function.
Interrupt enabling code is shown in bold:
void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
{
GPIO_InitTypeDef GPIO_InitStruct;
if(hcan->Instance==CAN1)
{
/* Peripheral clock enable */
__CAN1_CLK_ENABLE();
/**CAN1 GPIO Configuration
PD0 ------> CAN1_RX
PD1 ------> CAN1_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);

/* Peripheral interrupt init */

HAL_NVIC_SetPriority(CAN1_TX_IRQn, 2, 2);
HAL_NVIC_EnableIRQ(CAN1_TX_IRQn);
}
}
For EXTI GPIOs only, interrupts are enabled within the MX_GPIO_Init function:
/*Configure GPIO pin : MEMS_INT2_Pin */
GPIO_InitStruct.Pin = MEMS_INT2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(MEMS_INT2_GPIO_Port, &GPIO_InitStruct);

/* EXTI interrupt init*/

HAL_NVIC_SetPriority(EXTI15_10_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);

For some peripherals, the application still needs to call another function to actually
activate the interruptions. Taking the timer peripheral as an example, the
HAL_TIM_IC_Start_IT function needs to be called to start the Timer input capture (IC)
measurement in interrupt mode.

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• Configuration of interrupts initialization sequence

Checking Select for Init sequence ordering for a set of peripherals moves the
HAL_NVIC function calls for each peripheral to a same dedicated function, named
MX_NVIC_Init, defined in the main.c. Moreover, the HAL_NVIC functions for each
peripheral are called in the order specified in the Code generation view bottom part
(see Figure 94).
As an example, the configuration shown in Figure 94 generates the following code:
/** NVIC Configuration
*/
void MX_NVIC_Init(void)
{
/* CAN1_TX_IRQn interrupt configuration */
HAL_NVIC_SetPriority(CAN1_TX_IRQn, 2, 2);
HAL_NVIC_EnableIRQ(CAN1_TX_IRQn);
/* PVD_IRQn interrupt configuration */
HAL_NVIC_SetPriority(PVD_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(PVD_IRQn);
/* FLASH_IRQn interrupt configuration */
HAL_NVIC_SetPriority(FLASH_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(CAN1_IRQn);
/* RCC_IRQn interrupt configuration */
HAL_NVIC_SetPriority(RCC_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(CAN1_IRQn);
/* ADC_IRQn interrupt configuration */
HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(ADC_IRQn);
}
• Interrupts handler code generation
By default, STM32CubeMX generates interrupt handlers within the stm32xxx_it.c file.
As an example:
void NMI_Handler(void)
{
HAL_RCC_NMI_IRQHandler();
}
void CAN1_TX_IRQHandler(void)
{
HAL_CAN_IRQHandler(&hcan1);
}
The column Generate IRQ Handler allows the user to control whether the interrupt
handler function call can be generated or not. Deselecting CAN1_TX and NMI
interrupts from the Generate IRQ Handler column as shown in Figure 94 removes the
code mentioned earlier from the stm32xxx_it.c file.

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Figure 94. NVIC Code generation – IRQ Handler generation

4.5.15 FreeRTOS configuration panel

Through STM32CubeMX FreeRTOS configuration window, the user can configure all the
resources required for a real-time OS application, and reserve the corresponding heap.
FreeRTOS elements are def/ined and created in the generated code using CMSIS-RTOS
API functions. Follow the sequence below:
1. In the Pinout & Configuration tab, click FreeRTOS to reveal the Mode and
Configuration panels (see Figure 95).
2. Enable freeRTOS in the Mode panel.
3. Go to the configuration panel to proceed with configuring FreeRTOS native parameters
and objects, such as tasks, timers, queues, and semaphores. In the Config tab,
configure Kernel and Software settings. In the Include parameters tab, select the API
functions required by the application and this way, optimize the code size. Both Config
and Include parameters are part of the FreeRTOSConfig.h file.

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Figure 95. FreeRTOS configuration view

Tasks and Queues tab

As any RTOS, FreeRTOS allows structuring a real-time application into a set of independent
tasks, with only one task being executed at a given time. Queues are meant for inter-task
communications: they allow to exchange messages between tasks or between interrupts
and tasks.
The FreeRTOS Tasks and Queues tab enables the creation and configuration of such
tasks and queues (see Figure 96).
The corresponding initialization code is generated within main.c or freeRTOS.c if the option
“generate code as pair of .c/.h files per peripherals and middleware” is set in the Project
Settings menu, or within main.c by default, or within freeRTOS.c if the option “generate
code as pair of .c/.h files per peripherals and middleware” is set in the Project Manager
menu.

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Figure 96. FreeRTOS: configuring tasks and queues

• Tasks
Under the Tasks section, click the Add button to open the New Task window where
task name, priority, stack size and entry function can be configured (see Figure 97).
These settings can be updated at any time: double-clicking a task row opens again the
new task window for editing.
The entry function can be generated as weak or external:
– When the task is generated as weak, the user can propose a definition different
from the one generated by default.
– When the task is extern, it is up to the user to provide its function definition.
By default, the function definition is generated including user sections to allow
customization.
• Queues
Under the Queues section, click the Add button to open the New Queue window
where the queue name, size and item size can be configured (see Figure 97). The
queue size corresponds to the maximum number of items that the queue can hold at a
time, while the item size is the size of each data item stored in the queue. The item size
can be expressed either in number of bytes or as a data type:
• 1 byte for uint8_t, int8_t, char and portCHAR types
• 2 bytes for uint16_t, int16_t, short and portSHORT types
• 4 bytes for uint32_t, int32_t, int, long and float
• 8 bytes for uint64_t, int64_t and double
By default, the FreeRTOS heap usage calculator uses four bytes when the item size
cannot be automatically derived from user input.
These settings can be updated at any time: double-clicking a queue row opens again
the new queue window for editing.

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Figure 97. FreeRTOS: creating a new task

The following code snippet shows the generated code corresponding to Figure 96.
/* Create the thread(s) */
/* definition and creation of defaultTask */
osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 128);
defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);

/* definition and creation of Task_A */

osThreadDef(Task_A, StartTask_A, osPriorityHigh, 0, 128);
Task_AHandle = osThreadCreate(osThread(Task_A), NULL);

/* definition and creation of Task_B */

osThreadDef(Task_B, StartTask_B, osPriorityLow, 0, 256);
Task_BHandle = osThreadCreate(osThread(Task_B), NULL);

/* Create the queue(s) */

/* definition and creation of myQueue_1 */
osMessageQDef(myQueue_1, 16, 4);
myQueue_1Handle = osMessageCreate(osMessageQ(myQueue_1), NULL);

/* definition and creation of myQueue_2 */

osMessageQDef(myQueue_2, 32, 2);
myQueue_2Handle = osMessageCreate(osMessageQ(myQueue_2), NULL);

Timers, Mutexes and Semaphores

FreeRTOS timers, mutexes and semaphores can be created via the FreeRTOS Timers and
Semaphores tab. They first need to be enabled from the Config tab (see Figure 98).

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Figure 98. FreeRTOS - Configuring timers, mutexes and semaphores

Under each object dedicated section, clicking the Add button to open the corresponding
New <object> window, where the object specific parameters can be specified. Object
settings can be modified at any time: double- clicking the relevant row opens again the New
<object> window for edition.
Note: Expand the window if the newly created objects are not visible.
• Timers
Prior to creating timers, their usage (USE_TIMERS definition) must be enabled in the
software timer definitions section of the Configuration parameters tab. In the
same section, timer task priority, queue length and stack depth can be also configured.
The timer can be created to be one-shot (run once) or auto-reload (periodic). The timer
name and the corresponding callback function name must be specified. It is up to the
user to fill the callback function code and to specify the timer period (time between the
timer being started and its callback function being executed) when calling the
CMSIS-RTOS osTimerStart function.
• Mutexes / Semaphores
Prior to creating mutexes, recursive mutexes and counting semaphores, their usage
(USE_ MUTEXES, USE_RECURSIVE_MUTEXES,
USE_COUNTING_SEMAPHORES definitions) must be enabled within the Kernel
settings section of the Configuration parameters tab.
The following code snippet shows the generated code corresponding to Figure 98.

/* Create the semaphores(s) */

/* definition and creation of myBinarySem01 */
osSemaphoreDef(myBinarySem01);
myBinarySem01Handle = osSemaphoreCreate(osSemaphore(myBinarySem01), 1);

/* definition and creation of myCountingSem01 */

osSemaphoreDef(myCountingSem01);
myCountingSem01Handle = osSemaphoreCreate(osSemaphore(myCountingSem01),
7);

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/* Create the timer(s) */

/* definition and creation of myTimer01 */
osTimerDef(myTimer01, Callback01);
myTimer01Handle = osTimerCreate(osTimer(myTimer01), osTimerPeriodic,
NULL);

/* definition and creation of myTimer02 */

osTimerDef(myTimer02, Callback02);
myTimer02Handle = osTimerCreate(osTimer(myTimer02), osTimerOnce, NULL);

/* Create the mutex(es) */

/* definition and creation of myMutex01 */
osMutexDef(myMutex01);
myMutex01Handle = osMutexCreate(osMutex(myMutex01));

/* Create the recursive mutex(es) */

/* definition and creation of myRecursiveMutex01 */
osMutexDef(myRecursiveMutex01);
myRecursiveMutex01Handle =
osRecursiveMutexCreate(osMutex(myRecursiveMutex01));

FreeRTOS heap usage

The FreeRTOS Heap usage tab displays the heap currently used and compares it to the
TOTAL_HEAP_SIZE parameter set in the Config Parameters tab. When the total heap
used crosses the TOTAL_HEAP_SIZE maximum threshold, it is shown in fuchsia and a
cross of the same color appears on the tab (see Figure 99).

Figure 99. FreeRTOS heap usage

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4.5.16 Setting HAL timebase source

By default, the STM32Cube HAL is built around a unique timebase source, the
Arm® Cortex® system timer (SysTick).
However, HAL-timebase related functions are defined as weak, so that they can be
overloaded to use another hardware timebase source. This is strongly recommended when
the application uses an RTOS, since this middleware has full control on the SysTick
configuration (tick and priority) and most RTOSs force the SysTick priority to be the lowest.
Using the SysTick remains acceptable if the application respects the HAL programming
model, that is, does not perform any call to HAL timebase services within an Interrupt
Service Request context (no dead lock issue).
To change the HAL timebase source, go to the SYS peripheral in the Component list panel
and select a clock among the available sources: SysTick, TIM1, TIM2,... (see Figure 100).

Figure 100. Selecting a HAL timebase source (STM32F407 example)

When used as timebase source, a given peripheral is grayed and can no longer be selected
(see Figure 101).

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Figure 101. TIM1 selected as HAL timebase source

As illustrated in the following examples, the selection of the HAL timebase source and the
use of FreeRTOS influence the generated code.

Example of configuration using SysTick without FreeRTOS

As illustrated in Figure 102, the SysTick priority is set to 0 (High) when using the SysTick
without FreeRTOS.

Figure 102. NVIC settings when using SysTick as HAL timebase, no FreeRTOS

Interrupt priorities (in main.c) and handler code (in stm32f4xx_it.c) are generated
accordingly:
• main.c file
/* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);

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• stm32f4xx_it.c file
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
HAL_SYSTICK_IRQHandler();
/* USER CODE BEGIN SysTick_IRQn 1 */

/* USER CODE END SysTick_IRQn 1 */

}

Example of configuration using SysTick and FreeRTOS

As illustrated in Figure 103, the SysTick priority is set to 15 (Low) when using the SysTick
with FreeRTOS.

Figure 103. NVIC settings when using FreeRTOS and SysTick as HAL timebase

As shown in the following code snippets, the SysTick interrupt handler is updated to use
CMSIS-os osSystickHandler function.
• main.c file
/* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0);

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• stm32f4xx_it.c file
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */

/* USER CODE END SysTick_IRQn 0 */

HAL_IncTick();
osSystickHandler();
/* USER CODE BEGIN SysTick_IRQn 1 */

/* USER CODE END SysTick_IRQn 1 */

}

Example of configuration using TIM2 as HAL timebase source

When TIM2 is used as HAL timebase source, a new stm32f4xx_hal_timebase_TIM.c file is
generated to overload the HAL timebase related functions, including the HAL_InitTick
function that configures the TIM2 as the HAL time-base source.
The priority of TIM2 timebase interrupts is set to 0 (High). The SysTick priority is set to 15
(Low) if FreeRTOS is used, otherwise is set to 0 (High).

Figure 104. NVIC settings when using FreeRTOS and TIM2 as HAL timebase

The stm32f4xx_it.c file is generated accordingly:

• SysTick_Handler calls osSystickHandler when FreeRTOS is used, otherwise it calls
HAL_SYSTICK_IRQHandler.
• TIM2_IRQHandler is generated to handle TIM2 global interrupt.

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4.6 Pinout & Configuration view for STM32MPUs

For STM32MPUs the Pinout & Configuration view allows the user to:
• assign components to one or several run time contexts
• configure peripherals as boot devices
• select the peripherals to be managed by boot loaders
• assign GPIOs to one runtime (see Figure 106).
These possibilities are offered in two different panels (see Figure 105):
1. from the component tree panel, listing all supported peripherals and middleware (the
“Show contexts” option must be enabled)
2. from each component mode panel, opened by clicking the component name.

Figure 105. STM32MPUs boot devices and runtime contexts

Figure 106. STM32MPUs: assignment options for GPIOs

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4.6.1 Run time configuration

On these multi-core (Arm® Cortex®-A7 dual-core and Cortex-®M4) and multi-firmware
devices, each firmware is executing on one of the cores. The association between firmware
and core defines a runtime context. Three runtime contexts are available:
1. Cortex-A7 Non Secure running the Linux kernel
2. Cortex-A7 Secure running the SP_min
3. Cortex-M4 running the STM32Cube firmware.
Assigning a component to a runtime context means specifying which context(s) will control
the component at runtime. Assignments to a Cortex-A7 context are reflected in the device
tree code generation, while assignments to the Cortex-M4 context are reflected in
STM32Cube based C code generation (refer to code generation sections for more details).
The component assignment to a context is done in the context dedicated column.

4.6.2 Boot stages configuration

Boot ROM peripherals selection
Several execution stages are needed by the microprocessor to be up and running.
The binary code embedded in the ROM is the first to be executed. It uses a default
configuration to initialize the clock tree and all peripherals involved in the boot detection.
The peripherals managed by the boot ROM program can be selected as boot devices. This
choice is done in the Boot ROM column (see Figure 107).

Figure 107. Select peripherals as boot devices

When a peripheral is set as boot device, it imposes a specific pinout: some signals have to
be mapped exclusively on pins visible by the boot ROM and only these signals/pins are
taken into account by the boot ROM program.
When a functional mode of a ROM-bootable peripheral is set, the pinout linked to this mode
is the same of that for a runtime context except for the signals imposed on specific pins by
the boot ROM code.

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During the boot step (boot ROM code execution), the peripheral is running only with the
sub-set of bootable signals and pins. After boot, during runtime, the peripheral runs with all
signals necessary to the selected functional mode.

Boot loader (A7 FSBL) peripherals selection

When the board starts, the launching of each of the Cortex-A7 runtime contexts (Secure and
Non Secure) on which a firmware executes (for example Linux kernel for Cortex-A7 Non
Secure) preceded by an early boot execution stage, that is before U-Boot relocation in DDR.
The Boot loader (A7 FSBL) column is used to define which devices can be managed during
this Boot loader stage.
This assignment are reflected in the different device trees generated (refer to code
generation sections for more details).

4.7 RIF configuration

Some STM32 products, like the STM32MP25x, have a special feature called RIF (resource
isolation framework), used as a security guard for the their peripherals and memory. RIF
decides which blocks the CPU can use, and manages the support systems for them. For
details on how RIF operates, visit the STM32MPU Wiki website.
When the user sets up RIF in the STM32CubeMX program, the basic steps are the same,
independently from the used device, even if there are several available options.

4.7.1 Configuration approach

In STM32CubeMX, the way the RIF keeps blocks safe is controlled by how user sets up
them by software. When the settings change, STM32CubeMX checks them, translates what
the user has done, and shows the updates in a special section called RIF panel.
User cannot set the access level or their special functions only by using software settings.
This is managed by the main, trusted part of the software, with special access (Privileged
mode). If there is need to use a setup where some blocks are used by less trusted software
without special access (non-Privileged mode), user can make the changes in the RIF panel.
Blocks that user cannot set up with a software tool (like some memory areas in the
STM32MP25), can still be protected by using the RIF panel.
The RIF panel is designed to display the security settings for the whole microcontroller
(SOC level) in a way is similar to what detailed in the reference manual.
In the final steps:
• The system creates a set of rules (RIF configuration) that determine who is allowed to
use different parts of the microcontroller. These rules are written out as source code.
• The code that sets up the microcontroller hardware blocks (like memory and
peripherals) is made to match the software settings and the access rules user has set.
This ensures that everything works together, without conflicts.

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4.7.2 RIF global configurations

RIF global configurations for STM32MP2
The RIF configuration panel contains only one configuration, named Default configuration.
The user can either lock down unused resources to prevent access, or leave them open for
unrestricted use.
Two choices are proposed:
• No access: blocks the use of the resource. No one can read from it, write to it, or use it
in any way.
• Full access: the resource can be used, it can be read and written without any
restriction.

Figure 108. Default configuration

For the STM32MP2 series, there is a unique RIF configuration provided to the user. The
radio button is disabled and indicates “No access” (see Figure 109): the user cannot read,
write, or use it in any form.

Figure 109. Default configuration for the STM32MP2 series

RIF global configurations for STM32N6

For the STM32N6 series, the RIF default configuration is not supported.

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4.7.3 Peripherals protection

Microcontroller peripherals can be classified by their function or by how they are protected:
• Sorted by function:
– Standard peripherals: do processing and can interact with other devices (such as
I2C and UART).
– Service peripherals: do processing but do not interact with other devices (such as
CRYP and HASH).
– System peripherals: provide services to other peripherals (such as RCC, GPIO,
DMA).
• Sorted by protection scheme:
– The whole peripheral is protected (non-RIF-aware IP). Access rules are set for the
whole peripheral. The RISUP subsystem manages the protection.
– Protection by specific function (RIF-aware and pseudo-RIF-aware IP). Access
rules are based on specific functions/features. The peripheral itself controls the
protection. For pseudo-RIF-aware IPs, although they are RIF-aware, their feature
protection is managed by the RISUP.
In STM32CubeMX, the security for the microcontroller peripherals is set through the RIF,
based on the software settings. The program figures out the security rules automatically,
based on which parts (IP or IP features) are assigned to various parts of the software. When
a part is assigned to a software area, it must be decided who can use, who can set it up, and
what is allowed to do with it.
The configuration of access rights are available within the RIF panel:
• Non RIF-aware and pseudo RIF-aware IPs: access rights are managed through the
RISUP panel.
• RIF-aware IPs: access rights for these IPs are configured in the RIF-aware IPs panel.

4.7.4 Peripheral instance protection

Peripheral instance protection for STM32MP2
The assignment of IPs (or IP features in the case of pseudo-RIF-aware IPs) to software
contexts directly determines access rights. These rights are then displayed in the RIF
RISUP configuration panel, which outlines the level of protection provided by the RIF, and
where advanced configurations can be specified for each peripheral instance.
The RISUP configuration panel for STM32MP2 series is composed of:
• The list of IPs and features of pseudo-RIF-aware IPs
• IP identifiers (ID), as defined in the reference manual
• IP master owners compartment Identifiers (CID) and security states
• The RIF privilege level for each IP
• The lock state for each IP

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Figure 110. RISUP configuration panel

The Lock blocks any change after boot (that is, after configuration in STM32CubeMX), to
prevent software from subsequently making changes to the RIF elements.
The Local Lock defines a Lock on independent elements.
Global Lock defines a Lock on a set of elements. By default, it is OFF.

Configuration example
Figure 111 shows on left hand side the IP allocation per software context, and, on the
right-hand side the equivalent in the RISUP configuration panel.

Figure 111. Software context configuration vs. RISUP configuration

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For example, if the user sets ADC3 to Cortex-A35 secure context, on the RIF panel ADC3 is
allocated to CID 1, and set secure. The user can then configure the privilege and the lock. If
a peripheral is set in two contexts (Cortex-A35 and Cortex-M33), the allocated CID is 1&2.

Figure 112. Example of IP assignment to one context and result in RISUP

If the user selects an IP in a Cortex-A35 non secure context and a Cortex-M33 non secure
context, the CID is set to 1&2 and the Secure column is unticked, as shown in Figure 113.
If the IP is not assigned to any software context, the CID column contain a –, and the Secure
column is unticked (in the case of Full Access).

Figure 113. Example of IP assignment to two contexts and result in RISUP

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Figure 114. Lock and privilege in RISUP table

Note: Some IPs in RISUP do not exist in peripheral list, and some IPs are coupled. They show-up
in the Peripheral column as one. As an example, ADC1 and ADC2 are shown as ADC12,
ICACHE and DCACHE are shown as ICACHE_DCACHE.
The features of the pseudo RIF-aware IPs are also visible in the RISUP table, as shown in
Figure 115.

Figure 115. Pseudo RIF-aware IP assignment

Peripheral instance protection for STM32N6

The RISUP panel for STM32N6 series (Figure 116) does not have the CID column because
the STM32N6 contains a single M55 core. Consequently, the CID column is unnecessary as
all peripherals in the STM32N6 are allocated by default to CID1, and the indication of RIF
unused with a – is no longer available.

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The panel is composed of five columns:

• Peripherals column: list of pseudo-RIF-aware IPs and features
• ID column: IP identifiers (as defined in the reference manual)
• Secure column: security state for each IP
• Privilege column: privilege level for each IP
• Lock column: lock state for each IP

Figure 116. Peripherals (RISUP) panel for the STM32N6 series

If the user chooses to create a new project as full secure (Figure 117), the column “Secure”
is hidden, as all peripherals are working in secure mode (Figure 118).

Figure 117. Creation of a new project for the STM32N6 series - Secure projects

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Figure 118. Peripherals (RISUP) panel for the STM32N6 series - Secure projects

4.7.5 IP feature protection

In certain scenarios, feature assignment can depend upon the feature assignment of
another IP within the system.
Feature assignments are managed through the Features Configuration panel associated
with each RIF-aware IP. For non-RIF-aware IPs, although access rights are inferred from
the feature-to-software context assignments, they are documented in the IP sub-panel
found within the RIF-aware IPs configuration panel.
The features assignment is combined with the IP modes:
• The features define which functionalities can be accessed, by which firmware
• The modes define which features are effectively used and initialized and open access
to initialization parameters
The initialization parameters set depend on the corresponding feature assignment:
• HAL parameters when feature is assigned to a Cube firmware
• No parameters for firmware initialized via a device tree system (such as an
OpenSTLinux firmware)

Configuration example
In the following example, the FMC IP is configured to work as a RIF-aware IP:
• Click on FMC IP in Pinout & Configuration panel
• The FMC related features is displayed on the configuration panel on the right-hand side
• Select A35S (OP-TEE) for the features FMC_CFGR
• In the FMC Mode and Configuration panel, pick “NE1” in the “Chip select” drop down
• In the Configuration panel, three tabs are displayed (Parameter Settings, Features,
GPIO Settings)

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Figure 119. FMC configuration

Configuring FMC in a RIF panel:

• Click on the RIF tab
• Select the RIF aware IP tab on the left-hand side
• Choose FMC
Each feature can be configured as secure or privileged.
• The CID column represents the hardware context
• The security column comes from the security of software context
• The privilege column is set to false by default

Figure 120. RIF FMC panel

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Figure 121. RTC features

Figure 122. RTC mode

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Figure 123. RTC parameters setting

4.7.6 Software constraints validation

When integrating software, there are specific guidelines for setting up access to integrated
peripheral features, and to ensure that the software works correctly with the intended
STMicroelectronics software architecture. These guidelines are recommendations for the
ST software architecture, but are not mandatory requirements. STM32CubeMX provides a
helpful feature in the Feature Assignment panel to follow these guidelines. It uses a color
coding system and instructions to make the process easier.

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Figure 124. Color coding system and instructions

4.7.7 Masters configuration

Masters configurations for STM32MP2
The RIMU is one of the core components of RIF. It allows some IPs (with data transfer
capabilities) to be configured as a master. It can be used to assign an IP to a security
domain by defining the secure, privilege, and compartment ID (CID).
RIMU allows the user to:
• See the list of master IPs (in their default configuration) for new domain creation
• Create new domain from each masters
• Configure the RIF security level of each master
• Configure the RIF privilege level of each master
• Configure global lock
Between RIMU and RISUP there is an inheritance relationship for common IPs. This
relationship allows the IP to inherit the CID, security state, and privilege state from RISUP
when the user does not define its own values.
The user interface for STM32MP2 is composed of a table containing six columns:

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1. IP name
2. IP id, which are unique
3. CID SELECTION, to select CID
4. Master CID, to change the CID value
5. Secure state, inherited from RISUP
6. PRIVILEGE state, when enabled
A global lock button on the top of RIMU table can be used to lock the RIMU.

Figure 125. RIMU user interface

To define a CID for an IP, activate CID SELECTION, and then choose a value from 0 to 6, as
shown in Figure 126.

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Figure 126. Assigning a CID to an IP in RIMU

To change the security or privilege value for an IP, activate the appropriate CID SELECTION
checkbox, as shown in Figure 127.

Figure 127. Modification of the security and privilege values

The inheritance relationship between RISUP and RIMU is established and valid only if the
IP is assigned to a context in the Pinout & Configuration panel.

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In the context of inheritance relationships, the user cannot change the value of security and
privilege if they are false in RISUP, it can only change them from true to false if they are true.

Figure 128. IP assignment to a context

Figure 129. Result in RISUP of an IP assignment to a context

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Figure 130. Inheritance of CID, state of security, and privilege from RISUP

Note that:
• Some IPs have default values
• If the user does not have the right to change values in the RIMU, these cells are greyed
out
• If the user creates an STM32MP25xx project and selects the Cortex-M33 as the
master, M33S (secured) the global lock button is activated by default
• When an IP is not used (CID = -) and the user checks the related CID SELECTION, a
default value is assigned to the CID of the IP equal to the value of the TD CID

Figure 131. Default values for IPs and user modification restrictions

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Masters configurations for STM32N6 series

The Domains (RIMU) panel for these series is composed of a table with five columns:
• RIMU IP: the name for each IP
• RIMU ID: unique for each IP
• MASTER CID: to set CID value for each IP
• SECURE: inherited from RISUP
• PRIVILEGE: privilege state if the IP is activated

Figure 132. Domains (RIMU) panel for STM32N6 series

4.7.8 Service peripherals protection

Service peripherals are special components that perform tasks or provide data for other
parts of the system, and they do not have input/output ports (IOs). These peripherals are
known as RIF-aware IPs, which means they are aware of the security and access
framework RIF.
The user can set up these peripherals by configuring their features and modes to ensure
that they are secure (protected) and ready to be used (enabled). The security settings are
based on the assigned features, these settings are shown in a special area of the software
called the RIF-aware IPs panel. Each type of RIF-aware IP has its own unique panel,
different from the standard setup mentioned earlier. The peripherals available on
STM32MP25 devices are detailed below.

HSEM
HSEM is not configurable in STM32CubeMX, but it is visible in RIF Panel to show and
generate a default protection. It defines the filter access (secure and privilege) to HSEM
features (16 HSEM semaphores).
As the IP is not used in the system, the protection is not configurable and forced to the
“Default configuration”.
HSEM contains two tables, the first represents the CPU allocation per context, the second
contains the features, their “CPU Whitelist” (CPU_WL), the security states and privileges.
All the features (semaphores in case of HSEM IP) are secured and privileged, as shown in
Figure 133.

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Figure 133. RIF HSEM panel

TAMP protection
TAMP for the STM32MP2 devices (Figure 134) contains two tabs:
• In the first, the user can configure the available resources, making them secure or
privileged.
• In the second, the user can configure the memory zone area storing critical
applications data.
– Each zone can be resized using a dedicated panel available in the RIF
configuration panel
– Each zone is associated to a resource: the resource assignment defines the
firmwares that can access a zone, and the access rights
For STM32N6 devices, the TAMP UI includes only a table that lists features along with their
security and privilege statuses (see Figure 135). Users can select a value between 0 and 32
to define the security level (in SECURE column) for the two features backup registers
protection offset (write, read/write) of the TAMP.

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Figure 134. RIF TAMP panel (STM32MP2 devices)

Figure 135. RIF TAMP panel (STM32N6 devices)

IPCC configuration
In the IPCC tab, the user can configure available resources, such as Resource features 0, 1
and 2, by setting their security levels or assigning privileged status.

PWR configuration
The PWR tab allows the user to manage settings for Resource 0, Resource 1, and
Resource 2, providing options to secure these resources, or grant them special privileges.

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4.7.9 System peripherals (STM32MP2 and STM32N6 series)

System peripherals are components that share their functions and resources with other
integrated peripherals (IPs). These system peripherals are designed to be RIF-aware, which
means they are compatible with a certain security and access control system.
While these system peripherals generally use the same security setup as other RIF-aware
IPs, they also have some unique features. The specific RIF configurations and what makes
them different are described in the following subsections.
The RIF-aware IPs for STM32N6 are fewer than for STM32MP2, namely: EXTI1, GPDMA1,
GPIO, HPDMA1, PWR, RCC, RTC, and TAMP. There is no need to display CID, as these
MCUs are based on a single core.

Figure 136. RIF-aware peripherals for STM32N6 MCUs

IO configuration
There are two main types of IO (input/output) configurations:
• Alternate function IO (AF IO): used to transmit signals that the peripherals process.
• General purpose IO (GPIO) and external Interrupt IO (EXTI IO): serve general
input/output functions and manage external interrupts.
For both types, security settings are automatically determined, based on their connections:
• For non-RIF-aware IPs, the security comes from the IP they are connected to
• For RIF-aware IPs, it is based on the specific features of the IP they are linked with
For GPIO and EXTI, the IO sets the security.
The assignments of IO to software contexts are displayed in the features panel specific to
the GPIO IP. Additionally, the security settings (RIF protection) for these IO configurations
can be found in the RIF-aware IP panel, under the GPIO sub-section

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Figure 137. IO protection inheritance for a non-RIF-aware IP (I2C)

Figure 138. GPIO IP panel

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Figure 139. Inheritance in RIF GPIO panel

Figure 140. PIN reservation

DMA configuration
For STM32MP2 MPUs, DMA channels can be secured to prevent unauthorized access.
Each channel is treated as a security feature within the DMA IP (integrated peripheral).
The approach to protecting DMA channels is similar to how IO protection is handled:
• The settings for which software contexts can use a DMA channel are determined by the
peripheral that needs the DMA service. These settings are then shown in the DMA
feature panel.
• The specific protection for each DMA channel is based on these settings and is
displayed in the RIF-aware IP panel, under the DMA section.
For STM32N6 MCUs, the security of DMA channels is user-defined and not automatically
inherited from the IPs, see Figure 141.

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Figure 141. HPDMA1 features with RIF implementation (STM32N6 MCUs)

An example (based on STM32MP2 MPUs) is given for the I2C peripheral.

Figure 142. I2C IP panel

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Figure 143. I2C mode panel

Figure 144. I2C features panel

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Figure 145. DMA RIF-aware IP inheritance

Clock configuration
Clock is a RIF-aware IP. Each clock is a RIF feature that can be protected thanks to the
software context assignments of the feature.
The feature protection is then reported in the RIF-aware IP RCC panel.
The RCC feature assignment follows a different scheme, dependent on its type.
Three clocks feature types exist:
• The root clocks:
– Their assignment is SOC family dependent.
– On STM32MP25 devices, these features are fixedly assigned to a unique context.
• The HW resource clocks (RAM or peripherals clocks)
– Their assignments are inherited from the HW resource assignments it clocks.
– These clocks may be associated to an additional configuration (the System Mode)
allowing to correctly protect the clock when it is shared between several CPU. This
is the case for STM32MP25 devices.
• The system resource clocks:
– These are the remaining clocks.
– Their configuration should be done manually from the feature panel of RCC IP.
Example of the clock protection of the HW resource BKPSRAM:
• For RCC the user can lock the features.
• Some features have a system mode, it is enabled if the feature has a CID equal to
“1&2” as we can see in case of BKPSRAM_CFGR feature above (Figure 146).

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Figure 146. RIF RCC panel (STM32MP2 MPUs)

For STM32N6 devices, features security are not automatically configured, but are defined
by the user.

Figure 147. RCC features with RIF implementation (STM32N6 MCUs)

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External interrupts protection

STM32CubeMX does not display a dedicated EXTI IP in the Pinout & Configuration section.
However, EXTI can be secured in two ways:
1. From peripherals: the security for the interrupts is automatically taken from the
peripheral that creates them. For example:
– EXTI to wake up from peripheral: when assigning an IP, STM32CubeMX identifies
and assigns the same security level and context ID to the pins connected to this
IP. The security level and context ID are determined by the software context
chosen, without any need to adjust settings in the Pinout View or GPIO
configuration. The RIF configuration panel uses the IP software context to set the
security level and context ID.
– EXTI for PWR_WKUP: for power wake-up lines associated with a peripheral, the
software context assignment is managed through the PWR configuration panel.
2. From system resources: these must be set up manually. To do this, adjust the settings
in the EXTI sub-panel found within the RIF-aware IPs panel.
Any other EXTI not mentioned has a preset security configuration, which can viewed in the
EXTI sub-panel of the RIF-aware IPs panel.
For STM32N6 MCUs, the security settings for EXTI are not automatically assigned but are
instead defined by the user, who can set the privilege level.

Figure 148. RIF panel for EXTI1 (STM32N6 MCUs)

4.7.10 Memories protection for STM32MP2 series

The memory protection is configured through two RIF controllers:
• RISAF (resource isolation slave unit for address space protection full) acts as a firewall,
allowing to define access rights for memory regions of DDR and external mapped flash
memories
• RISAB (resource isolation slave unit for address space protection block-based) acts as
a firewall, allowing to define access rights for memory regions of the internal SRAM.

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In the next we will cover only the RISAF, but the process is the same for RISAB. The first is
for managing internal memory and the second is for external memory.

RISAF configuration
RISAF is a mechanism allowing the user to configure memory access. Each memory is
divided into zones. Each zone can be configured to be read-only or read/write.
The user can also specify if privileges are required, if the memory zone should be secured
or encrypted.
The configuration happens at a compartment level.
Through RISAF registers, a trusted application (or the application to which the configuration
has been delegated) assigns memory regions and subregions to one or more security
domains (secure, privilege, compartment). RISAF includes the DDR memory.
Through RISAF the user can:
• See the list of the different memories
• Access the memory configuration
• Configure the parameters of the memory regions (Start address, region size, Master
CID, Read-Write-Privilege)
• Protect memory regions of DDR and external memories by clicking on the dedicated
memory.
RISAF includes four memories, namely RISAF1 (BKPSRAM), RISAF2 (OCTOSPI 1&2),
RISAF4 (DDR), and RISAF5 (PCIE).

Figure 149. RISAF configuration

Each memory table contains several columns, such as region ID, region name, start
address, region size in hexadecimal, seven groups for Master CID 0 to 6, secure and
encrypt.
For each subregion, the user can change the region name and the region size. Each
memory has its default configuration.

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Figure 150. Configuration of a new subregion

RISAF1: backup static random access memory (BKPSRAM)

BKPSRAM is divided into four regions with id 1 to 4 by default. The memory is divided into
two equal subregions. The user cannot add or remove regions.
To remove a region, the user must increase the size of another. To add a region, the user
must decrease the size of another region.
Two columns are not editable: RISAF region id and start address. The user can change the
name of subregion. If the name is empty or the region size is equal to 0, this subregion is not
generated.
The start address and the ID column are not editable.

Figure 151. Non editable columns

The region size should not exceed the total region memory, or a warning is displayed.

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Figure 152. Warning

The user can assign a subregion to a master CID 0 to 6. CID 7 (not configurable in the UI) is
reserved for debugging.

RISAF2: OCTOSPI1&2 memory configuration

The OCTOSPI1&2 Master CID group column is inherited from RISUP peripherals
OCTOSPI1 and OCTOSPI2. By default, in OCTOSPI1&2 memory there are two subregions,
mm_ospi1 and mm_ospi2.

Figure 153. OCTOSPI1&2 configuration

OCTOSPI1&2 use the Memory mapped mode: the two controllers are sharing the same
256 MB memory region.
By default, OCTOSPI2 takes the whole region. By clicking on the region size cell of
mm_ospi1, a list appears, allowing the user to select the region size. Possible
configurations are 0/256, 64/192, 128/128, 192/64, and 256/0 MB (see Figure 154). The
start address changes automatically.

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Figure 154. OCTOSPI1&2 memory mapping

Figure 155. OCTOSPI1&2 region size configuration

The master CID column group read/write/privilege are inherited from the RISUP table.
If the OCTOSPI1 peripheral in RISUP is assigned to CID1, Master CID group column 1 is
accessible, and the other CIDs are grayed out. If it is privileged in RISUP, it is privileged in
Master CID1 privilege column, as shown in Figure 156.

Figure 156. OCTOSPI1&2 inheritances from RISUP

If OCTOSPI1 is secure in RISUP, it is secure and grayed out in RISAF2. The checkboxes
inherit their values from RISUP. Changes to the secure or to the privilege state must be
performed in the RISUP table.
If OCTOSPI1 is CID1&2 in RISUP, the two Master CID 1 and CID 2 are activated in RISAF2.

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Figure 157. OCTOSPI1&2 Master CID activation example

OCTOSPI2 is not assigned to any CID in RISUP, so the Master CID 0 is activated by default.

RISAF4: DDR memory configuration

By default, the DDR is configured to handle 4 Gbytes of RAM divided into 15 subregions.

Figure 158. DDR memory configuration

To change the memory size, go to the Pinout & Configuration tab, select the
DDR_CTRL_PHY, and choose the desired memory size.

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Figure 159. DDR_CTRL_PHY activation

When returning to RISAF4 (DDR) panel, a new configuration of the DDR memory appears
in table:
• The region sizes can be one of the following values: 521 Mbytes, 1 Gbyte, or 2 Gbytes,
depending on the user's choices.
• The number of regions decreases from 15 to 14.
• If the user decreases the size of a region, the decreased value is added to the size of
the linuxkernel1.
• There is no empty region in the new implementation.
• For the DDR 4 GBytes, if the user decreases the size of a region, the decreased value
is added to the size of the linuxkernel2.

Figure 160. Configuration of RISAF4 (DDR)

As BKPSRAM memory, the user can assign a subregion to a master CID 0 to 6, set the
region as read / write, privilege, secure and encrypt.

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RISAF 5: PCIE memory configuration

The PCIE memory is similar to BKPSRAM, except by default it has one subregion that takes
the whole memory region size, and the user can add maximum three other regions, set the
name, the read/write access rights, the privilege, secure and encrypt.

Figure 161. PCIE memory configuration

Default memory protection

When starting a new project using the RISAB / RISAF configuration panels, there is a
default memory protection scheme already in place. This default setup includes predefined
region names, start addresses, and sizes that correspond to a memory map designed for
the ST software architecture user is targeting.
The configuration can be modified, even if some areas are reserved. The user can modify
this default memory map to suit the needs of a new application. For instance, when working
with the STM32MP25 hardware, the OpenSTLinux software configuration for the 4-GByte
DDR memory is always pre-loaded as the default setting. However, there are certain
regions, specifically those related to the Cortex-M33NS, where the names of the memory
regions are fixed and cannot be altered.

Memory mapping generation (MPUs only)

This section discusses the generation of memory mappings for an MPU designed for use
with the OpenSTLinux architecture, and supporting the RIF. Note that this MPU does not
support the Memory Management Tool.
STM32CubeMX utilizes the RISAF/RISAB configuration as a basis for generating the
memory mapping. This mapping is specifically for the master secured firmware associated
with the MPU.
The memory mapping created by STM32CubeMX includes only the base-memory regions.
These are the regions predefined in the RISAF/RISAB configuration panels.
If an application requires additional memory sub-regions beyond the base-memory regions,
these must be defined manually. The definitions go into the User Sections within the
initialization code of the firmware that necessitates these extra sub-regions.
For the STM32MP25 hardware, when it is set to A35TD boot mode, a specific memory
mapping is produced for the OP-TEE firmware.
This mapping is saved in a file named <project name>-mx-resmem.dtsi, where
<project name> is a placeholder for the actual name of the project.

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4.7.11 Memories protection for STM32N6 series

The memory protection is configured through one RIF controller:
• RISAF (resource isolation slave unit for address space protection full) acts as a firewall,
allowing to define access rights for memory regions of DDR and external mapped flash
memories

RISAF configuration
RISAF is a mechanism allowing the user to configure memory access. Each memory is
divided into zones. Each zone can be configured to be read-only or read/write.
The user can also specify if privileges are required, if the memory zone should be secured
or encrypted.
The configuration happens at a compartment level.
Through RISAF registers, a trusted application (or the application to which the configuration
has been delegated) assigns memory regions and subregions to one or more security
domains (secure, privilege, compartment). RISAF includes the DDR memory.
Through RISAF the user can:
• See the list of the different memories
• Access the memory configuration
• Configure the parameters of the memory regions (Start address, region size, Master
CID, Read-Write-Privilege)
• Protect memory regions of DDR and external memories by clicking on the dedicated
memory.

Configure memory access with RISAF for STM32N6 MCUs

The STM32N6 RISAF panel has a global lock, unlike the STM32MP2.

Figure 162. Global lock in RISAF panel for STM32N6 MCUs

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The RISAF is divided into subcontrollers for 17 memory zones, which are assigned to
security domains through the RISAF subcontrollers listed below:
• RISAF1 (TCM)
• RISAF2 (CPU AXI RAM0)
• RISAF3 (CPU AXI RAM1)
• RISAF4 (NPU master 0)
• RISAF5 (NPU master 1)
• RISAF6 (CPU master)
• RISAF7 (FLEXRAM)
• RISAF8 (CACHE AXI RAM)
• RISAF9 (VENCRAM)
• RISAF11 (XSPI1)
• RISAF12 (XSPI2)
• RISAF13 (XSPI3)
• RISAF14 (FMC)
• RISAF15 (CACHEAXI configuration port)
• RISAF21 (AHB RAM1)
• RISAF22 (AHB RAM2)
• RISAF23 (Backup RAM)
Each RISAF subcontroller manages a specific number of memory regions. By default, it
controls seven regions, but some subcontrollers manage 11 regions, while others handle
only two regions.
In the user interface Each RISAF sub controller is represented by 2 tables: Memory regions
configuration and Memory sub-regions configuration.
Memory regions configuration table contains the following columns:
• Region ID: this column is non editable.
• Region name
• Start Address Offset and Region size: This value must be within a specific range for
each region. If the user sets an incorrect value, a popup appears indicating that the
value is out of range.
• Filtering
• Secure
• Read, Write, and Privilege: Values range from 0 to 255.

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Figure 163. RISAF configuration for STM32N6 series

RISAF also covers the configuration of the memory sub-regions in the Memory sub-regions
configuration table. Each regions have two dedicated sub-regions (see Figure 164).
Subregions are not accessible by default (grayed). To activate a given subregion, activate
the related filtering parameter in the Memory regions configuration table (see Figure 165).
Memory sub-regions configuration table contains the following columns:
• RISAF region ID
• SubRegion name
• Start Address Offset and Region size: This value must be within a specific range for
each region. If the user sets an incorrect value, a popup appears indicating that the
value is out of range.
• SubRegion CID: Values range from 1 to 7.
• Filtering
• Delegated CID
• Delegation enabled
• Read
• Write
• Secure
• Privilege
• Lock

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Figure 164. Sub-regions activation in RISAF (showing activated subregions)

Figure 165. Sub-regions activation in RISAF (check the filtering parameter)

4.7.12 RIF code generation

The RIF configuration code generation is handled by the STM32CubeMX, which
incorporates it into the initialization code of the project. The format of the generated code
depends upon the type of driver used to manage the RIF. The options include HAL
(Hardware Abstraction Layer) code for the Cube driver and dts-v1 (Device Tree Source
version 1) code for the OpenSTLinux driver.
Note: Only dts-v1 code generation is supported.
In the context of the STM32MPU OpenSTLinux (OSTL), RIF configuration code is
generated using the dts-v1 format.
The code generation adheres to the generic principles are outlined in Section 9.

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The generated code is placed in a file named <project name>-mx-rif.dtsi, which is part of the
master Secured firmware. Additionally, code relevant to the First Stage Bootloader (FSBL)
firmware is generated in a file named <project name>-mx-fw-config.dts.
The specific syntax and semantic rules for the generated code are detailed in the RIF
binding file. For more information, refer to the STM32MPU Wiki portal.
The next section details examples, including user interface screenshots and the
corresponding generated code snippets. The procedure is straightforward: configure the
RIF panels, click the GENERATE CODE button, and the code is produced in two files, with
the RIF configuration landing in a file named <project name>-mx-rif.dtsi.

Figure 166. Example: RISUP configuration and generated code

Figure 167. Example: RISAF configuration and generated code

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Additionally, as described in Memory mapping generation (MPUs only), a partial memory

mapping is generated.

4.7.13 Implementation of illegal access controller (IAC) feature on

STM32N6 series
The STM32N6 MCUs support a new feature, the illegal access controller (IAC).
The IAC manages all the interrupts, and the RIF utilizes the IAC feature to centralize the
detection of any illegal access related to the RIF, which is managed by a secure application.
The Interrupts (IAC) panel is composed of two columns:
• IP: The name of the IP.
• IP IAC Activation: Enables the user to activate or deactivate the interrupt related to a
given IP.

Figure 168. IAC feature

4.8 Pinout & Configuration view for STM32H7 dual-core

products
Some STM32H7 products come with an Arm Cortex-M7 core, an Arm Cortex-M4 core, and
three power domains.
For such products, the Pinout & Configuration view allows the user to:
• For each peripheral and middleware: assign it to one core context or both, whenever
possible. in case both contexts are selected, assign an “initializer” core to indicate on
which core the peripheral or middleware initialization function shall be called.
• For each peripheral: view the power domain it belongs to.
• For GPIOs: assign it to a core or leave it free for other components that may require it.
In this last case the GPIO initialization are performed on the same core as the
component reserving it (code is generated accordingly).

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For peripherals and middleware, these possibilities are offered in two different panels:
1. From the component tree panel, which lists all supported peripherals and middleware
(clicking the gear icon enables the “Show contexts” option), see Figure 169
2. From each component mode panel, opened by clicking the component name.

Figure 169. STM32H7 dual-core: peripheral and middleware context assignment

For GPIOs (see Figure 170), assignment is done through the Pinout view directly or later
and automatically through its selection in the platform settings panel of a middleware.

Figure 170. STM32H7 dual-core: GPIOs context assignment

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4.9 Enabling security in Pinout & Configuration view

(STM32L5 and STM32U5 series only)
The STM32L5 MCU series harnesses the security features of the Arm Cortex-M33
processor and its TrustZone® for Armv8-M combined with ST security implementation.
STM32L5 MCUs support
• two levels of privilege
– unprivileged: software has limited access to system resources
– privileged: software has full access to system resources, subject to security
restrictions
• two security states, Secure and Nonsecure: TrustZone® security is activated when the
TZEN option bit is set in the FLASH_OPTR register. Security states are orthogonal to
mode and privilege, therefore, each security state supports execution in both modes
and both levels of privilege.
In STM32CubeMX the choice to activate TrustZone® is made at project creation (see
Section 4.2). When TrustZone® is enabled, STM32CubeMX Pinout & Configuration view is
adjusted accordingly, with a split between secure (M33S) and nonsecure context (M33NS),
and more security-related configuration options (see Figure 171).

Figure 171. Pinout & Configuration view for TrustZone®-enabled projects

4.9.1 Privilege access for peripherals, GPIO EXTIs and DMA requests
Independently of TrustZone®, STM32CubeMX enables privilege access:
• for each peripheral: in the GTZC configuration panel (see Section 4.9.5), as shown in
Figure 172
• for each GPIO EXTI: in the GPIO configuration panel, as shown in Figure 173
• for each DMA channel: in the DMA configuration panel (see Section 4.9.4), as shown in
Figure 174.

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Note: When TrustZone® is active, either all or none of the RCC registers can be put in privilege
mode. In STM32CubeMX, this is done by selecting “Privileged-only attribute” check box
from RCC mode panel (see Figure 175). In privilege mode, all RCC registers configuration
are reserved for the privilege application through the PWR_CR_PRIVEN bit, which is
secured when Trustzone® is activated.

Figure 172. Setting privileges for peripherals

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Figure 173. Setting privileges for GPIO EXTIs

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Figure 174. Configuring security and privilege of DMA requests

Figure 175. RCC privilege mode

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4.9.2 Secure/nonsecure context assignment for

GPIO/peripherals/middleware
STM32CubeMX allows the user
• to assign each peripheral and middleware to one of the contexts
• to assign a GPIO input or output to one of the context or to leave it free for other
components that may require it. In this last case the GPIO assignment is in the same
context as the component reserving it. By default all IOs are secured.
The assignment is done in different panels:
• For peripherals and middleware only: from the component tree panel when “Show
contexts” option is enabled (clicking the gear icon) or from the mode panel.
• For peripherals only: from the GTZC configuration panel (peripherals only).
• For GPIOs only: from the configuration panel or from the Pinout view, through a
right-click on the GPIO pin and by selecting “Pin Reservation”.
• For DMA requests: from the DMA configuration panel.
Note: RCC resources can be secured through the Clock configuration view (see Section 4.10.2).
Note: For middleware requiring a peripheral the middleware can only be assigned to the context
the peripheral is already assigned to.

4.9.3 NVIC and context assignment for peripherals interrupts

When TrustZone® is enabled, the interrupt controller is split into NVIC_NS for the
nonsecure context and NVIC_S for the secure context. Two SysTick instances are available
as well, one for each context: they are visible, respectively, under SYS_NS and SYS_S.
By default, all interrupts are secured.
Peripherals interrupts are automatically assigned to the interrupt controller relevant to the
context:
• For peripherals assigned to the nonsecure context, interrupts are enabled on
NVIC_NS.
• For peripherals assigned to the secure context, interrupts are enabled on NVIC_S.

4.9.4 DMA (context assignment and privilege access settings)

STM32CubeMX allows the user to set as privileged the DMA channel and in some cases, to
secure the DMA channel, source and destination see Figure 176.

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Figure 176. Configuring security and privilege of DMA requests

The DMA channel is set to non-privileged by default. The choice to set it as privileged is
always available.
The choice to secure the DMA channel, source, and destination depends on the request
characteristics.
There are four cases:
• The request is either a memory to memory transfer request or a DMA generator
request: the channel is not secure by default but can be secured. The source and
destination can be secured only when the channel is secure.
• The request is for a peripheral assigned to the nonsecure context: channel, source and
destination cannot be secured (checkboxes are disabled) and so they are forced to the
nonsecure context.
• The request is a peripheral to memory request for a peripheral assigned to the secure
context: channel and source are automatically secured (checkboxes enabled, cannot
be disabled), while there is a choice to secure or not the destination.
• The request is a memory to peripheral request for a peripheral assigned to the secure
context: channel and destination are automatically secured (checkboxes enabled,
cannot be disabled), while there is a choice to secure or not the source.

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4.9.5 GTZC
To configure TrustZone® system security, STM32L5 series come with a Global TrustZone®
security controller (GTZC). Refer to RM0438 “STM32L552xx and STM32L562xx advanced
Arm®-based 32-bit MCUs” for more details.
In STM32CubeMX, for projects with TrustZone® activated, GTZC is enabled by default and
cannot be disabled. For projects without Trustzone® active, GTZC can be enabled and
gives only the possibility to set privileges.
GTZC is made up of three blocks that can be configured through STM32CubeMX using
dedicated tabs in GTZC configuration panel:
• TZSC (TrustZone® security controller)
– Defines which peripherals are secured and/or privileged, and controls the
nonsecure area size for the watermark memory peripheral controller (MPCWM).
The TZSC block informs some peripherals (such as RCC or GPIOs) about the
secure status of each securable peripheral, by sharing with RCC and I/O logic.
– The privileges are set in the TrustZone® Security Controller – Privilegeable
Peripherals tab.
– The secure states are set in TrustZone® Security Controller – Securable
Peripherals tab (they match the assignment to context (M33S or M33NS) done on
the Tree view or in the Mode panel).
– The MPCWM configuration is done through the TrustZone® Security Controller –
Memory Protection Controller Watermark tab.
• MPCBB (block-based memory protection controller)
– Controls secure states of all blocks (256-byte pages) of the associated SRAM. It is
configured through the Block-based Memory Protection Controller tab.
• TZIC (TrustZone® illegal access controller)
– Gathers all illegal access events in the system and generates a secure interrupt
towards NVIC. It is configured through the TrustZone® Illegal Access Controller
tab.

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Figure 177. Securing peripherals from GTZC panel

4.9.6 OTFDEC
On-the-fly decryption engine (OTFDEC) allows the user to decrypt on-the-fly AHB traffic
based on the read request address information. When security is enabled in the product
OTFDEC can be programmed only by a secure host.

Figure 178. OTFDEC secured when TrustZone® is active

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4.10 Clock Configuration view

STM32CubeMX Clock Configuration window (see Figure 179) provides a schematic
overview of the clock paths, clock sources, dividers, and multipliers. Drop-down menus and
buttons can be used to modify the actual clock tree configuration, to meet the application
requirements.

Figure 179. STM32F469NIHx clock tree configuration view

Actual clock speeds are displayed and active. The used clock signals are highlighted in
blue.

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Out-of-range configured values are highlighted (as shown in Figure 180) to flag potential
issues. A solver feature is proposed to automatically resolve such configuration issues.

Figure 180. Clock tree configuration view with errors

Reverse path is supported: just enter the required clock speed in the blue filed and
STM32CubeMX attempts to reconfigure multipliers and dividers to provide the requested
value. The resulting clock value can then be locked by right clicking the field to prevent
modifications.
STM32CubeMX generates the corresponding initialization code:
• main.c with relevant HAL_RCC structure initializations and function calls
• stm32xxxx_hal_conf.h for oscillator frequencies and VDD values.

4.10.1 Clock tree configuration functions

External clock sources
When external clock sources are used, the user must previously enable them from the
Pinout view available under the RCC peripheral.

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Peripheral clock configuration options

Other paths, corresponding to clock peripherals, are grayed out. To become active, the
peripheral must be properly configured in the Pinout view. This view allows the user to:
• Enter a frequency value for the CPU clock (HCLK), buses or peripheral clocks
STM32CubeMX tries to propose a clock tree configuration that reaches the desired
frequency while adjusting prescalers and dividers and taking into account other
peripheral constraints (such as USB clock minimum value). If no solution can be found,
STM32CubeMX proposes to switch to a different clock source or can even conclude
that no solution matches the desired frequency.
• Lock the frequency fields for which the current value should be preserved
Right click a frequency field and select Lock to preserve the value currently assigned
when STM32CubeMX searches for a new clock configuration solution.
The user can unlock the locked frequency fields when the preservation is no longer
necessary.
• Select the clock source that will drive the system clock (SYSCLK)
– External oscillator clock (HSE) for a user defined frequency.
– Internal oscillator clock (HSI) for the defined fixed frequency.
– Main PLL clock
• Select secondary sources (as available for the product)
– Low-speed internal (LSI) or external (LSE) clock
– I2S input clock
– Other sources
• Select prescalers, dividers and multipliers values
• Enable the Clock Security system (CSS) on HSE when it is supported by the MCU
This feature is available only when the HSE clock is used as the system clock source
directly or indirectly through the PLL. It allows detecting HSE failure and inform the
software about it, thus allowing the MCU to perform rescue operations.
• Enable the CSS on LSE when it is supported by the MCU
This feature is available only when the LSE and LSI are enabled and after the RTC or
LCD clock sources have been selected to be either LSE or LSI.
• Reset the Clock tree default settings by using the toolbar Reset button
This feature reloads STM32CubeMX default clock tree configuration.
• Undo/Redo user configuration steps by using the toolbar Undo/Redo buttons
• Detect and resolve configuration issues
Erroneous clock tree configurations are detected prior to code generation. Errors are
highlighted in fuchsia and the Clock Configuration view is marked with a fuchsia
cross (see Figure 180).
Issues can be resolved manually or automatically by clicking the Resolve Clock Issue
button that is enabled only if issues have been detected.
The underlying resolution process follows a specific sequence:
a) Setting HSE frequency to its maximum value (optional).
b) Setting HCLK frequency then peripheral frequencies to a maximum or minimum
value (optional).
c) Changing multiplexers inputs (optional).

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d) Finally, iterating through multiplier/dividers values to fix the issue. The clock tree is
cleared from fuchsia highlights if a solution is found, otherwise an error message
is displayed.
Note: To be available from the clock tree, external clocks, I2S input clock, and master clocks must
be enabled in RCC configuration in the Pinout view. This information is also available as
tooltips.
The tool automatically performs the following operations:
• Adjust bus frequencies, timers, peripherals and master output clocks according to user
selection of clock sources, clock frequencies and prescalers/multipliers/dividers values.
• Check the validity of user settings.
• Highlight invalid settings in fuchsia and provide tooltips to guide the user to achieve a
valid configuration.
The Clock Configuration view is adjusted according to the RCC settings (configured in
RCC Pinout & Configuration views) and vice versa:
• If in RCC Pinout view, the external and output clocks are enabled, they become
configurable in the Clock Configuration view.
• If in RCC Configuration view, the Timer prescaler is enabled, the choice of Timer clocks
multipliers is adjusted.
Conversely, the clock tree configuration may affect some RCC parameters in the
configuration view:
• Flash latency: number of wait states automatically derived from VDD voltage, HCLK
frequency, and power over-drive state.
• Power regulator voltage scale: automatically derived from HCLK frequency.
• Power over-drive is enabled automatically according to HCLK frequency. When the
power drive is enabled, the maximum possible frequency values for AHB and APB
domains are increased. They are displayed in the Clock Configuration view.
The default optimal system settings that is used at startup are defined in the
system_stm32f4xx.c file. This file is copied by STM32CubeMX from the STM32CubeF4
MCU package. The switch to user defined clock settings is done afterwards in the main
function.

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Figure 179 gives an example of Clock tree configuration for an STM32F429x MCU, and
Table 9 describes the widgets that can be used to configure each clock.

Table 9. Clock configuration view widgets

Format Configuration status of the Peripheral Instance

Active clock sources

Unavailable settings are blurred or grayed out (clock sources, dividers,…)

Gray drop down lists for prescalers, dividers, multipliers selection.

Multiplier selection

User defined frequency values

Automatically derived frequency values

User-modifiable frequency field

Right click blue border rectangles to lock/unlock a frequency field. Lock to

preserve the frequency value during clock tree configuration updates.

4.10.2 Securing clock resources (STM32L5 series only)

When the TrustZone® security is activated, the RCC is able, through the security
configuration register, to prevent nonsecure access to system clock resources.
Accordingly, STM32CubeMX allows the user to configure as secure:
• system clock sources with a fixed frequency: HSI, LSI, and RC48
• system clock sources with a configurable frequency: HSE (+CSS), MSI and
LSE (+CSS)
• two multiplexers: CLK48 clock multiplexer, System Clock (+MCO source) multiplexer
• other system configurations: PLLSYS, PLLSAI1, PLLSAI2 phase-locked loops and
AHB/APB1/APB2 bus pre-scalers

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In the Clock Configuration view, these securable resources are highlighted with a key icon.
Security is enabled using the Secure checkbox accessed through a right-click on the
resource. Once the resource is secure, it is highlighted with a green square.
Configurable resources can be locked to prevent further configuration changes: this is done
by selecting the Lock checkbox accessed through a right-click on the resource.
There is also a shortcut button to lock/unlock in one click all resources that are both
securable and configurable.
When a peripheral is configured as secure, its related clock, reset, clock source and clock
enable are also secure. In STM32CubeMX the peripheral is configured as secure in the
Pinout & Configuration view and its clock source is automatically highlighted as secure
using a green square in the Clock configuration view.

Table 10. Clock Configuration security settings

View Description

Example of non-configurable system clock resource that is secured.

Example of the system clock HSE clock source that is secured and
remains open for editing: the frequency value can be changed.

Example of the system clock HSE clock source that is secured and has
been locked for editing: the frequency value cannot be modified.

Example of the system clock multiplexer that is secured and unlocked:

the clock source can be changed.

Example of the main PLL multiplexer that is secured and locked. The
clock source is HSE and cannot be changed. PLLxxM, PLLxxN, PLLxxP,
PLLxxQ and PLLxxR are secured and locked for editing as well.

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Table 10. Clock Configuration security settings (continued)

View Description

Example of the UART4 clock source multiplexer: the clock source is

secured because the UART4 peripheral is configured as secure in the
Pinout & Configuration view. It is set to PCLK1 and can be changed as
the Lock checkbox is unchecked.

Example of the UART4 clock source multiplexer: the clock source is

secured because the UART4 peripheral is configured as secure in the
Pinout & Configuration view. It is set to PCLK1 and can no longer be
changed as Lock is on.

Example of securing and locking the access to AHB prescaler. APB1 and
APB2 prescalers are locked as well.

Example of LSI highlighted as a securable resource using the key icon.

Lock/Unlock All button (active only for secure and configurable

resources).

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4.10.3 Recommendations
The Clock Configuration view is not the only entry for clock configuration, RCC and RTC
peripherals can also be configured.
1. From the Pinout & Configuration view, go to the RCC mode panel to enable the
clocks as needed: external clocks, master output clocks and Audio I2S input clock
when available. Then go to the RCC configuration panel, and adjust the default settings
if needed. Changes are reflected in the Clock Configuration view. The defined
settings may change the settings in the RCC configuration as well (see Figure 181).

Figure 181. Clock tree configuration: enabling RTC, RCC clock source
and outputs from Pinout view

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2. Go to the RCC configuration in the Pinout & Configuration view. The settings
defined there for advanced configurations are reflected in the Clock configuration
view. The defined settings may change the settings in the RCC configuration.

Figure 182. Clock tree configuration: RCC peripheral advanced parameters

4.10.4 STM32F43x/42x power overdrive feature

STM32F42x/43x MCUs implement a power overdrive feature that allows them to work at the
maximum AHB/APB bus frequencies (for example, 180 MHz for HCLK) when a sufficient
VDD supply voltage is applied (for example, VDD > 2.1 V).
Table 11 lists the different parameters linked to the power overdrive feature and their
availability in STM32CubeMX user interface.

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Table 11. Voltage scaling versus power overdrive and HCLK frequency
Parameter STM32CubeMX panel Value

User-defined within a predefined range.

VDD voltage
Impacts power over-drive.
Power regulator Automatically derived from HCLK frequency
voltage scaling and power over-drive (see Table 12).
This value is conditioned by HCLK and VDD
Configuration (RCC)
values (see Table 12). It can be enabled only
if VDD ≥ 2.2 V.
Power over-drive When VDD ≥ 2.2 V it is automatically derived
from HCLK, or can be configured by the user
if multiple choices are possible (as an
example, HCLK = 130 MHz)
Displayed in blue to indicate the maximum
possible value. For example: maximum value
HCLK/AHB clock
is 168 MHz for HCLK when power overdrive
maximum frequency value
Clock Configuration cannot be activated (when VDD ≤ 2.1 V),
otherwise it is 180 MHz.
APB1/APB2 clock Displayed in blue to indicate the maximum
maximum frequency value possible value.

Table 12 gives the relations between power-over drive mode and HCLK frequency.

Table 12. Relations between power over-drive and HCLK frequency

HCLK frequency range: Corresponding voltage scaling
VDD > 2.1 V required to enable power over-drive (POD) and power over-drive (POD)

– Scale 3
≤120 MHz
– POD is disabled
– Scale 2
120 to 144 MHz
– POD can be enabled or disabled
– Scale 1 when POD is disabled
144 to 168 MHz
– Scale 2 when POD is enabled
– POD must be enabled
168 to 180 MHz – Scale 1 (otherwise frequency range
not supported)

4.10.5 Clock tree glossary

Table 13. Glossary

Acronym Definition

HSI High speed Internal oscillator: enabled after reset, lower accuracy than HSE
HSE High speed external oscillator: requires an external clock circuit
PLL Phase locked loop: used to multiply above clock sources
LSI Low speed Internal clock: low power clocks usually used for watchdog timers

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Table 13. Glossary (continued)

Acronym Definition

LSE Low speed external clock: powered by an external clock

SYSCLK System clock
HCLK Internal AHB clock frequency
FCLK Cortex free running clock
AHB Advanced high performance bus
APB1 Low speed advanced peripheral bus
APB2 High speed advanced peripheral bus

4.11 Project Manager view

This view (see Figure 183) comes with three tabs:
• General project setting: to specify the project name, location, toolchain, and firmware
version.
• Code generation: to set code generation options such as the location of peripheral
initialization code, library copy/link options, and to select templates for customized
code.
• Advanced settings: dedicated to ordering STM32CubeMX initialization function calls.

Figure 183. Project Settings window

The code is generated in the project folder tree shown in Figure 184.

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Figure 184. Project folder

Note: Some project setting options become read-only once the project is saved. To modify these
options, the project must be saved as new, using the File > Save Project as menu.
Caution: STM32CubeMX uses reserved folder names. User cannot create new folder named
Middlewares or Utilities inside project folder generated by STM32CubeMX, because, after
code regeneration, those folders are deleted or modified.

4.11.1 Project tab

The Project tab of the Project Settings window allows configuring the following options
(see Figure 183):
• Project settings:
– Project name: name used to create the project folder and the .ioc file name at a
given project location
– Project location: directory where the project folder is stored.
– Application structure: select between Basic and Advanced options.
Basic structure: recommended for projects using one or no middleware. This
structure consists in placing the IDE configuration folder at the same level as the
sources, organized in sources and includes subfolders (see Figure 185)
Advanced structure: recommended when several middleware components are
used in the project, makes the integration of middleware applications easier (see
Figure 186)
– Toolchain folder location: by default, it is located in the project folder at the same
level as the .ioc file.
– Toolchain/IDE: selected toolchain
– For the STM32MPUs, OpenSTLinux settings: location of generated device tree
and manifest version and contents for current project (see Figure 187). These
information enable the synchronization of the right SW components versions with
STM32CubeMP1 for Cortex® M and Linux, tf-a, u-boot for Cortex® A. It is
important to take them into account especially to ensure one Cube firmware

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version is aligned with SW components for Cortex® A around

OpenAMP / RPM link and resource management API.
Selecting Makefile under Toolchain/IDE leads to the generation of a generic gcc-based
makefile.
• Additional project settings for STM32CubeIDE toolchain:
Select the optional Generate under root checkbox to generate the toolchain project
files in STM32CubeMX user project root folder or deselect it to generate them under a
dedicated toolchain folder.
STM32CubeMX project generation under the root folder allows the user to benefit from
the following Eclipse features:
– Optional copy of the project into the Eclipse workspace when importing a project.
– Use of source control systems such as GIT or SVN from the Eclipse workspace.
Choosing to copy the project into workspace prevents any further synchronization
between changes done in Eclipse and changes done in STM32CubeMX, as there will
be two different copies of the project.
• Linker settings: value of minimum heap and stack sizes to allocate for the application.
The default values are 0x200 and 0x400 for heap and stack sizes, respectively. These
values may need to be increased when the application uses middleware stacks.
• Firmware package selection when more than one version is available (this is the case
when successive versions implement the same API and support the same MCUs). By
default, the latest available version is used.
• Firmware location selection option
The default location is the location specified under the Help > Updater Settings menu.
Deselecting the Use Default Firmware Location checkbox allows the user to specify
a different path for the firmware that will be used for the project (see Figure 188).

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Figure 185. Selecting a basic application structure

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Figure 186. Selecting an advanced application structure

Figure 187. OpenSTLinux settings (STM32MPUs only)

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Figure 188. Selecting a different firmware location

The new location must contain at least a Drivers directory containing the HAL and
CMSIS drivers from the relevant STM32Cube MCU package. An error message pops
up if the folders cannot be found (see Figure 189).

Figure 189. Firmware location selection error message

To reuse the same Drivers folder across all projects that use the same firmware
location, select the Add the library files as reference from the Code generator tab
allows (see Figure 190).

Figure 190. Recommended new firmware repository structure

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Caution: STM32CubeMX manages firmware updates only for this default location. Choosing another
location prevents the user from benefiting from automatic updates. The user must manually
copy new driver versions to its project folder.

4.11.2 Code Generator tab

The Code Generator tab allows specifying the following code generation options (see
Figure 191):
• STM32Cube Firmware Library Package option
• Generated files options
• HAL settings options
• Custom code template options

STM32Cube Firmware Library Package option

The following actions are possible:
• Copy all used libraries into the project folder
STM32CubeMX copies to the user project folder the drivers libraries (HAL, CMSIS)
and the middleware libraries relevant to the user configuration (e.g. FatFs, USB).
• Copy only the necessary library files:
STM32CubeMX copies to the user project folder only the library files relevant to the
user configuration (e.g., SDIO HAL driver from the HAL library).
• Add the required library as referenced in the toolchain project configuration file
By default, the required library files are copied to the user project. Select this option for
the configuration file to point to files in STM32CubeMX repository instead: the user
project folder will not hold a copy of the library files but only a reference to the files in
STM32CubeMX repository.

Generated files options

This area allows the user to define the following options:
• Generate peripheral initialization as a pair of .c/.h files or keep all peripheral
initializations in the main.c file.
• Backup previously generated files in a backup directory
The .bak extension is added to previously generated .c/.h files.
Keep user code when regenerating the C code.
This option applies only to user sections within STM32CubeMX generated files. It does
not apply to the user files that might have been added manually or generated via ftl
templates.
• Delete previously generated files when these files are no longer needed by the current
configuration. For example, uart.c/.h file are deleted if the UART peripheral, that was
enabled in previous code generation, is now disabled in current configuration.

HAL settings options

This area allows selection one HAL settings options among the following:
• Set all free pins as analog to optimize power consumption
• Enable/disable Use the Full Assert function: the Define statement in the
stm32xx_hal_conf.h configuration file is commented or uncommented, respectively.

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Custom code template options

To generate custom code, click the Settings button under Template Settings, to open the
Template Settings window (see Figure 192).
The user is then prompted to choose a source directory to select the code templates from,
and a destination directory where the corresponding code will be generated.
The default source directory points to the extra_template directory, within the installation
folder, to use for storing all user defined templates. The default destination folder is located
in the user project folder. STM32CubeMX then uses the selected templates to generate
user custom code (see Section 6.3).
Figure 193 shows the result of the template configuration shown on Figure 192: a sample.h
file is generated according to sample_h.ftl template definition.

Figure 191. Project Settings code generator

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Figure 192. Template Settings window

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Figure 193. Generated project template

4.11.3 Advanced Settings tab

This tab comes with three panels (see Figure 194):
• The Driver selector panel, to select the driver (HAL or LL) to be used when generating
the initialization code of a peripheral instance.
• The Generated Function Calls panel, to choose whether the function calls must be
generated or not, generated as static or not and in which order.
• The Register callback panel, to select the peripherals for which the register callback
define must be generated as part of the stm32xxxx_hal_conf.h file.
As an example, when ADC is enabled in the register callback panel, STM32CubeMX
generates
#define USE_HAL_ADC_REGISTER_CALLBACKS 1U

Choosing not to generate code for some peripherals or middlewares

By default, STM32CubeMX generates initialization code. This automatic generation can be
disabled per peripheral or middleware in the Generate code column.

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Ordering initialization function calls

By default, the generated code calls the peripheral/middleware initialization functions in the
order in which peripherals and middleware have been enabled in STM32CubeMX. The user
can then choose to re-order them by modifying the Rank number, using the up and down
arrow buttons.
The reset button allows the user to switch back to alphabetical order.

Disabling calls to initialization functions

If the “Not to be generated” checkbox is checked, STM32CubeMX does not generate the
call to the corresponding peripheral initialization function. It is up to the user code to do it.

Choosing between HAL and LL based code generation for a given peripheral
instance
Starting from STM32CubeMX 4.17 and STM32L4 series, STM32CubeMX offers the
possibility for some peripherals to generate initialization code based on Low Layer (LL)
drivers instead of HAL drivers: the user can choose between LL and HAL driver in the
Driver Selector section. The code is generated accordingly (see Section 6.2).

Figure 194. Advanced Settings window

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Unselecting the Visibility (Static) option, as shown for MX_I2C1_init function in Figure 194,
allows the generation of the function definition without the static keyword, and hence
extends its visibility outside the current file (see Figure 195).

Figure 195. Generated init functions without C language “static” keyword

Caution: For the STM32MPUs

By default the SystemClock_Config function is called in STM32Cube Cube firmware main()
function, as the 'Not generate Function call' box in Project Manager/Advanced Settings
panel is not activated by default (see Figure 194).
This configuration is valid for running STM32Cube firmware in engineering (Cortex-M4
stand-alone) mode. and is not valid for running STM32Cube firmware in production mode:
the 'Not generate Function call' box must be checked under Project Manager/Advanced
Settings panel, so that there is no call to SystemClock_Config() in the main() function.

4.12 Import Project window

The Import Project menu eases the porting of a previously-saved configuration to another
MCU. By default the following settings are imported:
• Pinout tab: MCU pins and corresponding peripheral modes.The import fails if the same
peripheral instances are not available in the target MCU.
• Clock configuration tab: clock tree parameters.
• Configuration tab: peripherals and middleware libraries initialization parameters.
• Project settings: choice of toolchain and code generation options.
To import a project, proceed as follows:
1. Select the Import project icon that appears under the File menu after starting a
New Project and once an MCU has been selected.
The menu remains active as long as no user configuration settings are defined for the
new project, that is just after the MCU selection. It is disabled as soon as a user action
is performed on the project configuration.
2. Select File > Import Project for the dedicated Import project window to open. This
window allows to specify the following options:
– The STM32CubeMX configuration file (.ioc) pathname of the project to import on
top of current empty project.
– Whether to import the configuration defined in the Power Consumption
Calculator tab or not.

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– Whether to import the project settings defined through the Project > Settings
menu: IDE selection, code generation options and advanced settings.
– Whether to import the project settings defined through the Project > Settings
menu: IDE selection and code generation options.
– Whether to attempt to import the whole configuration (automatic import) or only a
subset (manual import).
a) Automatic project import (see Figure 196)

Figure 196. Automatic project import

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b) Manual project import

In this case, checkboxes allow the user to select manually the set of peripherals
(see Figure 197). Select the Try Import option to attempt importing.

Figure 197. Manual project import

The Peripheral List indicates:

– The peripheral instances configured in the project to be imported
– The peripheral instances, if any exists for the MCU currently selected, to which the
configuration has to be imported. If several peripheral instances are candidate for
the import, the user needs to choose one.

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Conflicts can occur when importing a smaller package with less pins or a lower-end
MCU with less peripheral options.
Click the Try Import button to check for such conflicts: the Import Status window and
the Peripheral list get refreshed to indicate errors (see Figure 198), warnings and
whether the import has been successful or not:
– Warning icons indicate that the user has selected a peripheral instance more than
once, and that one of the import requests will not be performed.
– A cross sign indicates that there is a pinout conflict, and that the configuration
cannot be imported as such.
The manual import can be used to refine import choices and resolve the issues raised
by the import trial. Figure 199 gives an example of successful import trial, obtained by
deselecting the import request for some peripherals.
The Show View function allows switching between the different configuration tabs
(pinout, clock tree, peripheral configuration) for checking influence of the “Try Import”
action before actual deployment on current project (see Figure 199).

Figure 198. Import Project menu - Try Import with errors

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Figure 199. Import Project menu - Successful import after adjustments

3. Choose OK to import with the current status or Cancel to go back to the empty project
without importing.
Upon import, the Import icon gets grayed since the MCU is now configured and it is no
more possible to import a non-empty configuration.

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4.13 Set unused/reset used GPIOs windows

These windows are used to configure in the same GPIO mode several pins at the same
time.
To open them:
• Select Pinout > Set unused GPIOs from the STM32CubeMX menu bar.
Note: The user selects the number of GPIOs and lets STM32CubeMX choose the actual pins to
be configured or reset, among the available ones.

Figure 200. Set unused pins window

• Select Pinout > Reset used GPIOs from the STM32CubeMX menu bar.
Depending whether the Keep Current Signals Placement option is checked or not on
the toolbar, STM32CubeMX conflict solver is able to move or not the GPIO signals to
other unused GPIOs:
– When Keep Current Signals Placement is off (unchecked), STM32CubeMX
conflict solver can move the GPIO signals to unused pins in order to fit in another
peripheral mode.
– When Keep Current Signals Placement is on (checked), GPIO signals is not
moved and the number of possible peripheral modes is limited.
Refer to Figure 202 and Figure 203 and check the limitation(s) in available peripheral
modes.

Figure 201. Reset used pins window

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Figure 202. Set unused GPIO pins with Keep Current Signals Placement checked

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Figure 203. Set unused GPIO pins with Keep Current Signals Placement unchecked

4.14 Update Manager windows

Three windows can be accessed through the Help menu available from STM32CubeMX
menu bar:
1. Select Help > Check for updates to open the Check Update Manager window and
find out about the latest software versions available for download.
2. Select Help > Manage embedded software packages to open the Embedded
Software Package Manager window and find out about the embedded software
packages available for download. It also allows checking for package updates and
removing previously installed software packages.
3. Select Help > Updater settings to open the Updater settings window and configure
update mechanism settings (proxy settings, manual versus automatic updates,
repository folder where embedded software packages are stored).
Refer to Section 3.4 for a detailed description of these windows.

4.15 Software Packs component selection window

This window can be opened by clicking Middleware and Software Packs from the
Pinout & Configuration tab, at any time when working on the project. It allows the user to

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select Software Packs components for the current project. It features four panels, as shown
in Figure 204:
• Filters panel
Can be hidden using the “Show/hide filters” button. It is located on the left side of the
window and provides a set of criteria to filter the pack component list.
• Packs panel
Main panel, displays the list of software components per pack that can be selected.
• Component dependencies panel
Can be hidden using the “Show/hide dependencies” button. It displays dependencies, if
any, for the component selected in the packs panel. It proposes solutions when any is
found.
Dependencies that are not solved are highlighted with fuchsia icons.
Once the dependency is solved (by selecting a component among the solution
candidates) it is highlighted with green icons.
• Details and warnings panel
Can be hidden using the “Show/hide details” button. It is located on the right hand side.
It provide informations for the element selected in the Pack panel.
This element can be a pack, a bundle or a component. It offers the possibility to install
a version of the pack available but not yet installed, and allows the user to migrate the
current project to a newer version of the pack, raising incompatibilities that cannot be
automatically resolved.

Figure 204. Additional software window

See Section 10 for more details on how to handle additional software components through
STM32CubeMX CMSIS-Pack integration.

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4.15.1 Introduction on software components

Arm® Keil™ CMSIS-Pack standard defines the pack (*.pdsc) format for software
components to be distributed as Software Packs. A Software pack is a zip file containing a
*.pdsc description file.
STM32CubeMX parses the pack .pdsc file to extract the list of software components. This
list is presented in the Packs panel.
Arm® Keil™ CMSIS-Pack standard defines a software component as a list of files. The
component or each of the corresponding individual files can optionally refer to a condition
that must resolve to true, otherwise the component or file is not applicable in the given
context. These conditions are listed in the Component dependencies panel.
There are no component names. Instead, each component is uniquely identified for a given
vendor pack by the combination of class name, group name and a version. Additional
categories, such as sub-group and variant can be assigned. These details are listed in the
Details & Warnings panel.

4.15.2 Filter panel

Click on to open the Filter panel
To filter the software component list, choose pack vendor names and software component
classes or enter a text string in the search field.
The resulting software component table is collapsed. Click the left arrow to expand it and
display all the components that match the filtering criteria.

Table 14. Additional software window - Filter icons

Icon Description

Show only favorite packs.

A pack is set as favorite in the Details and Warnings panel by clicking
Show only selected components.
Components are selected in the Packs panel through checkboxes or variant selection
when several implementation choices are available for the same component.
Show only installed packs.
Enables to show or hide not yet installed packs.
Not yet installed packs are distinguished with the icon
Show only packs compatible with this version of STM32CubeMX.
Packs not compatible with this version are distinguished with the icon

Show only packs compatible with the MCU used for the current project.

Reset all filters

4.15.3 Packs panel

By default, the Packs panel shows a collapsed view: all known packs are displayed with
their name and for one given version (latest version is the default). Icons are used only to
highlight the status of a pack version or of a component (see Table Packs panel icons).

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Details and warnings and Component dependencies panels are used to provide detailed
information.
The default view can be expanded by clicking the left arrows, revealing the next level, which
can be a Bundle or a top component. The lowest level is the component level.
From this panel, clicking an icon highlighting a limitation or an action opens the relevant
secondary panel (Details & Warnings or Component Dependency resolution).
Note: Some packs can have conditions on Arm® cores or STM32 series/MCUs, visible only when
the selected MCU meets the criteria. For example, a pack stating the “<accept
Dcore="Cortex-M4"/>” condition shows up, but is grayed for MCUs without Cortex®-M4
core.
Note: A pack may promote an API and be shown under the “exposed APIs” entry. Clicking the API
name allows to display additional information in the Details & warnings panel. Selecting the
component implementing the API selects the API itself. STM32CubeMX generates the
project with both the API .h definition file and the API implementation .c file.
Note: Some components, highlighted in gray in the component panel, are shown as read-only.
They are software components (HAL peripheral drivers or middleware offers) coming with
STM32Cube MCU embedded software package and are natively available in
STM32CubeMX.

Table 15. Additional Software window – Packs panel columns

Column name Description

At pack level, shows the <name of the Software pack>

At bundle level, shows the <Name of the Class>_<Bundle name, if any>
Pack/Bundle/Component
At component level, shows the <Group name>/<Subgroup name, if any>.
Class names are standardized by the Arm CMSIS standard(1)
Shows the version that has been selected from a list of one or more
available versions of a pack.
Version Bundle and components can either inherit the version of the pack or have
their own specific version. The version is shown in the Details and
Warning panel.
Selects a component through a checkbox when only one implementation
Selection
is available, or from a list if variants exist.
1. The Arm® Keil™ CMIS-Pack website, http://www.keil.com, lists the following classes:
- Data Exchange: Software components for data exchange
- File System: File drive support and file system
- Graphics: Graphic libraries for user interfaces
- Network: Network stack using Internet protocols
- RTOS: Real-time operating systems
- Safety: Components for testing application software against safety standards
- Security: Encryption for secure communication or storage
- USB: Universal serial bus stack
- Wireless: Communication stacks such as Bluetooth®, WiFi®, and ZigBee®.

Table 16. Additional Software window – Packs panel icons

Icon Description

The pack has been added to the user favorite list of packs.
Use the Details and Warnings panel to add/remove packs from list of favorites.

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Table 16. Additional Software window – Packs panel icons (continued)

Icon Description

The pack version is not compatible with this STM32CubeMX version.

Solution: select a compatible version.
The pack version is not yet installed.
Solution: go to the Details and Warnings panel to download the pack version to use it
for a project.
The component is not available for selection.
Solution: download the pack this component belongs to.
A component is selected and at least one condition remains to be solved.
Select the line of the component with such icon to refresh the Component
dependencies panel with the list of dependencies, status and solutions if any found.

At least one component is selected and all conditions, if any, are met.

Other pack versions are available to switch to.

Solution: use the Details and Warnings panel to proceed with a change.
Highlights the components natively available in STM32CubeMX for the currently
selected MCU. They correspond to peripheral drivers and middleware stacks.
For such components, the dependencies cannot be automatically resolved: go to the
STM32CubeMX pinout view and enable the relevant peripheral instance or
middleware in the mode panel. They will appear as selected (green checkbox) in the
Component Selector.

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4.15.4 Component dependencies panel

The conditions are dependency rules applying to a given software component. When a
component is selected, it shows with a green icon if there is no dependency to resolve, with
a warning icon otherwise. Click to open the dependency panel (see Figure 205).

Figure 205. Component dependency resolution

The panel is refreshed when selecting a component, providing details on the dependencies
to solve and the available solutions, if found (see Table 17):
• click the Show button to show the component solving the dependency
• click the Select button to select the component solving the dependency
• when available, click Resolve button to automatically resolve the dependencies.

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Table 17. Component dependencies panel contextual help

Contextual help Description

No dependency to solve.

Dependency to solve but issue encountered (no solution

found or conflict).

Dependency to solve and at least one solution found.

4.15.5 Details and Warnings panel

Click on to show the panel (see Figure 206).
This panel is refreshed upon selecting a line from the Packs panel.
The following actions are possible from this panel:
• Add/remove the pack from the list of favorite packs
• Install the pack
• Access the pack documentation through links
• Migrate the project to a new pack version
To migrate a project to a new software pack version:
1. Open the project
2. Migrate to the new pack version
3. Generate the code
Known issue: performing step 2 after step 3 (migrating after code generation) leads to errors
(wrong file path generation and project compilation failure). To fix such issue, the project
must be saved as new, and the code must be generated again. Actions are possible in this
panel, namely adding/removing the pack to/from the list of favorite packs, installing a pack,
accessing pack documentation through links.

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Figure 206. Details and Warnings panel

4.15.6 Updating the tree view for additional software components

Once the selection of the software components required for the application is complete (see
Figure 207), click OK to refresh STM32CubeMX window: the selected component appears
in the tree view under Additional Software (Figure 208).
The current selection of additional software components appears in the tree view (see
Figure 208). The software components must be enabled in the Mode panel and may be
configured further if any parameter is proposed in the configuration panel. Hovering the
mouse over the component name reveals contextual help with links to documentation.

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Figure 207. Selection of additional software components

Figure 208. Additional software components - Updated tree view

4.16 LPBAM Scenario & Configuration view

Starting with STM32CubeMX 6.5.0, for projects without TrustZone® activated and on the
STM32U575/585 product line, users can optionally create LPBAM applications using the
LPBAM Scenario & Configuration view (see Figure 209).
Starting with STM32CubeMX 6.6.0, users can create LPBAM applications for projects with
TrustZone® activated on the STM32U575/585 product lines.

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Thanks to this view it is possible to:

• add/remove LPBAM applications
• for each LPBAM application, create queues
• for each queue, create functional nodes using the LPBAM firmware API available for
peripherals on the Smart Run Domain
• for each LPBAM application, configure the pinout, the clock tree, and HAL-related
configurations for the peripherals on the Smart Run Domain.
For details on how to work with this view, refer to Section 18: Creating LPBAM projects.

Figure 209. LPBAM window

4.17 CAD Resources view section

STM32CubeMX CAD Resources view allows the user to quickly access and download
schematic symbols, PCB footprints and 3D CAD models for one or more design toolchains.
It requires STM32CubeMX to be connected to the Internet.
To configure and check the Internet connection select Help > Updater settings to open
STM32CubeMX updater settings window.
CAD Resources can be accessed from the MCU Selector window and from STM32CubeMX
project view.

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Access from MCU selector

• Open the MCU selector from STM32CubeMX homepage
• Select an MCU commercial part number (Marketing status must not be “Coming soon”)
• Select the CAD Resources tab to see the CAD resources (see Figure 210).
• Use the slider to go down the panel and access the different resource views (Symbols,
Footprint, and 3D models).
Note: For MCU commercial part numbers in “Coming Soon” Marketing status, there are no CAD
resources available (see Figure 211).
To select the resources for download (see Figure 212)
• Select the design toolchain
• Select the CAD formats
• Accept terms and conditions
• Click to download
• Specify the download location

Figure 210. CAD Resources view

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Figure 211. CAD Resources not available

Figure 212. CAD Resources selection for download

Access from STM32CubeMX project view

• Open an STM32CubeMX project (the MCU must not be in “Coming Soon” Marketing
status)
• Select the CAD tab from the Tools panel to access CAD Resources (see Figure 213).

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Figure 213. CAD Resources in Tools panel

The Symbol view reflects the STM32CubeMX project pinout configuration and, optionally,
the labeling (see Figure 214). The downloaded CAD files are aligned with the pinout
configuration and optionally, with the labels as well.

Figure 214. CAD Resources for STM32CubeMX project

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4.18 Boot path

STM32CubeMX introduces the possibility to configure the boot path for the STM32H5
series.

Figure 215. Boot path configuration ecosystem

STM32CubeH5 STM32CubeMX STM32CubeProgrammer

Booth path Project STM32H5 creation

• Boot path selection TPC
configuration files
and configuration
• Linker files update Configuration
• Post-build command file editing
update
• Code generation
• Provisioning

IDE

Code compilation
Download on
Post-build command Code target
execution for code encryption Target
(provisioning)

DT56289
encryption via TPC

Note: STM32H56x and STM32H503 do not support cryptographic hardware accelerator (a feature
needed for the ST-iROT and ST-uROT), therefore the full spectrum of boot paths is not
available for these MCUs.
For details about boot path and its usage, read the wiki page available on www.st.com, and
the guide located under the Utilities folder of the STM32Cube firmware package.
This section details, through examples, how to configure a boot path and generate the
associated code. It includes compilation, encryption, and provisioning.

4.18.1 Available boot paths

The following tables give an overview of the different boot paths supported by
STM32CubeMX, depending upon the device.

Table 18. Boot paths without TrustZone® (TZEN = 0)

OEM-iRoT OEM-iRoT→ uRoT ST-iRoT ST-iRoT → uRoT
MCU Application
→ Application → Application → Application → Application

STM32H503x √ √ - - -

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Table 19. Boot paths with TrustZone® (TZEN = 1)(1)

OEM-iRoT → OEM-iRoT →
ST-iRoT
S/NS uRoT application, ST-iRoT
→ uRoT S/NS
S/NS application, and and OEM-iRoT → ST-iRoT → → ST-uRoT
MCU application, and
application OEM-iRoT → uRoT S/NS S application → Secure manager
ST-iRoT→
S/NS application application → NS application
S/NS application
(assembled) (assembled)

STM32H56x √ √ - - - -

STM32H57x √ √ √ √ √ √

STN32H523 √ √ - - - -
STM32H533 √ √ √ √ - -

1. S: secure, NS: nonsecure.

Table 20. Boot paths for STM32H7RS devices(1)

MCU Application OEM-iRoT → application ST-iRoT → application ST-iRoT → OEM-uRoT → application

STM32H7RSx √ √ √ √

1. S: secure, NS: nonsecure.

The following figures indicate the boot paths that STM32CubeMX can configure, and the
entry points after reset.
The related user option bytes are configured automatically (through Trusted Package
Creator installed with STM32CubeMX), and programmed during the provisioning stage.

Figure 216. Boot paths for STM32H57x devices

User option bytes
NS application
=1 = ST-iRoT
TZEN UBE ST-iRoT ST-uRoT
Secure manager

Optional NS application

DT56285V3
= OEM-iRoT
OEM-iRoT OEM-uRoT
S application

Figure 217. Boot paths for STM32H56x devices

User option byte
Optional
NS application
DT56286V3

=1
TZEN OEM-iRoT OEM-uRoT
S application

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Figure 218. Application boot paths (legacy and ST-iRoT projects)

Legacy 67L5R7ĺ6HFXUHXVHUDSSOLFDWLRQ

System flash User flash

memory
NS-user application S-user application
Reset

Bootloader Bootloader
memory

Debug authentication Debug authentication

ST-iRoT (secure boot) ST-iRoT (secure boot)

DT56291V2
Reset
ST SFI/RSS ST SFI/RSS

Figure 219. Application boot paths (OEM-iRoT and secure manager projects)

2(0L5R7ĺ6HFXUH1RQVHFXUH 67L5R7ĺ67X5R7
user application ĺ6HFXUHPDQDJHUĺ
Nonsecure user application
NS-user application NS-user application
flash memory

Module S2
User

S-user application Module S1

Secure manager(*)
OEM-iRoT(*) ST-uRoT
Reset
flash memory

Bootloader Bootloader
System

Debug authentication Debug authentication

ST-iRoT (secure boot) ST-iRoT (secure boot)
Reset

DT56290V2
ST SFI/RSS ST SFI/RSS
(*) Source code not generated by STM32CubeMX

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Figure 220. Application boot path (OEM-uRoT assembled)

67L5R7ĺX5R7ĺ3URMHFWH[HFXWLRQ DVVHPEOHG
TLV MCU boot

NS user application
flash memory
Single image
(secure and nonsecure)
S user application
User

Header MCU boot

TLV MCU boot

OEM-uRoT Not generated by STM32CubeMX

Header MCU boot

Bootloader
flash memory
System

Debug authentication
ST-iRoT (secure boot)

DT56421V3
Reset
ST SFI/RSS

Figure 221. Application boot path: ST-iRoT and uRoT secure/nonsecure project

67L5R7ĺX5R7ĺ6HFXUH1RQVHFXUHXVHUDSSOLFDWLRQ

16XVHUDSSOLFDWLRQ

S-user application

Source code not generated by

OEM-uRoT STM32CubeMX

Bootloader
Debug authentication

DT56422V3
ST-iRoT (secure boot)
Reset
ST SFI/RSS

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Figure 222. Application boot path:

ST-iRoT and secure/nonsecure user application assembled
67L5R7ĺ6HFXUH1RQVHFXUHXVHU
application (assembled as single image)

User flash
memory
NS-User application
Single image
(Secure and Nonsecure)
System flash S-User application

Bootloader
memory

Debug authentication

DT56423V2
ST-iRoT (secure boot)
Reset
ST SFI/RSS

Figure 223. Application boot path: ST-iRoT dual figure

67L5R7ĺ6HFXUH1RQVHFXUHXVHUDSSOLFDWLRQ
User flash
memory

NS-User application

S-User application

Bootloader
System flash
memory

Debug authentication

DT56423V3
ST-iRoT (secure boot)
Reset
ST SFI/RSS

Figure 224. Application boot path:

(OEM-iRoT and secure/nonsecure user application assembled)
2(0L5R7ĺ6HFXUH1RQVHFXUHXVHUDSSOLFDWLRQ
(assembled as single image)

NS-User application
User flash

Single image
memory

(Secure and Nonsecure)

S-User application

Source code not generated by

OEM-iRoT STM32CubeMX
Reset
System flash

Bootloader
memory

Debug authentication
DT56425V2

ST-iRoT (secure boot)

ST SFI/RSS

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4.18.2 Creating a boot path project: an example

Prerequisites
• Hardware: Discovery board STM32H573I-DK-REVC
• Tools
– STM32CubeMX-6.8.0 or later
– Trusted Package Creator (embedded in STM32CubeMX installation folder)
– CubeFW must be installed through STM32CubeMX
– IAR Embedded Workbench® rev 9.20.4 or later

4.18.3 How to configure an OEM-iRoT boot path

The following instructions describe how to generate an OEM immutable Root of Trust
(OEM-iRoT) boot path. The procedure to generate other boot paths is similar, but the data
required for the configuration can be different.

Step 1: Selecting the MCU

Figure 225. Select the device or board

Click here to access the list of supported boards,

or use the MCU selector for a custom product

DT56292

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Figure 226. Select the STM32H5 device

Select STM32H5
Click to open the

DT56293V2
MCU/MPU selector

Figure 227. Peripheral initialization

Click No

DT56294
If you click yes, there will be an error during the secure code compilation. By default, all
peripherals are set as secure, and the memory allocation for the secure code (defined
through the OEM-iRoT_boot application) is too small.

Step 2: Project creation with OEM-iRoT boot path

For this example, enable TrustZone® (TZEN = 1).

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Figure 228. Boot paths for STM32H56x devices

User option bytes

TZEN =1 UBE =1 ST-iRoT

=0 =0

NS application

DT56295V2
OEM-iRoT
TZEN disabled S application

Select the option “with TrustZone activated ?” on the popup window, as shown below.

Figure 229. Activate TrustZone

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Step 3: Device and peripherals configuration

The device and its peripherals can be configured. In this example, the default configuration
is kept.

Figure 230. Device and peripherals configuration

Select the Project Manager tab to save the project, and to set and configure the boot path

DT56296

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Step 4: Overall configuration

Configure the application (Figure 231), then save the project (Figure 232).

Figure 231. Configuring the project

Choose project name and

location (the project directory
is created automatically)

S- and NS-application
code selected by default

IDE selection

The needed files are copied

from the selected firmware.
Current firmware package
version information

DT56298V2
Firmware repository,
keep it for
STM32CubeMX

Figure 232. Saving the project

Directory and file created in

the Cube firmware folder
DT56302V2

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Step 5: Boot path selection

The possible first stages are proposed according to selected device and project structure.

Figure 233. Boot path selection

• Select OEM-iRoT for this example

Figure 234. Select OEM-iRoT

Select OEM-iRoT
DT56304V2

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Figure 235. First boot path stage

The first stage is shown

DT56305V2
• All possible boot paths for the second stage are proposed according to the selected
device and project structure.
• Select “Secure Application”, it generates secure and nonsecure codes.

Figure 236. Select Secure Application

Select Secure Application

DT56306V2

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• Click on FINISH to generate the binary, RoT_Provisioning folder, and sub-folders.

Figure 237. Last boot path stage

Complete boot
path displayed

Click on FINISH to complete the

boot path selection and to go
back to the configuration panel

DT56307V2
Figure 238. Project provisioning

These default files are copied from Cube

firmware (installed with STM32CubeMX)

DT56308V3

Note: If a selected boot path is not supported, a warning message is displayed, and the “FINISH”
button is grayed out.
Note: For STM32H56x and STM32H523x devices, it is not possible to configure the OEM-iRoT
boot path if the flash size of the current MCU is not aligned with the FLASH_SIZE entry in
the map.properties file. A pop-up window (see Figure 239) is displayed.

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Figure 239. Flash size not aligned

Figure 240. Boot path and debug authentication panel

Enables to update the code location for customized settings

Used OEMiRoT_Bootproject

Fill all fields, then click on Edit to open

Trusted Package Creator
Erases the linker content. If both are selected, the
file content is cleared, but the new code address
location is updated.
If selected, secure and non secure codes are
encrypted. The code generated for the chosen IDE
includes the settings for the Post-build command, which
calls the Trusted Package Creator for the encryption.

DT56309V4
Included in file map properties
for the OEM-iRoT project

Step 6: Authentication and encryption keys regeneration, option byte file

generation
Customization of OEM-iROT configuration file (OEMiROT_Config.obk):
• The default configuration file of CubeFW can be used, but the default keys must be
regenerated or replaced.
• To customize the configuration file, proceed as follow:
a) Launch Trusted Package Creator and select STM32H5 (click edit in Project
Manager as indicated in Figure 238)
b) Open OBkey tab
c) The default keys can be regenerated
d) The OEMiROT_Config.obk file is generated. The modified parameters are saved
in OEMiROT_Config

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Figure 241. Authentication and encryption keys regeneration

Contextual help displayed when Default keys can
hovering the mouse on editing areas be regenerated

Secure firmware and data

images authentication key

Non-secure firmware and data

images authentication key

OEMiRoT_Config.obk
file generated

DT56311
Key to encrypt firmware and data images

• The H5-Image Gen1 and Gen2 tabs indicate the location of the image configuration
files and the path of the binary input and output files. Keep the default settings.

Figure 242. Secure image configuration

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Figure 243. Nonsecure image configuration

Step 7: Code generation

Figure 244. Generate the code

.
Click here to generate the code
and the IDE environment

DT56314V3

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Figure 245. Code is generated

DT56316
Additional directories, including the IDE environment, are created.

Figure 246. Secure and nonsecure IDE directories

Open the project

DT56315V2
A secure application and a
nonsecure application
code have been generated

The S and NS applications can be developed using the generated code skeletons.

Step 8: Code compilation and encrypted binaries generation

If the “Sign Binary(ies)” option has been ticked at Step 7: Code generation, the application
binaries are encrypted. Select Project → Option → Build Actions. The links to the Trusted
Package executable, and to the secure and nonsecure application xml files are filled
automatically.

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Figure 247. IDE post build commands

DT56317V3
xml configuration for secure application xml configuration for nonsecure application

The secure code must be generated before the nonsecure one. Compile each code
separately (right click on Project → Rebuild all). The secure and nonsecure signed and
encrypted binaries are generated during the post build phase.

Figure 248. Trusted Package Creator output directory

Step 9: Provisioning of the board

The program cannot be flashed using an IDE. Use provisioning scripts found in the user
environment, and double click on the provisioning.bat file (Figure 249). During provisioning,
log files are generated to inform the user about the activity. Follow the on-screen
instructions (Figure 250).

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Figure 249. Board provisioning

Figure 250. On-screen instructions

In the user environment, STM32CubeMX has generated an env.bat file, containing the
information required for provisioning. Do not change this file.

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A pop-up (see Figure 251) appears if you forget to compile the project OEMiRoT_Boot in
the CubeFW.

Figure 251. Error message

4.18.4 How to configure an ST-iRoT boot path

The configuration for an ST immutable Root of Trust (ST-iRoT) boot path. The requirements
are the same of the previous example.

Step 1: Generating the code

• Select an STM32H57x MCU
• Create a project with TrustZone® activated (TZEN = 1)
• In Project Manager, choose “Secure Project”
• Save the project
• Go to “Boot Path and Debug Authentication” tab, and press the Select button
• Choose ST immutable Root of Trust (ST-iRoT)

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Figure 252. Select ST-iRoT

• Select Secure Application

Figure 253. Final boot path stage

• Click “FINISH”, the boot path configuration panel is displayed (see Figure 254), use it
to configure the application, then press the GENERATE CODE button to generate the
code for the selected toolchain

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Figure 254. Boot path and Debug Authentication tab

Figure 255. Select the project structure

Generate the code and the IDE environment

DT56333V2

For this boot path, only the secure project is generated.

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Figure 256. Code is generated

Additional directories, including the IDE environment are created.

Figure 257. Secure project completed

Open the project

DT56334V2
A secure application code is generated

Secure applications can be developed using the generated code skeletons.

The Post build command creates a secure compiled encrypted code for the provisioning.

Step 2: Code compilation and encrypted binaries generation

If the “Sign Binary(ies)” option is ticked during boot path and debug authentication
configuration, the generated application binaries are encrypted.
• Open the project in the selected toolchain, then, for IAR
– Select: Project → Option → Build Actions
– The links to the Trusted Package executable and to the secure application xml are
filled automatically
– Compile secure (right click on Project → Rebuild all)
– After the Post build command the secure signed and encrypted binaries are
generated

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Figure 258. IDE post build commands

Post build command added

Trusted Package Creator generates an encrypted binary

DT56335V3
ST-iRoT board provisioning
The program cannot be flashed using an IDE, use the provisioning scripts found in the user
environment.
• Double click on the provisioning.bat file (Figure 259)

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Figure 259. Board provisioning

• During provisioning, log files are generated to inform the user about the activity
• Follow the on-screen instructions (Figure 260)

Figure 260. On-screen instructions

In the user environment STM32CubeMX has generated an env.bat file containing the
required data for provisioning, do not change it.

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Figure 261. Environment configuration file

4.18.5 How to configure an ST-iRoT with a secure manager NS application

boot path
The boot path configuration described below is the ST-iRoT → Secure manager, also known
as SM (secure manager).
Prerequisites:
• Hardware: Discovery board STM32H573I-DK-REVC or later
• Required tools
– Secure manager package, to be downloaded and installed from www.st.com
– STM32CubeMX-6.8.0 or later
– STM32 Trusted Package Creator (embedded in STM32CubeMX installation
folder)

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Figure 262. EWARM patch installation

Step 1: SM code generation

• Select an STM32H57x MCU
• Create a project with TrustZone® activated (TZEN = 1)
• In Project Manager, choose “Non-secure Project”
• Save the project
• Go to “Boot Path and Debug Authentication” tab and press the Select button
• Only ST immutable Root of Trust (ST-iRoT) is proposed

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Figure 263. First boot path stage

• Updatable Root of Trust (uRoT) option is set by default and cannot be modified

Figure 264. Second boot path stage

• Secure manager nonsecure application button is checked by default and cannot be

modified

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Figure 265. Final boot path stage

• Click “FINISH”: the panel of boot path configuration is displayed (Figure 266), use it to
configure the boot path in the “Boot Path and Debug Authentication” tab

Figure 266. Boot path and Debug Authentication tab

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• Press the “GENERATE CODE” button to generate the configuration code for the
selected toolchain

Figure 267. Select the project structure

Generate the code and the IDE environment

DT56336V2
Figure 268. Code is generated

Additional directories including the IDE environment are created.

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Figure 269. Nonsecure project completed

Open the project

A nonsecure code is generated

DT56337V2
The nonsecure application can be developed using the generated code skeletons.

SM code compilation and encrypted binaries generation

If the “Sign Binary(ies)” option is ticked during boot path and debug authentication
configuration, the generated application binaries are encrypted.
• Open the project in IAR
• Select: Project → Option → Build Actions
• The link to the STM32 Trusted Package executable and the link to the secure
application xml are filled automatically
• Compile secure (right click on Project → Rebuild all)
• After the post build phase, the secure signed and encrypted binaries are generated

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Figure 270. IDE post build commands

Post build
command added

DT56338V2
Trusted Package Creator generates an encrypted binary

Secure manager API

When SM boot path is set, the middleware “Secure Manager API” can be configured (see
Figure 270).

Figure 271. Secure manager API configuration

Depending upon the configuration, the code is generated, and the “Secure Manager API” is
added. Additional services (such as cryptography or initial attestation) can be added with
the middleware.

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Figure 272. Code generated with secure manager API

4.18.6 How to configure an assembled boot path

The configuration described below is an example of an assembled boot path.
Prerequisites:
• Hardware: Discovery board STM32H573I-DK-REVC or later
• Required tools
– Secure manager package, to be downloaded and installed from www.st.com
– STM32CubeMX-6.9.0 or later
– STM32 Trusted Package Creator (embedded in STM32CubeMX installation
folder)
– IAR Embedded Workbench rev 9.20.4 or later, and the patch in the
STM32CubeH5 firmware (Version 1.1.0 or later), named
EWARM/EWARMv8_STM32H5xx_Vx.x.x.zip.

Step 1: Configure flash_layout.h file

• Go to STM32Cube\Repository\STM32Cube_FW_H5_VX.X.X\Projects\
STM32H573I-DK\Applications\ROT\OEMiROT_Boot\Inc
• Open flash_layout.h
• Set the value of this define to 1 to assemble the Secure and Non Secure binaries into
one: #define MCUBOOT_APP_IMAGE_NUMBER 1.

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Figure 273. The flash_layout.h file

DT56420V1
Step 2: Compile OEMiROT_Boot project
• Open OEMiROT_Boot with your preferred tool chain, and recompile the project.
– The map.properties file is automatically updated
(CODE_IMAGE_ASSEMBLY=0x01)
– The image file (OEMiRoT_NS_Code_Image.xml) is automatically updated
(firmware area size)

Step 3: OEMiROT (assembled) code generation

• Open STM32CubeMX application and create a new project with the H5 series
(example: choose “STM32H573ZITxQ”)
• Go to Project Manager window, and select secure and nonsecure application
• Add a name for the project and save it
• Go to Boot Path and Debug Authentication Panel: in Boot path selection, click on
Select button
• Select OEM-iRoT in the boot path wizard window, and click Next
• Select Secure application, and click Finish

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Figure 274. The map.properties file

DT56426V1
Figure 275. Boot path project

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• Generate and build the project

Figure 276. Secure generated project

Figure 277. Non Secure generated project

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Figure 278. Compilation project

• Open the project folder. A Python script assembles both binaries (Secure, Non
Secure), then the TPC signs them:
– Assembled_OEMiRot_Boot_Path_Example_assembled.bin → File assembled by
the Python script
– Assembled_OEMiRot_Boot_Path_Example_enc_sign.hex → File signed by the
TPC

Figure 279. Project folder

• The post build command is added only for the Non Secure project.

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4.18.7 How to configure OEM-uRoT (STiRot uROT) boot path

• Select an STM32H57x MCU
• Create a project with TrustZone activated (TZEN = 1), see Figure 280
• In Project Manager, save the project, see Figure 281
• Go to “Boot Path and Debug Authentication” tab, and press the Select button, see
Figure 282
• Select “ST immutable Root of Trust (ST-iRot)”, then click “NEXT”, see Figure 283
• Select “OEM updatable Root of Trust (OEM-uRoT)”, then click “NEXT”, see Figure 283
• Select “Secure Application”, then click “FINISH”, see Figure 284
• The panel of boot path configuration is displayed, use it to configure the boot path in
the “Boot Path and Debug Authentication” tab, see Figure 285
• Generate and build the project, see Figure 288 and Figure 289

Figure 280. Boot path project

Figure 281. Save the project

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Figure 282. Boot path and debug authentication panel

Figure 283. First (left) and second (right) boot path stage

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Figure 284. Final boot path stage

Figure 285. Boot path and debug authentication tab

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Figure 286. map.properties file

Figure 287. Code generation with EWARM

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Figure 288. Non secure generated project

Figure 289. Secure generated project

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4.18.8 How to configure ST-iRoT boot path with STM32H7RS devices

Go through the following steps:
1. Select an STM32H7S3Vx MCU (Figure 290)
2. A popup (see Figure 291) asks to preconfigure the Memory Protection Unit. It is
recommended to optimize the speculative read access of the core. Select “Yes” to keep
the default configuration.
3. In Project Manager Window, check only “Appli Project”, name the project, and save it
(Figure 292).
4. Go to “Boot Path and Debug Authentication” tab and press the Select button
(Figure 293).
5. Select “ST immutable Root of Trust (ST-iRoT)”, then click “NEXT” (Figure 294).
6. Select “Application”, then click “FINISH” (Figure 295).
7. The panel of boot path configuration is displayed (see Figure 296), use it to configure
the boot path in the “Boot Path and Debug Authentication” tab.
8. Generate and build the project (see Figure 297).

Figure 290. Boot path project

Figure 291. Use default configuration

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Figure 292. Configure the project

Figure 293. Select the project

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Figure 294. First boot path stage

Figure 295. Final boot path stage

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Figure 296. Boot path and debug authentication panel

Figure 297. Generate the code

Figure 298. Application IDE directories

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4.19 User authentication

All downloads of ST packages (such as Cube firmware, X-Cube) through STM32CubeMX
must be authenticated with a my.st.com account, which can be created on www.st.com, or
directly from within the tool (see Section 4.19.2).

4.19.1 Login with an existing my.st.com account

The login form is accessible when the user performs any operation that requires or
recommends package installation.
Removal of the connection status from the home page.

Figure 299. Home page without the login form

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Authentication is required for operations involving ST packages, whether performed outside

or within a project:
• External operations:
– Installing software via Help and Shortcut menus.
– Installing software using the Example Selector.
• Internal operations:
– Installing software through the Embedded Software Manager panels.
– Installing software via the Software Component Selector panel.
– Installing software during code generation.
– Installing recommended software when loading an .ioc file.
Examples of operations that need user authentication:
• User authentication to install or remove software packages (Figure 300).
• If not authenticated, clicking the install button under the Embedded Software packages
Manager panel to get a new version of a given package. A window titled Missing myST
information appears to indicate that the user needs to be authenticated (Figure 301).
• The user can provide myST login Information from two locations:
– By clicking “Enter myST account information” button in the appeared window.
– By clicking the same button under the help menu, more precisely in myST tab
under “Connection & updates” (Figure 302).
• The field myST in STM32CubeMX display is a new UI element added to the
“Connection & Updates” window (under the Help menu and previously named Updater
Settings) to allow users to perform authentication when it is needed.
• After clicking on the “Enter myST account information” button, a user authentication
dialog window appear (Figure 303).
• If the login action is performed successfully, myST display changes as illustrated in the
Figure 304.
• If the user wants to save their credentials, they can check “Remember me on this
computer” so that they do not need to authenticate again during the next sessions.
• If the user wants to sign out, they should click on “Clear myST account information for
this session.” If the user has clicked on “Remember me on this computer,” the button
“Clear myST account information for this session” is changed to “Clear myST account
information for this computer.” The login action can be blocked if the user provides
wrong credentials or keeps the login fields empty (Figure 305).

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Figure 300. Install or remove a software package

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Figure 301. Missing myST information

Figure 302. Authentication from myST tab

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Figure 303. User Authentication Dialog

Figure 304. The myST display after a user logs in

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Figure 305. Blocked login cases

4.19.2 Create a my.st.com account

The account can be created through STM32CubeMX:
• Click on “Create Account” button (Figure 303)
• Fill the account creation form (Figure 306)
• Click on “Register” button to create a new my.st.com account (Figure 306)

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Figure 306. Account creation form

4.19.3 Password restoration

If the user forgets their password, they can reset it by following the steps below.
1. Go to the login page via myST tab.
2. Click on the “Forgot Password?” link located below the password field.

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3. Enter the email address associated with your account in the dedicated field
(Figure 307).

Figure 307. Enter the email address

4. Click on the “Reset my password” button (Figure 308). You will receive an email
containing a link to reset the password. If you do not receive the email within the next
few minutes, check your spam folder or contact our support team.

Figure 308. Password restoration

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5. Click on the link in the email to access the password reset page.
6. Enter a new password in the dedicated field. Make sure that the new password is
strong and secure.
7. Confirm the new password by entering it again in the confirmation field.
8. Click on the "Submit" button to save the new password.
9. Log in to the application, using the new password.

Figure 309. Reset password form

If you suspect that your identity has been stolen, or that your account has been
compromised, it is important to change the password immediately to protect your account.
Follow the reset procedure described above to change it.
It is recommended to contact your ST referent to report any suspicious activity on your
account, and take necessary measures to protect it.
If you experience difficulties resetting the password, contact your ST referent for assistance.

4.19.4 Authentication through command line interface

To facilitate the integration of authentication functionality with other tools, STM32CubeMX
provides a command-line mode to login with an existing my.st.com account.
Use the following command lines:
On Windows:
cd <STM32CubeMX installation path>
jre\bin\java -jar STM32CubeMX.exe login <email_adress> <password>
<remember_me>
On Linux and macOS:
./STM32CubeMX login < email_adress> <password> <remember_me>
“remember me” parameter is either “Y” or “y”. If not specified, this command must be run
during the next sessions, to allow packages to be downloaded.the default value is no.

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4.20 About window

This window displays STM32CubeMX version information. To open it, select Help > About
from the STM32CubeMX menu bar.

Figure 310. About window

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5 STM32CubeMX tools

5.1 External Tools

This panel is accessible from the home page. It provides an overview of the tools relevant
for the STM32 product portfolio (see Figure 311):
• click to open the tool information note
• click to open the tool webpage on www.st.com
• click to launch the tool.

Figure 311. ST Tools

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5.2 Compare Projects

The Compare Projects feature is a newly integrated tool in STM32CubeMX, designed to
enable the comparison of two projects, whether they are based on the same or different
microcontrollers. This tool allows users to efficiently analyze and correlate similarities and
differences in IP configurations and project structure between two projects.

5.2.1 User interface of the Compare Projects tool

The tool is composed of:
• Two main panels named respectively Project 1 and Project 2.
• Each field contains a “Browse” button from where we can load the desired .ioc file.
• The check box “Use Current project” in the first panel is to use the opened project in
STM32CubeMX instead of loading a saved one in the local device.
• Three check boxes named respectively Project 1, Project 2, and “Show differences
only”:
– Once the second project is loaded, the Project 1 and Project 2 check boxes are
checked systematically, indicating that the output table contains all the parameters
of Project 1 and Project 2 (whether they are different or not between the two
projects).
– If the user wants to see only the parameters that are different between the two
projects, they can check “Show differences only”.
• Refresh button: once it is clicked, it performs an instantiated comparison.
• Export button: allows users to save or transfer the result of the comparison to an
external file in Excel format.

Figure 312. User interface of the Compare Projects tool

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5.2.2 Steps of comparing two projects

1. Load the first project from the local device (Figure 313).
– Once the first .ioc is loaded, a popup appears to indicate to the user that they need
to upload the second .ioc.
Note: For the first project, the user can use the .ioc file of the opened project in STM32CubeMX
instead of uploading one from the local device.

Figure 313. Load the first .ioc file

2. Load the second project (Figure 314).

– After uploading the second .ioc file, the output is displayed in the UI (Figure 315).
– If the user uploads the same .ioc file (having the same path) into the two fields, a
popup appears to indicate that it is irrelevant to perform a comparison
(Figure 316).
– If the two projects have the same structure and the user checks “Show differences
only”, only the headers of the respective tables “Target”, “Peripherals &
Middleware”, and “Project Settings” are shown, no data is displayed (Figure 317).

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Figure 314. Starting the comparison process

Figure 315. The result of comparing two projects

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Figure 316. Loading the same project

Figure 317. The result of comparing two projects having the same structure

5.2.3 The output of the comparison of 2 projects

After starting a comparison of 2 projects, the following elements are added to the UI:

Target table
The Target table (Figure 318) provides a comparison of the microcontroller’s parameters
used in each project. It clearly shows differences in:
• Part numbers
• Number of IOs
• Package types
• Core configurations
• Available flash memory sizes

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The Target table is composed of 3 column:

• Structure: a listing of the MCU parameters.
• Project 1: the values corresponding to the MCU parameters of the first project.
• Project 2: the values corresponding to the MCU parameters of the second project.
The user has the option to:
• Side-by-side comparison: showing data from both projects simultaneously.
• Individual inspection: inspect each file separately by selecting the Project 1 or Project 2
checkbox.
• Focus on differences: exclusively view the differences between 2 projects by checking
‘Show differences only’.
The Target table offers a quick and straightforward overview of key differences between the
two projects. It represents an invaluable tool for project migrations and initial hardware
evaluations.

Figure 318. The structure of the Target table

Peripherals & Middleware table

It is a table (Figure 319) that displays the differences and similarities in the configuration of
each peripheral or middleware used in the two projects (the sub-parameters and the
corresponding values).

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The data is presented in this continuous table with hundreds of lines. It is composed of the
following columns:
• Category name
• IP name
• Mode
• Parameters settings
• Project 1
• Project 2
The “Peripherals & Middleware table includes a highlighting feature. This feature uses color
coding to visually differentiate parameters:
• Specific parameters for project 1 are marked in blue color
• Specific parameters for project 2 are marked in pink color
• The common parameters for the two projects are marked in black color
All peripheral categories are displayed collectively, with the option for sorting in alphabetical
order

Figure 319. The structure of the Peripherals & Middleware table

Project Settings table

The table (Figure 320) contains:
• Information about the firmware package used for each MCU.
• Information about the toolchain used for building each project.
The table helps the users to:
• Know the software environment required for each project.
• Determine the necessary tools for ensuring project compatibility and facilitating
migration.

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It is composed of three columns:

• Settings:
– CustomerFirmwarePackage
– FirmewarePackage
– ProjectStructure
– TargetToolchain
• Project 1
• Project 2

Figure 320. The structure of the Project Settings table

5.2.4 Saving the comparison result of the two projects

In the user interface of the “Compare Projects” tool, there is an Export button that allows
users to save the result of the comparison in an external Excel file.
By clicking the Export button, a window named Save appears to allow the user to choose a
name for the resulting file and save it (Figure 321).
The available format:
• The result is exported into three sheets in an Excel format (Figure 322).
• Each sheet represents a table (Target, Peripherals & Middleware, Projects Settings).
If the user wants to get only the differences in the exported file, they should click on “Show
differences only”.

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Figure 321. Choosing the Excel format to save the comparison result

Figure 322. Comparison result in Excel format

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5.3 Power Consumption Calculator view

For an ever-growing number of embedded systems applications, power consumption is a
major concern. To help minimizing it, STM32CubeMX offers the Power Consumption
Calculator tab (see Figure 323), which, given a microcontroller, a battery model and a
user-defined power sequence, provides the following results:
• Average current consumption
Power consumption values can be taken from the datasheet or interpolated from a user
specified bus or core frequency.
• Battery life
• Average DMIPs
DMIPs values are directly taken from the MCU datasheet and are neither interpolated
nor extrapolated.
• Maximum ambient temperature (TAMAX)
According to the chip internal power consumption, the package type, and a maximum
junction temperature of 105 °C, the tool computes the maximum ambient temperature
to ensure good operating conditions.
Current TAMAX implementation does not account for I/O consumption. For an accurate
estimate, I/O consumption must be specified using the Additional Consumption field.
The formula for I/O dynamic current consumption is specified in the microcontroller
datasheet.
The Power Consumption Calculator view allows developers to visualize an estimate of
the embedded application consumption and lower it further at each power sequence step:
• make use of low power modes when available
• adjust clock sources and frequencies based on the step requirements
• enable only the peripherals necessary for each phase.
For each step the user can choose VBUS as possible power source instead of the battery,
impact battery life. If power consumption measurements are available at different voltage
levels, STM32CubeMX also proposes a choice of voltage values (see Figure 326).
An additional option, the transition checker, is available for STM32L0, STM32L1, STM32L4,
STM32L4+, STM32G0, STM32G4, STM32H7 and STM32WB series. When enabled, the
transition checker detects invalid transitions within the currently configured sequence. It
ensures that only possible transitions are proposed to the user when a new step is added.

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5.3.1 Building a power consumption sequence

The default starting view is shown in Figure 323.

Figure 323. Power Consumption Calculator default view

Selecting a VDD value

From this view and when multiple choices are available, the user must select a VDD value.

Selecting a battery model (optional)

Optionally, the user can select a battery model. This can also be done once the power
consumption sequence is configured.
The user can select a predefined battery or choose to specify a new battery that best
matches its application (see Figure 324).

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Figure 324. Battery selection

Power sequence default view

The user can now proceed and build a power sequence.

Managing sequence steps

Steps can be reorganized within a sequence (Add new, Delete a step, Duplicate a step,
move Up or Down in the sequence) using the set of Step buttons (see Figure 325).
The user can undo or redo the last configuration actions by clicking the Undo button in the
Power Consumption Calculator view or the Undo icon from the main toolbar

Figure 325. Step management functions

Adding a step
There are two ways to add a new step:
• Click Add in the Power Consumption panel. The New Step window opens with empty
step settings.
• Or, select a step from the sequence table and click Duplicate. A New Step window
opens duplicating the step settings (see Figure 326).

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Figure 326. Power consumption sequence: New Step default view

Once a step is configured, resulting current consumption and TAMAX values are provided in
the window.

Editing a step
To edit a step, double-click it in the sequence table, this opens the Edit Step window.

Moving a step
By default, a new step is added at the end of a sequence. Click the step in the sequence
table to select it and use the Up and Down buttons to move it elsewhere in the sequence.

Deleting a step
Select the step to be deleted and click the Delete button.

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Using the transition checker

Not all transitions between power modes are possible. The Power Consumption Calculator
power menu proposes a transition checker to detect invalid transitions or restrict the
sequence configuration to only valid transitions.
Enabling the transition checker option prior to sequence configuration ensures that the user
will be able to select only valid transition steps.
Enabling the transition checker option on an already configured sequence will highlight the
sequence with a green frame if all transitions are valid (see Figure 327), or in fuchsia if at
least one transition is invalid (fuchsia frame with description of invalid step highlighted in
fuchsia, see Figure 328). In the latter case, the user can click the Show log button to find
out how to solve the transition issue (see Figure 329).

Figure 327. Enabling the transition checker option on an already

configured sequence - All transitions valid

Figure 328. Enabling the transition checker option on an already

configured sequence - At least one transition invalid

Figure 329. Transition checker option - Show log

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5.3.2 Configuring a step in the power sequence

The step configuration is performed from the Edit Step and New Step windows. The
graphical interface guides the user by forcing a predefined order for setting parameters.
Their naming may differ according to the selected MCU series. For details on each
parameter, refer to glossary in Section 5.3.4 and to Appendix D, or to the electrical
characteristics section of the datasheet.
The parameters are set automatically by the tool when there is only one possible value (in
this case, the parameter cannot be modified and is grayed out). The tool proposes only the
configuration choices relevant to the selected MCU.
To configure a new step:
1. Click Add or Duplicate to open the New step window or double-click a step from the
sequence table to open the Edit step window.
2. Within the open step window, select in the following order:
– The Power Mode
Changing the Power Mode resets the whole step configuration.
– The Peripherals
Peripherals can be selected/deselected at any time after the Power Mode is
configured.
– The Power scale
The power scale corresponds to the power consumption range (STM32L1) or the
power scale (STM32F4).
Changing the Power Mode or the Power Consumption Range discards all
subsequent configurations.
– The Memory Fetch Type
– The VDD value if multiple choices available
– The voltage source (battery or VBUS)
– A Clock Configuration
Changing the Clock Configuration resets the frequency choices further down.
– When multiple choices are available, the CPU Frequency (STM32F4) and the
AHB Bus Frequency/CPU Frequency(STM32L1) or, for active modes, a user
specified frequency. In this case, the consumption value will be interpolated (see
Using interpolation).
3. Optionally set
– A step duration (1 ms is the default value)
– An additional consumption value (expressed in mA) to reflect, for example,
external components used by the application (external regulator, external pull-up,
LEDs or other displays). This value added to the microcontroller power
consumption will impact the step overall power consumption.
4. Once the configuration is complete, the Add button becomes active. Click it to create
the step and add it to the sequence table.

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Using interpolation
For steps configured for active modes (Run, Sleep), frequency interpolation is supported by
selecting CPU frequency as User Defined and entering a frequency in Hz (see Figure 330).

Figure 330. Interpolated power consumption

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Importing pinout
Figure 331 illustrates the example of the ADC configuration in the Pinout view: clicking
Enable IPs from Pinout in the Power Consumption Calculator view selects the ADC
peripheral and GPIO A (Figure 332).
The Enable IPs from Pinout button allows the user to automatically select the peripherals
that have been configured in the Pinout view.

Figure 331. ADC selected in Pinout view

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Selecting/deselecting all peripherals

Clicking Enable All IPs allows the user to select all peripherals at once.
Clicking Disable All IPs removes them as contributors to the consumption.

Figure 332. Power Consumption Calculator configuration window:

ADC enabled using import pinout

5.3.3 Managing user-defined power sequence and reviewing results

The configuration of a power sequence leads to an update of the Power Consumption
Calculator view (see Figure 333):
• The sequence table shows all steps and step parameters values. A category column
indicates whether the consumption values are taken from the datasheet or are
interpolated.
• The sequence chart area shows different views of the power sequence according to a
display type (e.g. plot all steps, plot low power versus run modes)
• The results summary provides the total sequence time, the maximum ambient
temperature (TAMAX), plus an estimate of the average power consumption, DMIPS, and
battery lifetime provided a valid battery configuration has been selected.

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Figure 333. Power Consumption Calculator view after sequence building

Managing the whole sequence (load, save and compare)

From the power menu (see Figure 334), the current sequence can be saved, deleted or
compared to a previously saved sequence that will be displayed in a dedicated popup
window.

Figure 334. Sequence table management functions

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Managing the results charts and display options

In the Display area, select the type of chart to display (e.g. sequence steps, pie charts,
consumption per peripherals). You can also click External Display to open the charts in
dedicated windows (see Figure 335).
Right-click on the chart to access the contextual menus: Properties, Copy, Save as png
picture file, Print, Zoom menus, and Auto Range to reset to the original view before zoom
operations. Zooming can also be achieved by mouse selecting from left to right a zone in
the chart and Zoom reset by clicking the chart and dragging the mouse to the left.

Figure 335. Power Consumption: Peripherals consumption chart

Overview of the Results summary area

This area provides the following information (see Figure 336):
• Total sequence time, as the sum of the sequence steps durations.
• Average consumption, as the sum of each step consumption weighed by the step
duration.
• The average DMIPS (Dhrystone million instructions per second) based on Dhrystone
benchmark, highlighting the CPU performance for the defined sequence.
• Battery life estimation for the selected battery model, based on the average power
consumption and the battery self-discharge.
• TAMAX: highest maximum ambient temperature value found during the sequence.

Figure 336. Description of the Results area

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5.3.4 Power sequence step parameters glossary

The parameters that characterize power sequence steps are the following (refer to
Appendix D: STM32 microcontrollers power consumption parameters for more details):
• Power modes
To save energy, it is recommended to switch the microcontroller operating mode from
running mode, where a maximum power is required, to a low-power mode requiring
limited resources.
• VCORE range (STM32L1) or Power scale (STM32F4)
These parameters are set by software to control the power supply range for digital
peripherals.
• Memory Fetch Type
This field proposes the possible memory locations for application C code execution. It
can be either RAM, FLASH or FLASH with ART ON or OFF (only for families that
feature a proprietary Adaptive real-time (ART) memory accelerator which increases the
program execution speed when executing from flash memory).
The performance achieved thanks to the ART accelerator is equivalent to 0 wait state
program execution from flash memory. In terms of power consumption, it is equivalent
to program execution from RAM. In addition, STM32CubeMX uses the same selection
choice to cover both settings, RAM and flash memory with ART ON.
• Clock Configuration
This operation sets the AHB bus frequency or the CPU frequency that will be used for
computing the microcontroller power consumption. When there is only one possible
choice, the frequencies are automatically configured.
The clock configuration drop-down list allows to configure the application clocks:
– the internal or external oscillator sources: MSI, HSI, LSI, HSE or LSE
– the oscillator frequency
– other determining parameters, among them PLL ON, LSE Bypass, AHB prescaler
value, LCD with duty
• Peripherals
The peripheral list shows the peripherals available for the selected power mode. The
power consumption is given assuming that peripherals are only clocked (e.g. not in use
by a running program). Each peripheral can be enabled or disabled. Peripherals
individual power consumptions are displayed in a tooltip. An overall consumption due
to peripheral analog and digital parts is provided in the step Results area (see
Figure 337).

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Figure 337. Overall peripheral consumption

The user can select the peripherals relevant for the application:
– none (Disable All)
– some (using peripheral dedicated checkbox)
– all (Activate All)
– or all from the previously defined pinout configuration (Import Pinout).
Only the selected and enabled peripherals are taken into account when computing the
power consumption.
• Step duration
The user can change the default step duration value. When building a sequence, the
user can either create steps according to the application actual power sequence or
define them as a percentage spent in each mode. For example, if an application

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spends 30% in Run mode, 20% in Sleep and 50% in Stop, the user must configure a
3-step sequence consisting in 30 ms in Run, 20 ms in Sleep and 50 ms in Stop.
• Additional Consumption
This field allows entering an additional consumption resulting from specific user
configuration (e.g. MCU providing power supply to other connected devices).

5.3.5 Battery glossary

• Capacity (mAh)
Amount of energy that can be delivered in a single battery discharge.
• Self-discharge (% / month)
This percentage, over a specified period, represents the loss of battery capacity when
the battery is not used (open-circuit conditions), as a result of internal leakage.
• Nominal voltage (V)
Voltage supplied by a fully charged battery.
• Max. continuous current (mA)
This current corresponds to the maximum current that can be delivered during the
battery lifetime period without damaging the battery.
• Max. pulse current (mA)
This is the maximum pulse current that can be delivered exceptionally, for instance
when the application is switched on during the starting phase.

5.3.6 SMPS feature

Some microcontrollers (e.g. STM32L496xxxxP) allow the user to connect an external
switched mode power supply (SMPS) to further reduce power consumption.
For such microcontrollers, the Power Consumption Calculator tool offers the following
features:
• Selection of SMPS for the current project
From the left panel, check the Use SMPS box to use SMPS (see Figure 338). By
default, ST SMPS model is used.
• Selection of another SMPS model by clicking the Change button
This opens the SMPS database management window in which the user can add a new
SMPS model (see Figure 339). The user can then select a different SMPS model for
the current sequence (see Figure 340, Figure 341 and Figure 342)
• Check for invalid SMPS transitions in the current sequence by enabling the SMPS
checker
To do this, select the checkbox to enable the checker and click the Help button to open
the reference state diagram (see Figure 343).
• Configuration of SMPS mode for each step (see Figure 344)
If the SMPS checker is enabled, only the SMPS modes valid for the current step are
proposed.

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Figure 338. Selecting SMPS for the current project

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Figure 339. SMPS database - Adding new SMPS models

Figure 340. SMPS database - Selecting a different SMPS model

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Figure 341. Current project configuration updated with new SMPS model

Figure 342. SMPS database management window with new model selected

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Figure 343. SMPS transition checker and state diagram helper window

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Figure 344. Configuring the SMPS mode for each step

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5.3.7 Bluetooth Low-Energy®/ZigBee® support (STM32WB series only)

The Power Consumption tool allows the user to take into account the consumption related
to the RF peripheral and corresponding Bluetooth Low-Energy functional mode, combined
with the usage of the SMPS feature.

Figure 345. RF related consumption (STM32WB series only)

The Bluetooth Low-Energy mode can be selected from the left panel and configured to
reflect the application relevant settings. For each new step enabling BLE, the peripheral
consumption part is updated accordingly (see Figure 346). A similar approach is used for
ZigBee (see Figure 347).

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Figure 346. RF Bluetooth Low-Energy mode configuration (STM32WB series only)

Figure 347. ZigBee configuration (STM32WB series only)

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5.3.8 Sub-GHz support (STM32WL series only)

Sub-GHz usage can be enabled from the left panel and configured to reflect the application
relevant settings. For each new step enabling ZigBee, the peripheral consumption part is
updated accordingly (see Figure 348).

Figure 348. RF sub-GHz configuration

5.3.9 Example feature (STM32MPUs and STM32H7 dual-core only)

Under the section Sequence Examples, the PCC tool allows to access examples: each of
them comes with an explanatory slide set and a ready-made sequence to load in PCC (see
Figure 349).

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Figure 349. Power Consumption Calculator – Example set

Clicking “Load Example N” loads the sequence corresponding to example N (see

Figure 350).

Figure 350. Power Consumption Calculator – Example sequence loading

Clicking “Example N Presentation” displays the explanations for that example.

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The example can be changed anytime: the new sequence can be added to the current
sequence, or replace it (see Figure 351).

Figure 351. Power Consumption Calculator – Example sequence new selection

Note: The examples are provided for a given part number and may require adjustments when
used for a different part number. Also, after loading, it is recommended to edit each step and
check settings.

5.4 DDR Suite (STM32MPUs only)

DDR SDRAMs are complex high speed devices that need careful PCB design.
The STM32MP15 devices support the following DDR types:
• LPDDR2
• LPDDR3
• DDR3 / DDR3L
They are specified by the JEDEC standard (standardization of interfaces, commands,
timings, packages and ballout).
STM32CubeMX has been extended to provide an exhaustive tool suite for the DDR
subsystem. It proposes the following key features.
• Configuration of DDR controller and PHY registers is managed automatically based
on reduced set of editable parameters.
• DDR testing is offered based on a rich list. Tests go from basic to stress. User can also
develop its own tests.
DDR configuration is accessible like the other peripherals in the Pinout & Configuration
view: clicking the DDR from the component panel opens the mode and configuration panels.

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DDR Test suite testing and tuning features are available from the Tools view.
The DDR suite relies on two important concepts:
• the DDR timings as key inputs for the configuration of the DDR Controller and PHY
• the tuning of DDR signals to compensate board design imperfections.

5.4.1 DDR configuration

STM32CubeMX allows to set DDR system parameters and JEDEC core timings. The timing
parameters are available in the DDR datasheet.

DDR type, width, and density

The DDR type, width, and density parameters must be set to proceed with the DDR
configuration. This can be done in the Mode panel after selecting the DDR in the Pinout &
Configuration view. See Figure 352 for an example of LPDDR2 settings.

Figure 352. DDR pinout and configuration settings

Another example: for a configuration with two “DDR3 16 bits 2 Gb” chips, settings are
“DDR3/DDR3L”, “32 bits” and 4 Gb”.
Note: Contexts for DDR IP cannot be changed, DDR is tied to “Cortex-A7 nonsecure” identified as
“Cortex-A7 NS” in the tool.

DDR configuration
Clicking on a parameter will show additional details in the DDR configuration footer.
• The DDR frequency is taken from the ‘Clock configuration’ tab, it cannot be changed in
the DDR configuration.
• The ‘Relaxed Timing’ mode is used during bring-up phase for trying relaxed key DDR
timings value (one tCK added to tRC, tRCD and tRP timings)
• Other parameters must be retrieved from the user DDR datasheet.
• Some parameters are read-only: they are for information only and depend on the DDR
type.

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Clicking “generate code” automatically computes the DDR node of the device tree (DDR
Controller and DDR PHY registers values) based on these parameters.

DDR3 configuration
For DDR3, the configuration is made easier with the selection of a Speed Bin Grade
combination, instead of manually editing timing parameters.

Figure 353. DDR3 configuration

The Speed Bin Grade combination must match the selected DDR. If the exact combination
is not in the pick-list, select “1066E / 6-6-6” for faster DDR Speed Bin Grade, or
“1066G / 8-8-8” for a relaxed configuration.
Timing edition is optional, and reserved for advanced users: select Show Advanced
parameters to display the list.

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5.4.2 Connection to the target and DDR register loading

To manage DDR tests and tuning, STM32CubeMX must establish a connection with the
target and more specifically with U-Boot SPL using the DDR interactive protocol:
• the DDR interactive protocol is only available in the Basic boot scheme U-Boot SPL
binary and supported over the UART4 peripheral instance
• when U-Boot SPL detects a connection to STM32CubeMX on UART4, it stops its
initialization process and accepts commands from STM32CubeMX.
There are two connection options:
1. the U-Boot SPL binary is available in flash memory
2. the U-Boot SPL needs to be loaded in SYSRAM because the DDR has not yet been
tested nor tuned (and, consequently, is not fully functional yet).

Prerequisites
• Installation of ST-Link USB driver to perform firmware upgrades: for Windows, latest
version of STSW-LINK009, for Linux, use STSW-LINK007. Both can be downloaded
from www.st.com.
• Installation of STM32CubeProgrammer (for SYSRAM loading only): installer can be
downloaded from www.st.com.

Connection to the target

The COM port must be selected to connect to the target, as indicated in Figure 354.

Figure 354. DDR Suite - Connection to target

If U-Boot SPL loading in SysRAM is required, it can be performed through UART or USB
using the STM32CubeProgrammer tool. If not automatically detected by STM32CubeMX,
the STM32CubeProgrammer tool location must be specified in the Connection settings
window: click to open it. U-Boot SPL file must be manually selected in the build image
folder.

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Once up, the connection gives the various services and target information (see Figure 355).

Figure 355. DDR Suite - Target connected

Output/Log messages
STM32CubeMX outputs DDR suite related activity logs (see Figure 356) and interactive
protocol communication logs (see Figure 357). They are displayed by enabling outputs from
the Window menu.

Figure 356. DDR activity logs

Figure 357. DDR interactive logs

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DDR register loading (optional)

Once connected in DDR interactive mode, the current DDR configuration can be loaded in
SYSRAM.

Figure 358. DDR register loading

This step is optional if the used U-Boot SPL already contains the required configuration. It
triggers the DDR Controller and PHY initialization with those registers, and allows the user
to quickly test a configuration without generating the device tree and dedicated U-Boot SPL
binary file.

5.4.3 DDR testing

Prerequisites
To proceed with DDR testing:
• The DDR suite must be in connected state
• The DDR configuration must be available in memory, either with the U-Boot SPL (with
DDR register file in Device Tree) or in the DDR registers (see Section 5.4.2).

DDR test list

DDR tests are part of the U-Boot SPL (see Figure 359).

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Figure 359. DDR test list from U-Boot SPL

New tests can be added by modifying the U-boot SPL.

Most of the tests come with parameters to be set prior to execution, such as:
• Address: the memory address where the test is executed. All writes and reads are
performed on this address. The given address has to be located in the DDR memory
region [DDR base address, DDR base address + DDR size].
• On STM32MP15, DDR base address is 0xC0000000 (as an example, DDR size for
4 Gbits is 0x20000000).
• Loop: number of test iterations before verdict. Same test is repeated [Loop] times.
Verdict OK if all tests are OK, KO otherwise.
• Size: the byte size of the region to test. It must be a multiple of 4 (read/writes are
performed on 32-bit unsigned integers), with minimal value equal to 4, and up to DDR
size.
• Pattern: the 32-bit pattern to be used for read / write operations.
The DDR Suite embeds an auto-correction feature preventing users to specify wrong
values.
All tests are performed with Data cache disabled and Instruction cache enabled.

DDR test results

The test verdict is reported by the U-Boot SPL: the parameters used for the tests are
recalled, along with Pass/Fail status and results details (see Figure 360). The test history is
available in the output and Logs panels (see Figure 361).

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Figure 360. DDR test suite results

Figure 361. DDR tests history

5.5 STM32CubeMX Memory Management Tool

The Memory Management Tool (MMT) displays the memory map and defines memory
attributes applied in user projects opened/created in STM32CubeMX.
The tool is located in the “Tools” tab. It allows the user to declare memory regions (referred
to as application regions or AppReg) at application level.
The HW constraints related to TrustZone, Memory Protection Unit, and the memory
granularity are handled by MMT and made transparent to the user, so that the focus can be
put on the memory regions. A linker file is generated according to the application regions
declared and configured by the user.

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The MMT key features are:

• Memory map display
• Application regions management
• Linker file generation
MMT interacts with peripherals starting from the moment the user enters its interface:
• Checks their settings
• Updates other peripherals involved in memory map configuration
The peripherals are updated only when the first toggle button is ON.

Figure 362. Regions settings to peripherals ON

MMT updates the linker scripts only when the second toggle button is ON.

Figure 363. Regions settings to linker files ON

The applicative regions are saved into the user project even if the first toggle button is OFF.

Figure 364. Regions settings to peripherals OFF

5.5.1 STM32U5, STM32H5, STM32WBA, and STM32WBAM

with TrustZone activated
Feature: MMT usage, pinout, and configuration user interface
When the first toggle button is ON (see Figure 362), SAU, GTZC, Cortex-M33 (MPU),
Cortex-M7_BOOT (MPU), Cortex-M7_APPLI (MPU), and FLASH configurations are under
MMT control: their modes and parameters become read-only.

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Figure 365. MMT usage

Feature: MMT usage and linker script

Linker files content is generated according to the configuration of application regions.

Linker files content is generated as if MMT is not used. SAU, GTZC, Cortex-M33 MPU, and
FLASH are enabled, so that the user can modify the values supplied by MMT.

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Figure 366. MMT view

5.5.2 An end-to-end usage example

Choose a supported MCU (STM32U585x in this example).

Figure 367. Start a project

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Press the “Start Project” button, and then choose the “with TrustZone activated ?” option.

Figure 368. Use TrustZone

Choose the “Tools” tab followed by the “Memory Management” option to display the Memory
Management Tool (see Figure 369).

Figure 369. Default settings

The middle panel represents the memory, split into two columns: the left one is the memory
seen by the core(s), the right one the memory set up for the application.

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In this example there are two projects, a secure and a nonsecure one. The application
region allocated to the secure project is green, the nonsecure application region is pink. The
reserved memory regions are gray.
For the new project created under STM32CubeMX the tool creates the default application
region to generate a valid project.

Region information
Clicking on a particular region in the Application Regions column shows the associated
details on the left hand side.
You can choose to hide the name of the reserved region, or hide the Secure/Non Secure
indication close to the region name (the secure/nonsecure indication is indicated by the
color).

Figure 370. Region information

Code generation configuration

The application regions settings can be applied to peripherals on the left of the screen. The
concerned peripherals are shown on the associated tooltip. This can impact their availability
on the pinout screen configuration.

Figure 371. Tooltip

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In this example, on the Pinout & Configuration panel, CORTEX_M33, FLASH, and GTZC
are set, and correspond to the region configuration on the Memory Management Tool. They
are grayed out, as they cannot be modified.

Figure 372. IP configuration

When an IP is under MMT control, a tooltip provides the info shown in Figure 373.

Figure 373. IP under control

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Apply Application Regions settings to linker files

When this button is on, the linker scripts for the secure and non secure applications are
generated, taking into account the configuration.

Figure 374. Linker files update

Configuring an external memory

This example uses the FMC. Go to the Pinout & Configuration window (see Figure 375) and
enable the IP.

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Figure 375. Configure an external memory

When going back to the MMT, a new region corresponding to the added FMC is created.

Figure 376. New region created

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Add a new region by pressing the plus button appearing in the white space when hovering
with the mouse.

Figure 377. Adding a new region

To add another external memory, go to the Pinout & Configuration view, and add OCTOSPI1
to Cortex-M33 Secure. Choose Single SPI, and specify Device Size and Device Type.

Figure 378. Adding a new memory

On the MMT there is now a new entry with OCTOSPI1.

• For our example, we need half of the available 128 Mbytes.
• Press the “+” button, set a name for the region (for instance: MyExternalRAM), and put
64 MB for its size.

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Figure 379. Memory assignment

Configuring a memory region using the left panel

With the left panel (see Figure 380) you can adjust items such as starting position and size.
In this example, the added region must be adjusted: we want it to be allocated to the non
secure project, and to start in the middle of the RAM. By adjusting those values, the
expected results appear (see Figure 381). The color is now pink (nonsecure), and the
region starts in the middle of the RAM (OctoSPI1).

Figure 380. Left panel configuration

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Figure 381. Allocating a region

Setting up a middleware memory location

The application needs ThreadX. Go back to the “Pinout & Configuration” tab. Choose
ThreadX, then use the Use Dynamic Allocation under Memory Configuration.

Figure 382. Middleware memory allocation

To finish the configuration, go back to MMT. We want ThreadX to use a dedicated

application region for its heap memory allocation. To do so, simply click the RAM region,
and reduce its size to 17 Kbytes using the left panel. We then add a new region to the newly
freed space, and call it MyThreadXHeap.
As ThreadX has been selected, on the Pinout & Configuration you can see a tick box called
ThreadX Heap section. When this box is selected, the tool ensures that ThreadX memory
allocation happens only in that particular region.

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Figure 383. Middleware heap configuration

Remap
For performance reasons, part of the application must run on the internal memory (much
faster than the external memory). To do so, remap the added external RAM to an available
internal memory region:
• Go to the Pinout & Configuration tab
• Enable ICACHE, select the Memory address remap tick box
• Select a region and set the memory size to 64 Mbytes
• Change the Remap address to 0x9000 0000

Figure 384. Remapping the memory

• Go back to the Memory management Tool tab. Region 0x9000 0000 is named with
Remapped, with the amount of RAM previously selected.

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Figure 385. Remapped region is renamed

• There is also a Remap – External RAM(OCTOSPI1) added at address 0x0000 0000.

Figure 386. Remapped start address

• Add a new region named “MyRemappedRAM” at that address.

Figure 387. New region remapped

The default regions cannot be removed, but can be resized. As an example, the FLASH is
where the application code is hosted. You cannot untick the Default Region.

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Figure 388. Resizing default region

Changing the security of an application region mapped on aliased RAM or FLASH moves it
in an aliased RAM or FLASH corresponding to the new security setting. Graphically, the
region moves up and down, depending on the area it will go, as the same physical memory
is seen by the core at different locations.

Figure 389. Region security change

Code generation
• Go to the project manager, set a name to your project, Choose CubeIDE as a toolchain
and press GENERATE CODE
• Navigate to the generated Secure Project and open the linker definition file. Under the
Memories definition you will see the defined memories with their start address and

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length. This file shows only the secure regions in green. Open the nonsecure linker file
and check the same location for the memory regions allocated to the nonsecure area.

Figure 390. Memory map in linker file

5.5.3 STM32H7 single core and STM32U5 without TrustZone activated

Feature: MMT usage, pinout, and configuration user interface
When the first toggle button is ON, Cortex-M33 (MPU for STM32U5) and Cortex-M7 (MPU
for STM32H7) are under MMT control (see, respectively, Figure 391 and Figure 392):
modes and parameters become read-only.
The middle panel (see, respectively, Figure 393 and Figure 394 for STM32U5 and
STM32H7) represents the memory, split into two columns: the left one is the memory seen
by the core(s), the right one the memory set-up for the application.
For the new project created under STM32CubeMX the tool creates the default application
region to generate a valid project.

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Figure 391. MMT usage (STM32U5)

Figure 392. MMT usage (STM32H7 single core)

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Figure 393. MMT view for U5 without TrustZone

Figure 394. MMT view for H7 single core

The middle panel represents the memory, split into two columns: the left one is the memory
seen by the core(s), the right one the memory set-up for the application.
For the new project created under STM32CubeMX the tool creates the default application
region to generate a valid project. The default data region can be updated by the user to
choose another region as RAM, but there must always be a default data region
(Figure 395).

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Figure 395. Default data region

FMC impact on MMT

When activating FMC and SDRAM Bank1, a tab mapping (see Figure 396) is displayed,
with three options:
1. Default mapping (see Figure 397): MMT initializes as default position of SDRAM
Bank1, SDRAM Bank2, and NOR PSRAM (default viewer of MMT)
2. NOR/PSRAM bank and SDRAM Bank1/2 are swapped: MMT swaps the position of
SDRAM Bank1 and NOR PSRAM Bank1 (see Figure 398 and Figure 399)
3. SDRAM Bank2 remapped on FMC Bank2 and still accessible at default mapping: MMT
updates the position of SDRAM Bank1 to be remapped on position of FMC Bank2 (see
Figure 400 and Figure 401)

Figure 396. FMC activation

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Figure 397. Default mapping

Figure 398. Before the swap

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Figure 399. After the swap

Figure 400. Before remapping

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Figure 401. After remapping

5.5.4 STM32WBxx
Feature: MMT usage, pinout, and configuration user interface
When the first toggle button is ON, Cortex-M33 is under MMT control: its modes and
parameters become read-only (see Figure 402).

The user must select the Core and the STM32Cube firmware from a list. It is possible to
choose any STM32Cube firmware version (see Figure 403).
The list proposed to user contains only the firmwares found in
STM32Cube_FW_WB_Vx/Projects / STM32_Copro_Wireless_Binaries/STM32WBxx (all
.bin files). Firmware Update Service (FUS) and SafeBoot firmware are not proposed, so
they are not in the MMT list.
In this example, we loaded an STM32WB5x MCU, so the list must contain only
stm32wb5x_x binaries. the button “Refresh” is used to refresh the binaries list version
existing in the repository of STM32Cube firmware (see Figure 404).

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Figure 402. MMT usage

Figure 403. Firmware version

Figure 404. MMT configuration for STM32WB5x

After selecting the binary firmware, the MMT view is displayed and the reserved regions of
Cortex M0+ are created.
The middle panel represents the memory, split into two columns: the left one is the memory
seen by the core(s) Cortex-M4, the right one the memory set-up for the application.

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For the new project created under STM32CubeMX the tool creates the default application
region to generate a valid project.

5.5.5 STM32H7 Dual-core without Trust Zone activated

Feature: MMT usage, pinout, and user interface configuration
When the first toggle button is ON, Cortex-M7_BOOT (MPU) and Cortex-M7_APPLI (MPU)
are under MMT control: their modes and parameters become read-only.

Figure 405. CORTEX_M7 Mode and Configuration

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Figure 406. CORTEX_M4 Mode and Configuration

Feature: MMT usage and linker script

When the two radio buttons are activated, the memory management parameters are
available, and the linker file content is generated according to the configuration of
application regions.

There are two possible configurations of the application regions for the code generation:
• First configuration:

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• Second configuration:

The Cortex-M7 and Cortex-M4 contexts are managed by the MMT. Each context has its own
application region (AppReg0 and AppReg1, respectively).

User interface

Figure 407. Default settings

The middle panel represents the memory, split into three columns: the left one is the
memory seen by the cores (CM7 and CM4), the middle one the memory set-up for the
application in Context Cortex-M7, the right one the memory set-up for the application in the
Context Cortex-M4.
For the new project created under STM32CubeMX, the tool creates the default application
region to generate a valid project.

Region information
Clicking on a particular region in the Application Regions column shows the associated
details on the left hand side.
STM32CubeMX automatically adds a 4 Gbytes region for the system core, even if you are
not planning to use the MMT.

An example of MMT configuration of the OPENAMP Middleware on the

STM32H755XIH6TR MCU
Below are the steps for configuring the MMT with OPENAMP activated on the
STM32H755XIH6TR MCU.

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1. Choose a supported MCU.

Figure 408. Choose an STM32H7 dual-core product

2. Click on the Start Project button, then choose Yes on the “Memory Protection Unit for
Cortex-M7” dialog box.

Figure 409. Choose an STM32H7 dual-core product

Note: STM32CubeMX applies the default configuration, then adds a 4 Gbytes region called
“Region 0” under the CORTEX_M7 parameters. The new parameters can be checked using
the Pinout and Configuration tab.

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Figure 410. Region 0 added

3. Select the "Tools" in the toolbar

– Choose Memory Management.
– Activate the Memory Management Tool support by clicking the radio button “Apply
Application Regions Settings to Peripherals”.

Figure 411. Activate Memory Management support

The default application regions are in exclusive mode (context sharing is unselected).
A reserved region in the other context will be created and mentioned as “Mx non-shared
region”.

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Figure 412. Default setting for new application region

4. Add a new region by pressing the “+” button that appears in the white space when
hovering with the mouse.

Figure 413. Adding a new region

5. Select “Context sharing (M7, M4)”, automatically another region is created with the
same name, start address, and size

6. Select the Project Manager tab.

7. Give a name to the project and press the Generate Code button.

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OPENAMP activation when using H7 dual-core:

8. OPENAMP activation
– Configure the NVIC1 and 2 and select their related HSEM global interrupts.
– Activate the Middleware OPENAMP_M4.
– MMT will create 2 application regions for each core. The Master regions are
defined by attribute mode.

Figure 414. Configure the NVIC1, NVIC2 and select their HSEM global interrupt

Figure 415. OPENAMP_M7 parameters settings

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Figure 416. OPENAMP_M4 parameters settings

Figure 417. The reserved memory regions for OPENAMP using MMT

9. Press the Generate Code button to generate code for both applications.

Apply Application Regions settings to linker files

When the second radio button is on, the linker scripts for the CM7 and CM4 projects are
generated considering the configuration.

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Figure 418. Linker files update(stm32h755xxx_flash_cm4.icf)

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Figure 419. Linker files update(stm32h755xxx_flash_cm7.icf)

The middleware can be enabled or disabled:

• If disabled, it automatically chooses the configured memory along with the associated
driver and sets the execution memory location in the linker file.
• If enabled, the two regions and corresponding 'export symbol' must be added in the
generated linker file.
After the code generation, navigate to the generated folder to check the linker file updates.

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An example of MMT configuration of the ETH IP on the STM32H755XIH6TR

MCU
1. Activate the IP ETH:

Figure 420. Configuration of ETH IP

– MMT is going to create 3 application regions for each Core.

Figure 421. ETH MMT region

– To change the start address and the size of each region, update the ETH
parameters.
2. press the radio button “Apply Application region Settings to Peripherals ON” then ETH
will be partially under MMT control.
3. Press the Generate Code button to generate code for both applications.

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Figure 422. IP configuration

Apply Application Regions settings to linker files:

4. When this button is on, the linker scripts for the CM7 project and CM4 project are
generated, considering the configuration.
5. After the code generation, navigate to the generated folder:
– Under the CM7 Project, open the linker definition file.
– Under the Memories definition you can see the defined memories with their start
address and length, according to the configuration made in STM32CubeMX.

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Figure 423. The defined memories under the linker file (Cortex-M7)

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Figure 424. The defined memories under the linker file (Cortex-M4)

5.5.6 STM32H7RS
Feature: MMT usage, pinout, and configuration user interface
When the first toggle button is ON, Cortex-M7_BOOT (MPU) and Cortex-M7_APPLI (MPU)
are under MMT control: their modes and parameters become read-only.

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Figure 425. MMT usage

Feature: MMT usage and linker script

Linker files content is generated according to the configuration of application regions.

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Only “Boot” and “Appli” contexts are managed by the MMT. Each context has its own
application region (AppReg0 and AppReg1, respectively).

User interface

Figure 426. Default settings

The middle panel represents the memory, split into three columns: the left one is the
memory seen by the core(s), the middle one the memory set-up for the application in
Context Boot, the right one the memory set-up for the application in the Context Appli.
For the new project created under STM32CubeMX, the tool creates the default application
region to generate a valid project.

Region information
Clicking on a particular region in the Application Regions column shows the associated
details on the left hand side.
STM32CubeMX automatically adds a 4 Gbytes region for the system core, even if you are
not planning to use the MMT.

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1. Choose a supported MCU (the following example is based on STM32H7R3A8I6).

Figure 427. Choose an STM32H7R product

2. Click on the Start Project button, then choose “Yes” on the “Memory Protection Unit for
Cortex-M7” dialog box.

Figure 428. Initialization dialogue

STM32CubeMX applies the default configuration, then adds a 4-Gbyte region called
“Region 0” under the CORTEX_M7_BOOT parameters, and a 4-Gbyte region called
“Region 0” under the CORTEX_M7_APPLI parameters. The two regions start at the
same address, adjust it to avoid overlap.
The new parameters can be checked using the Pinout and Configuration tab.

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Figure 429. Region0 added

3. Select the Tools tab:

a) Choose Memory Management
b) Activate the Memory Management Tool support by clicking on “Apply Application
Regions Settings to Peripherals”

Figure 430. Activate Memory Management support

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4. Select the Project Manager tab

5. Give a name to the project and press the Generate Code button: a warning message is
displayed.

Figure 431. Warning message

The flash region overlap issue can be solved in different ways, the preferred one goes
through the following steps:
a) Select the Pinout and configuration tab
b) Enable XSPI1 for the boot context and choose the ‘Single SPI’ mode

Figure 432. Configure the XSPI

c) Activate the Middleware EXTMEM_MANAGER for the boot context:

> MMT solves the issue
> Press the Generate Code button to generate code for both applications. The
overlap message does not appear any longer.

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Figure 433. EXT_MEM_MANAGER

Code generation configuration

The application regions settings can be applied to peripherals on the left-hand side of the
screen. The concerned peripherals are shown on the associated tooltip. This can impact
their availability on the pinout screen configuration.

Figure 434. Tooltip

In this example, on the Pinout & Configuration panel, Cortex-M7_BOOT (MPU) and
Cortex-M7_APPLI (MPU) are set and correspond to the region configuration on the Memory
Management Tool. They are grayed out, as they cannot be modified.

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Figure 435. IP configuration

Apply Application Regions settings to linker files

When this button is on, the linker scripts for the Boot project and Appli project are
generated, taking into account the configuration.

Figure 436. Linker files update

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Figure 437. Memory assignment for context Boot H7RS

EXTMEM_MANAGER when using H7Rx/H7Sx

The middleware can be used with the “Select boot code generation” disabled or enabled.
If disabled, MMT automatically chooses the configured memory along with the associated
driver, and sets the execution memory location in the linker file. This is the most
straightforward way of configuring an external memory.
If enabled, by activating the “Select boot code generation” you can choose “Execute in
Place” or “Load and Run”
• Execute in Place chooses and configures the memory zones
• Load and Run lets the user choose source, destination memory, and addresses to
jump to. The configuration is translated into the linker file. The user must provide the
source and destination addresses.

Figure 438. EXTMEM_MANAGER “Select boot code generation” disabled

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Figure 439. Execute In Place

Figure 440. MMT Execute In Place

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Figure 441. Load and Run

Figure 442. MMT Load and Run

After the code generation, navigate to the generated folder.

• Under the boot Project, open the linker definition file.
• Under the Memories definition you can see the defined memories with their start
address and length, according to the configuration made in STM32CubeMX.

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Figure 443. Linker files

Three option bytes can be used to configure the regions in the MMT. To see them, activate
the IP FLASH on the Pinout and Configuration tab.

Figure 444. Flash option bytes

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The option bytes interacting with the MMT are:

• ECC_ON_SRAM:
– Linked to the AXI SRAM4 region on the MMT
– When value is “disable” or “no update”, the AXI SRAM4 region size is set to 72 KB
– When value is set to “enable” the AXI SRAM4 region is removed
• DTCM_AXI_SHARED:
– Linked to the AXI SRAM3 region on the MMT
– When set to 0 or 3, the AXI SRAM3 region size is set to 128 KB, and the size of
region named DTCM is set to 64 KB
– When set to 1, the AXI SRAM3 region size is set to 64 KB, and the size of region
named DTCM is set to 128 KB
– When set to 2, the AXI SRAM3 region is removed, and the size of region named
DTCM is set to 192 KB
• ITCM_AXI_SHARED:
– Linked to the AXI SRAM1 region on the MMT
– When set to 0 or 3, the AXI SRAM1 region size is set to 128 KB
– When set to 1, the AXI SRAM1 region size is set to 64 KB
– When set to 2, the AXI SRAM1 region size is removed

Figure 445. ECC_ON_SRAM enabled and DTCM_AXI_SHARED set to 2

5.5.7 STM32WB0
Feature: MMT usage, pinout, and configuration user interface
When the first toggle button is ON, Cortex-M0+ (MPU) is under MMT control: its modes and
parameters become read-only (see Figure 446).

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Figure 446. MMT usage

User interface
The middle panel represents the memory, split into two columns: the left one is the memory
seen by the core Cortex-M0+, the right one the memory set-up for the application.

Figure 447. User interface

For a new project created under STM32CubeMX, the MMT creates the default application
region to generate a valid project.

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Apply Application Regions settings to linker files

When this button is on, the linker scripts for the project are generated, considering the
configuration.
• The REGION_ROM is a default code region used in linker.
• The linker file copies the STM32Cube firmware linkers files and only MMT region is
updated or added.
• OTA tag is not managed by MMT and usually exists in the linker file.

Figure 448. Linker files update

Impact on STM32WB09 RADIO

When this IP is activated, a reserved region “Blue Core Config” calculated by value of
CFG_NUM_RADIO_TASKS, which varies from 1 to 128, is added.

Figure 449. Impact on RADIO (STM32WB09)

5.5.8 Notification MMT/boot path (STM32H7RS and STM32H5)

After the activation of boot path and MMT, all regions of MMT are deleted and replaced by
the regions of Boot path in Appli context.
In this example, we use the boot path OEM-iRoT for STM32H7RS and for STM32H5.

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Figure 450. MMT/boot path (STM32H7RS)

Figure 451. MMT/boot path (STM32H5)

The linker files are copied from STM32Cube firmware of boot path, and MMT integrates all
added application regions ("App_User").
• Open the linker files STM32H7S3I8KX_OEMiROT_Appli_app.ld or
STM32H523CETX_FLASH.ld (respectively, left or right side of Figure 452)
• Look at the memory definition: check the "App_User" declaration in the Appli project in
case of an OEM-iRoT boot path (see Figure 453 and Figure 454).

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Figure 452. Linker files location (STM32H7RS on the left, STM32H5 on the right)

Figure 453. App_User declaration (STM32H7RS)

Figure 454. App_User declaration (STM32H5)

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6 STM32CubeMX C Code generation overview

6.1 STM32Cube code generation using only HAL drivers

(default mode)
During the C code generation process, STM32CubeMX performs the following actions:
1. If it is missing, it downloads the relevant STM32Cube MCU package from the user
repository. STM32CubeMX repository folder is specified in the Help > Updater
settings menu.
2. It copies from the firmware package, the relevant files in Drivers/CMSIS and
Drivers/STM32F4_HAL_Driver folders and in the Middleware folder if a middleware
was selected.
3. It generates the initialization C code ( .c/.h files) corresponding to the user MCU
configuration and stores it in the Inc and Src folders. By default, the following files are
included:
– stm32f4xx_hal_conf.h file: this file defines the enabled HAL modules and sets
some parameters (e.g. External High Speed oscillator frequency) to predefined
default values or according to user configuration (clock tree).
– stm32f4xx_hal_msp.c (MSP = MCU Support package): this file defines all
initialization functions to configure the peripheral instances according to the user
configuration (pin allocation, enabling of clock, use of DMA and Interrupts).
– main.c is in charge of:
Resetting the MCU to a known state by calling the HAL_init() function that resets
all peripherals, initializes the flash memory interface and the SysTick.
Configuring and initializing the system clock.
Configuring and initializing the GPIOs that are not used by peripherals.
Defining and calling, for each configured peripheral, a peripheral initialization
function that defines a handle structure that will be passed to the corresponding
peripheral HAL init function which in turn will call the peripheral HAL MSP
initialization function. Note that when LwIP (respectively USB) middleware is used,
the initialization C code for the underlying Ethernet (respectively USB peripheral)
is moved from main.c to LwIP (respectively USB) initialization C code itself.
– main.h file:
This file contains the define statements corresponding to the pin labels set from
the Pinout tab, as well as the user project constants added from the
Configuration tab (refer to Figure 455 and Figure 456 for examples):
#define MyTimeOut 10
#define LD4_Pin GPIO_PIN_12
#define LD4_GPIO_Port GPIOD
#define LD3_Pin GPIO_PIN_13
#define LD3_GPIO_Port GPIOD
#define LD5_Pin GPIO_PIN_14
#define LD5_GPIO_Port GPIOD
#define LD6_Pin GPIO_PIN_15
#define LD6_GPIO_Port GPIOD

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Figure 455. Labels for pins generating define statements

Figure 456. User constant generating define statements

In case of duplicate labels, a unique suffix, consisting of the pin port letter and the
pin index number, is added and used for the generation of the associated define
statements.
In the example of a duplicate I2C1 labels shown in Figure 457, the code
generation produces the following code, keeping the I2C1 label on the original port
B pin 6 define statements and adding B7 suffix on pin 7 define statements:

#define I2C1_Pin GPIO_PIN_6

#define I2C1_GPIO_Port GPIOB
#define I2C1B7_Pin GPIO_PIN_7
#define I2C1B7_GPIO_Port GPIOB

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Figure 457. Duplicate labels

In order for the generated project to compile, define statements shall follow strict
naming conventions. They shall start with a letter or an underscore as well as the
corresponding label. In addition, they shall not include any special character such
as minus sign, parenthesis or brackets. Any special character within the label is
replaced by an underscore in the define name.
If the label contains character strings between “[]” or “()”, only the first string listed
is used for the define name. As an example, the label “LD6 [Blue Led]”
corresponds the following define statements:
#define LD6_Pin GPIO_PIN_15
#define LD6_GPIO_Port GPIOD
The define statements are used to configure the GPIOs in the generated
initialization code. In the following example, the initialization of the pins labeled
Audio_RST_Pin and LD4_Pin is done using the corresponding define statements:
/*Configure GPIO pins : LD4_Pin Audio_RST_Pin */
GPIO_InitStruct.Pin = LD4_Pin | Audio_RST_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);

4. Finally it generates a Projects folder that contains the toolchain specific files that match
the user project settings. Double-clicking the IDE specific project file launches the IDE
and loads the project ready to be edited, built and debugged.

6.2 STM32Cube code generation using Low Layer drivers

For all STM32 series except STM32H7 and STM32P1, STM32CubeMX allows the user to
generate peripheral initialization code based either on the peripheral HAL driver or on the
peripheral Low Layer (LL) driver.
The choice is made through the Project Manager view (see Section 4.11.3: Advanced
Settings tab).
The LL drivers are available only for the peripherals which require an optimized access and
do not have a complex software configuration. The LL services allow performing atomic
operations by changing the relevant peripheral registers content:
• Examples of supported peripherals: RCC, ADC, GPIO, I2C, SPI, TIM, USART,…
• Examples of peripherals not supported by LL drivers: USB, SDMMC, FSMC.

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The LL drivers are available within the STM32CubeL4 package:

• They are located next to the HAL drivers (stm32l4_hal_<peripheral_name>) within
the Inc and Src directory of the
STM32Cube_FW_L4_V1.6\Drivers\STM32L4xx_HAL_Driver folder.
• They can be easily recognizable by their naming convention:
stm32l4_ll_<peripheral_name>
For more details on HAL and LL drivers refer to the STM32L4 HAL and Low-layer drivers
user manual (UM1884).
As the decision to use LL or HAL drivers is made on a peripheral basis, the user can mix
both HAL and LL drivers within the same project.
The following tables shows the main differences between the three possible
STM32CubeMX project generation options: HAL-only, LL-only, and mix of HAL and LL code.

Table 21. LL versus HAL code generation: drivers included in STM32CubeMX projects
Project configuration and Mix of HAL
HAL only LL only Comments
drivers to be included and LL

CMSIS Yes Yes Yes -

Only the driver files required for a
given configuration (selection of
peripherals) are copied when the
Only HAL Only LL Mix of HAL and project settings option is set to
STM32xxx_HAL_Driver
driver files driver files LL driver files “Copy only the necessary files”.
Otherwise (“all used libraries”
option) the complete set of driver
files is copied.

Table 22. LL versus HAL code generation: STM32CubeMX generated header files
Generated Mix of HAL
HAL only LL only Comments
header files and LL

This file contains the include statements and

main.h Yes Yes Yes the generated define statements for user
constants (GPIO labels and user constants).
This file enables the HAL modules necessary to
stm32xxx_hal_conf.h Yes No Yes
the project.
stm32xxx_it.h Yes Yes Yes Header file for interrupt handlers
This file contains the assert macros and the
stm32xx_assert.h No Yes Yes functions used for checking function
parameters.

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Table 23. LL versus HAL: STM32CubeMX generated source files

Generated source files HAL only LL only Mix of HAL and LL Comments

Contains the main functions and, optionally,

main.c Yes Yes Yes
STM32CubeMX generated functions.
Contains the following functions:
– HAL_MspInit
– for peripherals using HAL drivers:
stm32xxx_hal_msp.c Yes No Yes HAL_<Peripheral>_MspInit,
HAL_<Peripheral>_MspDeInit,
These functions are available only for the
peripherals that use HAL drivers.
stm32xxx_it.c Yes Yes Yes Source file for interrupt handlers

Table 24. LL versus HAL: STM32CubeMX generated functions and function calls
Generated
HAL only LL only Mix of HAL and LL Comments
source files

This file performs the

following functions:
– Configuration of flash
memory prefetch and
instruction and data
caches
Hal_init() Called in main.c Not used Called in main.c
– Selection of the SysTick
timer as timebase source
– Setting of NVIC group
priority
– MCU low-level
initialization.

Generated in Generated in This function performs the

Hal_msp_init() stm32xxx_hal_msp.c Not used stm32xxx_hal_msp.c peripheral resources
and called by HAL_init() And called by HAL_init() configuration(1).

– When HAL driver is

selected for the
<Peripheral>, function
generation and calls
are done following [1]:
Peripheral
This file takes care of the
[2]: Peripheral and configuration and call
peripherals configuration.
peripheral resource to
[1]: Peripheral configuration(1) HAL_<Peripheral>_In
MX_<Peripheral>_Init() configuration and call to using LL functions it() When the LL driver is
selected for the
HAL_<Peripheral>_Init() – When LL driver
<Peripheral>, it also
Call to selected for the
performs the peripheral
LL_Peripheral_Init() <Peripheral>, function
resources configuration(1).
generation and calls
are done following [2]:
Peripheral and
peripheral resource
configuration using LL
functions

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Table 24. LL versus HAL: STM32CubeMX generated functions and function calls (continued)
Generated
HAL only LL only Mix of HAL and LL Comments
source files

Only HAL driver can be

selected for the
<Peripheral>: function
[3]: Generated in
generation and calls are
stm32xxx_hal_msp.c
HAL_<Peripheral> done following [3]: Peripheral resources
when HAL driver Not used
_MspInit() Generated in configuration(1)
selected for the
stm32xxx_hal_msp.c
<Peripheral>
when HAL driver
selected for the
<Peripheral>

Only HAL driver can be

selected for the
<Peripheral>: function
[4]: Generated in
generation and calls are
stm32xxx_hal_msp.c
HAL_<Peripheral> done following [4]: This function can be used to
when HAL driver Not used
_MspDeInit() Generated in free peripheral resources.
selected for the
stm32xxx_hal_msp.c
<Peripheral>
when HAL driver
selected for the
<Peripheral>

1. Peripheral resources include:

- peripheral clock
- pinout configuration (GPIOs)
- peripheral DMA requests
- peripheral Interrupt requests and priorities.

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Figure 458. HAL-based peripheral initialization: usart.c code snippet

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Figure 459. LL-based peripheral initialization: usart.c code snippet

Figure 460. HAL versus LL: main.c code snippet

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6.3 Custom code generation

STM32CubeMX supports custom code generation by means of a FreeMarker template
engine (see http://www.freemarker.org).

6.3.1 STM32CubeMX data model for FreeMarker user templates

STM32CubeMX can generate a custom code based on a FreeMarker template file (.ftl
extension) for any of the following MCU configuration information:
• List of MCU peripherals used by the user configuration
• List of parameters values for those peripherals
• List of resources used by these peripherals: GPIO, DMA requests and interrupts.
The user template file must be compatible with STM32CubeMX data model. This means
that the template must start with the following lines:
[#ftl]
[#list configs as dt]
[#assign data = dt]
[#assign peripheralParams =dt.peripheralParams]
[#assign peripheralGPIOParams =dt.peripheralGPIOParams]
[#assign usedIPs =dt.usedIPs]
and end with
[/#list]
A sample template file is provided for guidance (see Figure 461).
STM32CubeMX will also generate user-specific code if any is available within the template.
As shown in the below example, when the sample template is used, the ftl commands are
provided as comments next to the data they have generated:
FreeMarker command in template:
${peripheralParams.get("RCC").get("LSI_VALUE")}
Resulting generated code:
LSI_VALUE : 32000 [peripheralParams.get("RCC").get("LSI_VALUE")]

Figure 461. Default content of the extra_templates folder

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6.3.2 Saving and selecting user templates

The user can either place the FreeMarker template files under STM32CubeMX installation
path within the db/extra_templates folder or in any other folder.
Then for a given project, the user will select the template files relevant for its project via the
Template Settings window accessible from the Code Generator Tab in the Project
Manager view menu (see Section 4.11)

6.3.3 Custom code generation

To generate custom code, the user must place the FreeMarker template file under
STM32CubeMX installation path within the db/extra_templates folder (see Figure 462).
The template filename must follow the naming convention <user filename>_<file
extension>.ftl in order to generate the corresponding custom file as <user filename>.<file
extension>.
By default, the custom file is generated in the user project root folder, next to the .ioc file
(see Figure 463).
To generate the custom code in a different folder, the user shall match the destination folder
tree structure in the extra_template folder (see Figure 464).

Figure 462. extra_templates folder with user templates

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Figure 463. Project root folder with corresponding custom generated files

Figure 464. User custom folder for templates

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Figure 465. Custom folder with corresponding custom generated files

6.4 Additional settings for C project generation

STM32CubeMX allows specifying additional project settings through the .extSettings file.
This file must be placed in the same project folder and at the same level as the .ioc file.
As an example, additional settings can be used when external tools call STM32CubeMX to
generate the project and require specific project settings.

Possible entries and syntax

All entries are optional. They are organized under the followings three categories:
ProjectFiles, Groups or Others.
• [ProjectFiles]: section where to specify additional include directories
Syntax
HeaderPath = <include directory 1 path>;< include directory 2 path >
Example
HeaderPath=../../IIR_Filter_int32/Inc ;
• [Groups]: section where to create new groups of files and/or add files to a group
Syntax
<Group name> = <file pathname1>;< file pathname2>
Example
Doc=$ PROJ_DIR$\..\readme.txt
Lib=C:\libraries\mylib1.lib; C:\libraries\mylib2.lib;
Drivers/BSP/MyRefBoard = C:\MyRefBoard\BSP\board_init.c;
C:\MyRefBoard\BSP\board_init.h;
• [Others] section where to enable HAL modules and/or specify preprocessor define
statements
– Enabling pre-processor define statements
Preprocessor define statements can be specified using the following syntax after
the [Others] line:
Syntax
Define = <define1_name>;<define2_name>
Example

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Define= USE_STM32F429I_DISCO
– Enabling HAL modules in generated stm32f4xx_hal_conf.h
HAL modules can be enabled using the following syntax after the [Others] line:
Syntax
HALModule = <ModuleName1>; <ModuleName1>;
Example
HALModule=I2S;I2C

.extSettings file example and generated outcomes

For the purpose of the example, a new project is created by selecting the
STM32F429I-DISCO board from STM32CubeMX board selector. The EWARM toolchain is
selected in the Project tab of the Project Manager view. The project is saved as
MyF429IDiscoProject. In the project folder, next to the generated .ioc file, a .extSettings text
file is placed with the following contents:

[Groups]
Drivers/BSP/STM32F429IDISCO=C:\Users\frq09031\STM32Cube\Repository\STM3
2Cube_FW_F4_V1.14.0\Drivers\BSP\STM32F429I-
Discovery\stm32f429i_discovery.c;
C:\Users\frq09031\STM32Cube\Repository\STM32Cube_FW_F4_V1.14.0\Drivers\
BSP\STM32F429I-Discovery\stm32f429i_discovery.h
Lib=C:\Users\frq09031\STM32Cube\Repository\STM32Cube_FW_F4_V1.14.0\
Middlewares\Third_Party\FreeRTOS\Source\portable\IAR\ARM_CM4F\portasm.s
Doc=$PROJ_DIR$\..\readme.txt

[Others]
Define = USE_ STM32F429I_DISCO
HALModule = UART;SPI

Upon project generation, the presence of this .extSettings file triggers the update of:
• the project MyF429IDiscoProject.ewp file in EWARM folder (see Figure 466)
• the stm32f4xx_hal_conf.h file in the project Inc folder (see Figure 467)
• the project view within EWARM user interface as shown in Figure 468 and Figure 469.

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Figure 466. Update of the project .ewp file (EWARM IDE)

for preprocessor define statements

Figure 467. Update of stm32f4xx_hal_conf.h file to enable selected modules

Figure 468. New groups and new files added to groups in EWARM IDE

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Figure 469. Preprocessor define statements in EWARM IDE

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7 Code generation for dual-core MCUs

(STM32H7 dual-core product lines only)

For working with Arm Cortex-M dual-core products, STM32CubeMX generates code for
both cores automatically according to the context assignment and initializer choices made in
the user interface (see Section 4.8: Pinout & Configuration view for STM32H7 dual-core
products for details).

Figure 470. Code generation for STM32H7 dual-core devices

Generated initialization code

The code is generated in CM4, CM7 and Common folders. The Common folder holds the
system_stm32h7xx.c, that contains the clock tree settings.
When a peripheral or middleware is assigned to both contexts, the function
MX_<name>_init will be generated for both contexts but will be called only from the
initializer side.

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Generated startup and linker files

Each configuration (_M4 or _M7) of the project shall come with a startup file and a linker file,
each suffixed with _M4 or _M7 respectively.

Figure 471. Startup and linker files for STM32H7 dual-core devices

Generated boot mode code

STM32CubeMX supports only one mode of boot for now, where both ARM Cortex-M cores
boot at once.
The other boot modes will be introduced later as a project option in the project manager
view:
• Arm Cortex-M7 core booting, Arm Cortex-M4 gated
• Arm Cortex-M4 core booting, Arm Cortex-M7 gated
• A first core booting executing from flash, loads the second core code to the SRAM then
enables the second core to boot.
STM32CubeMX uses template files delivered with STM32CubeH7 MCU packages as
reference.

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8 Code generation with TrustZone® enabled (STM32L5

series only)

In STM32CubeMX project manager view, all project generation options remain available.
However, the choice of toolchains is limited to the IDEs/compilers supporting the
Cortex®-M33 core:
• EWARM v8.32 or higher
• MDK-ARM v5.27 or higher (ARM compiler 6)
• STM32CubeIDE (GCC v4.2 or higher)
• Makefile (GCC v4.2 or higher)
Upon product selection, STM32CubeMX requires to choose between enabling TrustZone®
or not.
• When TrustZone® is enabled, STM32CubeMX generates two C projects: one secured
and one non-secured. After compilation, two images are available for download, one
for each context.
• When TrustZone® is disabled, STM32CubeMX generates a non-secured C project, as
for other products not supporting it.

Specificities
When TrustZone® is enabled, the project generation must be adjusted to ensure that secure
and nonsecure images can be built.

Figure 472. Building secure and nonsecure images with ARMv8-M TrustZone®

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When TrustZone® is enabled for the project, STM32CubeMX generates three folders:
• NonSecure for nonsecure code
• Secure for secure code
• Secure_nsclib for nonsecure callable region
See Figure 473 (use TZ_BasicStructure_project_inCubeIDE.png) and Figure 474 (use
STM32L5_STM32CubeMX_Project_settings_inCubeIDE.png).

Figure 473. Project explorer view for STM32L5 TrustZone® enabled projects

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Figure 474. Project settings for STM32CubeIDE toolchain

STM32CubeMX also generates specific files, detailed in Table 25.

Table 25. Files generated when TrustZone® is enabled

File Folder Details

Initial setup for secure/nonsecure zones for

ARMCM33 based on CMSIS CORE V5.3.1
The product core secure/nonsecure partition_ARMCM33.h Template.
partitioning .h “template” file Secure It initializes Security attribution unit (SAU)
Example: partition_stm32l552xx.h CTRL register, setup behavior of Sleep and
Exception Handling, Floating Point Unit and
Interrupt Target.
Must be filled by the user with the list of
nonsecure callable APIs.
secure_nsc.h file Secure_nsclib Templates are available as reference in
STM32L5Cube embedded software package
in Templates\TrustZone®\Secure_nsclib
folders.
CMSIS Cortex-M33 device peripheral access
layer system source file to be used in secure
System_stm32l5xx_s.c Secure
application when the system implements
security.

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Table 25. Files generated when TrustZone® is enabled (continued)

File Folder Details

CMSIS Cortex-M33 device peripheral access

layer system source file to be used in
System_stm32l5xx_ns.c NonSecure
nonsecure application when the system
implements security.
Linker files for the secure and nonsecure
STM32L562CETX_FLASH
memory layouts.
STM32L562CETX_RAM
Secure, File extensions and naming conventions:
or
NonSecure – .icf (EWARM)
STM32L552CETX_FLASH
– .sct (MDK-ARM), or
STM32L552CETX_RAM
– .ld (GCC compiler toolchains)

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9 Device tree generation (STM32MPUs only)

The Device tree in Linux is used to provide a way to describe non-discoverable hardware.
STMicroelectronics is widely using the device tree for all the platform configuration data,
including DDR configuration.
Linux developers can manually edit device tree source files (dts), but as an alternative
STM32CubeMX offers a partial device-tree generation service to reduce effort and to ease
new comers. STM32CubeMX intends to generate partially device trees corresponding to
board level configuration. Partial means that the entire (board level) device-trees are not
generated, but only main sections that usually imply huge efforts and can cause compilation
errors and dysfunction:
• folders structure and files to folders distribution
• dtsi and headers inclusions
• pinCtrl and clocks generation
• System-On-Chip device nodes positioning
• multi-core related configurations (Etzpc binding, resources manager binding,
peripherals assignment)

9.1 Device tree overview

To run properly, any piece of software needs to get the hardware description of the platform
on which it is executed, including the kind of CPU, the memory size and the pin
configuration. OpenSTLinux firmware has put such non-discoverable hardware description
in a separate binary, the device tree blob (dtb). The device tree blob is compiled from the
device tree source files (dts) using the dtc compiler provided with the OpenSTLinux
distribution.
The device tree structure consist of a board level file (.dts) that includes two device tree
source include files (.dtsi): a soc level file and a –pinctrl file, that lists the pin muxing
configurations.
The device tree structure is very close to C language multiple level structures with the
“root” (/) being the highest level then “peripherals” being sub-nodes described further in the
hierarchy (see figures 475, 476 and 477).
STM32CubeMX generation uses widely overloading mechanisms to complete or change
some SOC devices definitions when user configurations require it.

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Figure 475. STM32CubeMX generated DTS – Extract 1

Figure 476. STM32CubeMX generated DTS – Extract 2

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Figure 477. STM32CubeMX generated DTS – Extract 3

For more details refer to “Device Tree for Dummies” from Thomas Petazzoni, available on
https://elinux.org.
For more information about STM32MPUs device tree specificities, refer to ST Wiki
https://wiki.st.com/stm32mpu.

9.2 STM32CubeMX Device tree generation

For STM32MPUs, STM32CubeMX code generation feature has been extended to generate
Device trees (DT) configuring the firmware.
DTS generation is accessible through the same button.

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The DT generation path can be configured from the Project Manager view, in the Advanced
Settings tab, under OpenSTLinux Settings (see Figure 478). For each Device tree
STM32CubeMX generates Device tree source (DTS) files.

Figure 478. Project settings to configure Device tree path

The Device tree structure consists of:

• a complete clock-tree
• a complete pin control
• a complete multi-cores references definition
• a set of device nodes and sub-nodes
• user sections that can be filled to have complete and bootable Device trees (contents
are not lost at next generation).
The generated DTS files reflect the user configuration, such as the assignment of
peripherals to runtime contexts and boot loaders, or clock tree settings.
STM32CubeMX DT generation ensures the coherency between the different DTs.
Additionally, it generates the DDR configuration file as part of the boot loader Device trees.
These files, along with the files they include, are compiled to create the device tree blob for
the targeted firmware.
The STM32CubeMX Device tree structure depends upon the targeted firmware and, in a
few cases, upon the OpenSTLinux manifest version and/or the MPU family. The structures
are detailed in https://wiki.st.com/stm32mpu/wiki/Category:Platform_configuration.
The device tree nodes generated by STM32CubeMX can be completed by filling the user
sections following the device tree bindings of the different firmware.
Note: To continue the process and learn how to use the generated files, see the dedicated Wiki
pages for MPUs.

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10 Support of additional software components using

CMSIS-Pack standard

The CMSIS-Pack standard describes a delivery mechanism for software components,

device parameters, and evaluation board support.
The XML-based package description (pdsc) file describes the content of a software pack
(file collection). It includes source code, header files, software libraries, documentation and
source code templates. A software pack consists of the complete file collection along with
the pdsc file, shipped in ZIP-format. After installing a software pack, all the included software
components are available to the development tools.
A software component is a collection of source modules, header and configuration files as
well as libraries. Packs containing software components can also include example projects
and user code templates.
Refer to http://www.keil.com website for more details.
STM32CubeMX supports third-party and other STMicroelectronics embedded software
solutions, delivered as software packs. STM32CubeMX enables to:
1. Install software packs and check for updates (see Section 3.4.5).
2. Select software components for the current project (see Section 4.15). Once this is
done, the selected components appear in the tree view (see Figure 479).
3. Enable the software component from the tree view (see Figure 480). Use contextual
help to get more details on the selection.
4. Configure software components (see Figure 480). This function is possible only for
components coming with files in STM32CubeMX proprietary format.
5. Generate the C project for selected toolchains (see Figure 481).
a) Software components files are automatically copied to the project.
b) Software component configuration and initialization code are automatically
generated. This function is possible only for components coming with files in
STM32CubeMX proprietary format.

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Figure 479. Selecting a CMSIS-Pack software component

Figure 480. Enabling and configuring a CMSIS-Pack software component

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Figure 481. Project generated with CMSIS-Pack software component

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11 Tutorial 1: From pinout to project C code generation

using an MCU of the STM32F4 series

This section describes the configuration and C code generation process. It takes as an
example a simple LED toggling application running on the STM32F4DISCOVERY board.

11.1 Creating a new STM32CubeMX Project

1. Select File > New project from the main menu bar or New project from the Home
page.
2. Select the MCU Selector tab and filter down the STM32 portfolio by selecting
STM32F4 as 'Series', STM32F407 as 'Lines', and LQFP100 as 'Package’ (see
Figure 482).
3. Select the STM32F407VGTx from the MCU list and click OK.

Figure 482. MCU selection

STM32CubeMX views are then populated with the selected MCU database (Figure 483).
Optionally, remove the MCUs Selection bottom window by deselecting Window > Outputs
submenu (see Figure 484).

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Figure 483. Pinout view with MCUs selection

Figure 484. Pinout view without MCUs selection window

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11.2 Configuring the MCU pinout

For a detailed description of menus, advanced actions and conflict resolutions, refer to
Section 4 and Appendix A.
1. By default, STM32CubeMX shows the Pinout view.
2. By default, is unchecked allowing STM32CubeMX to
move the peripheral functions around and to find the optimal pin allocation, that is the
one that accommodates the maximum number of peripheral modes.
Since the MCU pin configurations must match the STM32F4DISCOVERY board,
enable for STM32CubeMX to maintain the peripheral function
allocation (mapping) to a given pin.
This setting is saved as a user preference in order to be restored when reopening the
tool or when loading another project.
3. Select the required peripherals and peripheral modes:
a) Configure the GPIO to output the signal on the STM32F4DISCOVERY green LED
by right-clicking PD12 from the Pinout view, then select GPIO_output:

Figure 485. GPIO pin configuration

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b) Enable a timer to be used as timebase for toggling the LED. This is done by
selecting Internal Clock as TIM3 clock source from the peripheral tree (see
Figure 486).

Figure 486. Timer configuration

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c) You can also configure the RCC to use an external oscillator as potential clock
source (see Figure 487).

Figure 487. Simple pinout configuration

This completes the pinout configuration for this example.

Note: Starting with STM32CubeMX 4.2, the user can skip the pinout configuration by directly
loading ST Discovery board configuration from the Board selector tab.

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11.3 Saving the project

1. Click to save the project.
When saving for the first time, select a destination folder and filename for the project.
The .ioc extension is added automatically to indicate this is an STM32CubeMX
configuration file.

Figure 488. Save Project As window

2. Click to save the project under a different name or location.

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11.4 Generating the report

Reports can be generated at any time during the configuration:
1. Click to generate .pdf and .txt reports.
If a project file has not been created yet, a warning prompts the user to save the project
first and requests a project name and a destination folder (see Figure 489). An .ioc file
is then generated for the project along with a .pdf and .txt reports with the same name.

Figure 489. Generate Project Report - New project creation

Answering No will require to provide a name and location for the report only.
As shown in Figure 490, a confirmation message is displayed when the operation is
successful.

Figure 490. Generate Project Report - Project successfully created

2. Open the .pdf report using Adobe Reader or the .txt report using your favorite text
editor. The reports summarize all the settings and MCU configuration performed for the
project.

11.5 Configuring the MCU clock tree

The following sequence describes how to configure the clocks required by the application
based on an STM32F4 MCU.
STM32CubeMX automatically generates the system, CPU and AHB/APB bus frequencies
from the clock sources and prescalers selected by the user. Wrong settings are detected

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and highlighted in fuchsia through a dynamic validation of minimum and maximum

conditions. Useful tooltips provide a detailed description of the actions to undertake when
the settings are unavailable or wrong. User frequency selection can influence some
peripheral parameters (e.g. UART baud rate limitation).
STM32CubeMX uses the clock settings defined in the Clock tree view to generate the
initialization C code for each peripheral clock. Clock settings are performed in the generated
C code as part of RCC initialization within the project main.c and in stm32f4xx_hal_conf.h
(HSE, HSI and external clock values expressed in Hertz).
Follow the sequence below to configure the MCU clock tree:
1. Click the Clock Configuration tab to display the clock tree (see Figure 491).
The internal (HSI, LSI), system (SYSCLK) and peripheral clock frequency fields cannot
be edited. The system and peripheral clocks can be adjusted by selecting a clock
source, and optionally by using the PLL, prescalers and multipliers.

Figure 491. Clock tree view

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2. Select the clock source (HSE, HSI or PLLCLK) that will drive the system clock.
In the example taken for the tutorial, select HSI to use the internal 16 MHz clock (see
Figure 492).

Figure 492. HSI clock enabled

To use an external clock source (HSE or LSE), the RCC peripheral must be configured
in the Pinout view, as pins will be used to connect the external clock crystals (see
Figure 493).

Figure 493. HSE clock source disabled

Other clock configuration options for the STM32F4DISCOVERY board:

– Select the external HSE source and enter 8 in the HSE input frequency box since
an 8 MHz crystal is connected on the discovery board:

Figure 494. HSE clock source enabled

– Select the external PLL clock source and the HSI or HSE as the PLL input clock
source.

Figure 495. External PLL clock source enabled

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3. Keep the core and peripheral clocks to 16 MHz using HSI, no PLL and no prescaling.
Note: Optionally, further adjust the system and peripheral clocks using PLL, prescalers and
multipliers:
Other clock sources independent from the system clock can be configured as follows:
– USB OTG FS, RNG and SDIO clocks are driven by an independent PLL output.
– I2S peripherals come with their own internal clock (PLLI2S), alternatively derived
by an independent external clock source.
– USB OTG HS and Ethernet clocks are derived from an external source.
4. Optionally, configure the prescaler for the Microcontroller Clock Output (MCO) pins that
allow to output two clocks to the external circuit.
5. Click to save the project.
6. Go to the Configuration tab to proceed with the project configuration.

11.6 Configuring the MCU initialization parameters

Caution: The C code generated by STM32CubeMX covers the initialization of the MCU peripherals
and middlewares using the STM32Cube firmware libraries.

11.6.1 Initial conditions

From the Pinout & Configuration tab, select and configure (one by one) every component
(peripheral, middleware, additional software) required by the application using the Mode
and Configuration panels (see Figure 496).
Tooltips and warning messages are displayed when peripherals are not properly configured
(see Section 4 for details).
Note: The RCC peripheral initialization uses the parameter configuration done in this view as well
as the configuration done in the Clock tree view (clock source, frequencies, prescaler
values).

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Figure 496. Pinout & Configuration view

11.6.2 Configuring the peripherals

Each peripheral instance corresponds to a dedicated button in the main panel. Some
peripheral modes have no configurable parameters, as illustrated below.

Figure 497. Case of Peripheral and Middleware without configuration parameters

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Follow the steps below to proceed with peripheral configuration:

1. Click the peripheral button to open the corresponding configuration window.
In our example
a) click TIM3 to open the timer configuration window.

Figure 498. Timer 3 configuration window

b) with a 16 MHz APB clock (Clock tree view), set the prescaler to 16000 and the
counter period to 1000 to make the LED blink every millisecond.

Figure 499. Timer 3 configuration

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2. Optionally, and when available, select:

– The NVIC Settings tab to display the NVIC configuration and enable interruptions
for this peripheral.
– The DMA Settings tab to display the DMA configuration and to configure DMA
transfers for this peripheral.
In the tutorial example, the DMA is not used and the GPIO settings remain
unchanged. The interrupt is enabled, as shown in Figure 500.
– The GPIO Settings tab to display the GPIO configuration and to configure the
GPIOs for this peripheral.
– Insert an item:
– The User Constants tab to specify constants to be used in the project.

Figure 500. Enabling Timer 3 interrupt

11.6.3 Configuring the GPIOs

The user can adjust all pin configurations from this window. A small icon along with a tooltip
indicates the configuration status.

Figure 501. GPIO configuration color scheme and tooltip

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Follow the sequence below to configure the GPIOs:

1. Click the GPIO button in the Configuration view to open the Pin Configuration
window.
2. The first tab shows pins that have been assigned a GPIO mode, but not for a dedicated
peripheral and middleware. Select Pin Name to open the configuration for that pin.
In the tutorial example, select PD12 and configure it in output push-pull mode to drive
the STM32F4DISCOVERY LED (see Figure 502).

Figure 502. GPIO mode configuration

11.6.4 Configuring the DMAs

This is not required for this example. It is recommended to use DMA transfers to offload the
CPU. The DMA Configuration window provides a fast and easy way to configure the DMAs
(see Figure 503):
1. add a new DMA request and select among a list of possible configurations.
2. select among the available streams.
3. select the Direction: Memory to Peripheral or Peripheral to Memory.
4. select a Priority.
5. enable the FIFO.
Note: Configuring the DMA for a given peripheral and middleware can also be performed using
the Peripheral and Middleware configuration window.

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Figure 503. DMA parameters configuration window

11.6.5 Configuring the middleware

This is not required for the example taken for the tutorial.
If a peripheral is required for a middleware mode, the peripheral must be configured in the
Pinout view for the middleware mode to become available. A tooltip can guide the user as
shown below.

Figure 504. Middleware tooltip

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1. Configure the USB peripheral from the Pinout view.

Figure 505. USB Host configuration

2. Select MSC_FS class from USB Host middleware.

3. Select the checkbox to enable FatFs USB mode in the tree panel.

Figure 506. FatFs over USB mode enabled

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4. Select the Configuration view. FatFs and USB buttons are then displayed.

Figure 507. System view with FatFs and USB enabled

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5. FatFs and USB using default settings are already marked as configured . Click
FatFs and USB buttons to display default configuration settings. You can also change
them by following the guidelines provided at the bottom of the window.

Figure 508. FatFs define statements

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11.7 Generating a complete C project

11.7.1 Setting project options

Default project settings can be adjusted prior to C code generation as shown in Figure 509.
1. Select the Project Manager view to update project settings and generation options.
2. Select the Project Tab and choose a Project name, location, a toolchain and a
toolchain version to generate the project (see Figure 509).

Figure 509. Project Settings and toolchain selection

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3. Select the Code Generator tab to choose various C code generation options:
– The library files copied to Projects folder.
– C code regeneration (e.g. what is kept or backed up during C code regeneration).
– HAL specific action (for example, set all free pins as analog I/Os to reduce power
consumption).
In the tutorial example, select the settings as displayed in Figure 510, and click OK.
Note: A dialog window appears when the firmware package is missing. Go to next section for
explanation on how to download the firmware package.

Figure 510. Project Manager menu - Code Generator tab

11.7.2 Downloading firmware package and generating the C code

1. Click to generate the C code.
During C code generation, STM32CubeMX copies files from the relevant STM32Cube
MCU package into the project folder so that the project can be compiled. When
generating a project for the first time, the firmware package is not available on the user
PC and a warning message is displayed:

Figure 511. Missing firmware package warning message

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2. STM32CubeMX offers to download the relevant firmware package or to go on. Click

Download to obtain a complete project, that is a project ready to be used in the
selected IDE.
By clicking Continue, only Inc and Src folders will be created, holding STM32CubeMX
generated initialization files. The necessary firmware and middleware libraries will have
to be copied manually to obtain a complete project.
If the download fails, an error message is displayed.

Figure 512. Error during download

To solve this issue, execute the next two steps. Skip them otherwise.
3. Select Help > Updater Settings menu and adjust the connection parameters to match
your network configuration.

Figure 513. Updater settings for download

4. Click Check connection. The check mark turns green once the connection is
established.

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Figure 514. Updater settings with connection

5. Once the connection is functional, click to generate the C code.

The C code generation process starts and progress is displayed (see next figures).

Figure 515. Downloading the firmware package

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Figure 516. Unzipping the firmware package

6. Finally, a confirmation message is displayed to indicate that the C code generation has
been successful.

Figure 517. C code generation completion message

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7. Click Open Folder to display the generated project contents or click Open Project to
open the project directly in your IDE. Then proceed with Section 11.8.

Figure 518. C code generation output folder

The generated project contains:

• The STM32CubeMX .ioc project file located in the root folder. It contains the project
user configuration and settings generated through STM32CubeMX user interface.
• The Drivers and Middlewares folders hold copies of the firmware package files relevant
for the user configuration.
• The Projects folder contains IDE specific folders with all the files required for the project
development and debug within the IDE.
• The Inc and Src folders contain STM32CubeMX generated files for middleware,
peripheral and GPIO initialization, including the main.c file. The STM32CubeMX
generated files contain user-dedicated sections allowing to insert user-defined C code.
Caution: C code written within the user sections is preserved at next C code generation, while C code
written outside these sections is overwritten.
User C code will be lost if user sections are moved or if user sections delimiters are
renamed.

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11.8 Building and updating the C code project

This example explains how to use the generated initialization C code and complete the
project, within IAR™ EWARM toolchain, to have the LED blink according to the TIM3
frequency.
A folder is available for the toolchains selected for C code generation: the project can be
generated for more than one toolchain by choosing a different toolchain from the Project
Manager menu and clicking Generate code once again.
1. Open the project directly in the IDE toolchain by clicking Open Project from the dialog
window or by double-clicking the relevant IDE file available in the toolchain folder under
STM32CubeMX generated project directory (see Figure 517).

Figure 519. C code generation output: Projects folder

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2. As an example, select .eww file to load the project in the IAR™ EWARM IDE.

Figure 520. C code generation for EWARM

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3. Select the main.c file to open in editor.

Figure 521. STM32CubeMX generated project open in IAR™ IDE

The htim3 structure handler, system clock, GPIO and TIM3 initialization functions are
defined. The initialization functions are called in the main.c. For now the user C code
sections are empty.

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4. In the IAR™ IDE, right-click the project name and select Options.

Figure 522. IAR™ options

5. Click the ST-LINK category and make sure SWD is selected to communicate with the
STM32F4DISCOVERY board. Click OK.

Figure 523. SWD connection

6. Select Project > Rebuild all. Check if the project building has succeeded.

Figure 524. Project building log

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7. Add user C code in the dedicated user sections only.

Note: The main while(1) loop is placed in a user section.
For example:
a) Edit the main.c file.
b) To start timer 3, update User Section 2 with the following C code:

Figure 525. User Section 2

c) Then, add the following C code in User Section 4:

Figure 526. User Section 4

This C code implements the weak callback function defined in the HAL timer driver
(stm32f4xx_hal_tim.h) to toggle the GPIO pin driving the green LED when the
timer counter period has elapsed.

8. Rebuild and program your board using . Make sure the SWD ST-LINK option is
checked as a Project options otherwise board programming will fail.
9. Launch the program using . The green LED on the STM32F4DISCOVERY board
will blink every second.
10. To change the MCU configuration, go back to STM32CubeMX user interface,
implement the changes and regenerate the C code. The project will be updated,
preserving the C code in the user sections if option in
Project Manager’s Code Generator tab is enabled.

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11.9 Switching to another MCU

STM32CubeMX allows loading a project configuration on an MCU of the same series.
Proceed as follows:
1. Select File > New Project.
2. Select an MCU belonging to the same series. As an example, you can select the
STM32F429ZITx that is the core MCU of the 32F429IDISCOVERY board.
3. Select File > Import project. In the Import project window, browse to the .ioc file to
load. A message warns you that the currently selected MCU (STM32F429ZITx) differs
from the one specified in the .ioc file (STM32F407VGTx). Several import options are
proposed (see Figure 527).
4. Click the Try Import button and check the import status to verify if the import has been
successful.
5. Click OK to really import the project. An output tab is then displayed to report the import
results.
6. The green LED on 32F429IDISCOVERY board is connected to PG13: CTRL+ right
click PD12 and drag and drop it on PG13.
7. From Project Manager project tab configure the new project name and folder location.
Click Generate icon to save the project and generate the code.
8. Select Open the project from the dialog window, update the user sections with the
user code, making sure to update the GPIO settings for PG13. Build the project and
flash the board. Launch the program and check that LED blinks once per second.

Figure 527. Import Project menu

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12 Tutorial 2 - Example of FatFs on an SD card using

STM32429I-EVAL evaluation board

The tutorial consists in creating and writing to a file on the STM32429I-EVAL1 SD card using
the FatFs file system middleware.
To generate a project and run tutorial 2, follow the sequence below:
1. Launch STM32CubeMX.
2. Select File > New Project. The Project window opens.
3. Click the Board Selector Tab to display the list of ST boards.
4. Select EvalBoard as type of Board and STM32F4 as Series to filter down the list.
5. Answer Yes to Initialize all peripherals with their default mode so that the code is
generated only for the peripherals used by the application.
6. Select the STM32429I-EVAL board and click OK. Answer No in the dialog box asking
to initialize all peripherals to their default modes (see Figure 528). The Pinout view is
loaded, matching the MCU pinout configuration on the evaluation board (see
Figure 529).

Figure 528. Board peripheral initialization dialog box

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Figure 529. Board selection

7. From the Peripheral tree on the left, expand the SDIO peripheral and select “SD 4 bits
wide bus” (see Figure 530). In the configuration panel, from the DMA settings tab, add
SDIO_RX and SDIO_TX DMA requests.
8. Finally, go pack to the peripheral tree panel, select NVIC and enable the SDIO global
interrupt from the configuration panel.

Figure 530. SDIO peripheral configuration

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9. Under the Middlewares category, check SD card as FatFs mode (see Figure 531).

Figure 531. FatFs mode configuration

From the Pinout view on the right, enable, as GPIO input, a pin to be used for the SDIO
detection.
In the configuration panel below the mode panel, go to the platform settings tab and
configure the SD_detection using the pin previously enabled.
Finally, go to FatFs "Advanced settings tab" and enable "Use DMA template".
10. Configure the clocks as follows:
a) Select the RCC peripheral from the Pinout view (see Figure 532).

Figure 532. RCC peripheral configuration

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b) Configure the clock tree from the clock tab (see Figure 533).

Figure 533. Clock tree view

11. In the Project tab, specify the project name and destination folder. Then, select the
EWARM IDE toolchain.
Note that project heap and stack size can be adjusted to the minimum required for the
FATFS application.

Figure 534. FATFS tutorial - Project settings

12. Click Ok. Then, on the toolbar menu, click to generate the project.
13. Upon code generation completion, click Open Project in the Code Generation dialog
window (see Figure 535). This opens the project directly in the IDE.

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Figure 535. C code generation completion message

14. In the IDE, check that heap and stack sizes are sufficient: right click the project name
and select Options, then select Linker. Check Override default to use the icf file from
STM32CubeMX generated project folder. if not already done through STM32CubeMX
User interface (under Linker Settings from Project Manager's project tab), adjust the
heap and stack sizes (see Figure 536).

Figure 536. IDE workspace

Note: When using the MDK-Arm toolchain, go to the Application/MDK-ARM folder and
double-click the startup_xx.s file to edit and adjust the heap and stack sizes there.

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15. Go to the Application/User folder. Double-click the main.c file and edit it.
16. The tutorial consists in creating and writing to a file on the evaluation board SD card
using the FatFs file system middleware:
a) At startup all LEDs are OFF.
b) The red LED is turned ON to indicate that an error occurred (e.g. FatFs
initialization, file read/write access errors).
c) The orange LED is turned ON to indicate that the FatFs link has been successfully
mounted on the SD driver.
d) The blue LED is turned ON to indicate that the file has been successfully written to
the SD card.
e) The green LED is turned ON to indicate that the file has been successfully read
from file the SD card.
17. For use case implementation, update main.c with the following code:
a) Insert main.c private variables in a dedicated user code section:

/* USER CODE BEGIN PV */

/* Private variables ------------------------------------------*/
FATFS SDFatFs; /* File system object for SD card logical drive */
FIL MyFile; /* File object */
const char wtext[] = "Hello World!";
static uint8_t buffer[_MAX_SS]; /* a work buffer for the f_mkfs() */
/* USER CODE END PV */
b) Insert main functional local variables:
int main(void)
{

/* USER CODE BEGIN 1 */

FRESULT res; /* FatFs function common result code */
uint32_t byteswritten, bytesread; /* File write/read counts */
char rtext[256]; /* File read buffer */
/* USER CODE END 1 */

/* MCU Configuration----------------------------------------*/

/* Reset of all peripherals, Initializes the Flash interface and the

Systick. */
HAL_Init();
c) Insert user code in the main function, after initialization calls and before the while
loop, to perform actual read/write from/to the SD card:
int main(void)
{
….
MX_FATFS_Init();

/* USER CODE BEGIN 2 */

/*##-0- Turn all LEDs off(red, green, orange and blue) */
HAL_GPIO_WritePin(GPIOG, (GPIO_PIN_10 | GPIO_PIN_6 | GPIO_PIN_7 |
GPIO_PIN_12), GPIO_PIN_SET);
/*##-1- FatFS: Link the SD disk I/O driver ##########*/

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if(retSD == 0){
/* success: set the orange LED on */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_7, GPIO_PIN_RESET);
/*##-2- Register the file system object to the FatFs module ###*/
if(f_mount(&SDFatFs, (TCHAR const*)SDPath, 0) != FR_OK){
/* FatFs Initialization Error : set the red LED on */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET);
while(1);
} else {
/*##-3- Create a FAT file system (format) on the logical drive#*/
/* WARNING: Formatting the uSD card will delete all content on the
device */
if(f_mkfs((TCHAR const*)SDPath, FM_ANY, 0, buffer, sizeof(buffer))
!= FR_OK){
/* FatFs Format Error : set the red LED on */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET);
while(1);
} else {
/*##-4- Create & Open a new text file object with write access#*/
if(f_open(&MyFile, "Hello.txt", FA_CREATE_ALWAYS | FA_WRITE) !=
FR_OK){
/* 'Hello.txt' file Open for write Error : set the red LED on */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET);
while(1);
} else {
/*##-5- Write data to the text file ####################*/
res = f_write(&MyFile, wtext, sizeof(wtext), (void
*)&byteswritten);
if((byteswritten == 0) || (res != FR_OK)){
/* 'Hello.txt' file Write or EOF Error : set the red LED on */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET);
while(1);
} else {
/*##-6- Successful open/write : set the blue LED on */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_RESET);
f_close(&MyFile);
/*##-7- Open the text file object with read access #*/
if(f_open(&MyFile, "Hello.txt", FA_READ) != FR_OK){
/* 'Hello.txt' file Open for read Error : set the red LED on */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET);
while(1);
} else {
/*##-8- Read data from the text file #########*/
res = f_read(&MyFile, rtext, sizeof(wtext), &bytesread);
if((byteswritten == 0)|| (res != FR_OK)){
/* 'Hello.txt' file Read or EOF Error : set the red LED on */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET);
while(1);
} else {
/* Successful read : set the green LED On */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_6, GPIO_PIN_RESET);

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/*##-9- Close the open text file ################*/

f_close(&MyFile);
}}}}}}}
/*##-10- Unlink the micro SD disk I/O driver #########*/
FATFS_UnLinkDriver(SDPath);

/* USER CODE END 2 */

/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)

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13 Tutorial 3 - Using the Power Consumption Calculator

to optimize the embedded application consumption
and more

13.1 Tutorial overview

This tutorial focuses on STM32CubeMX Power Consumption Calculator (Power
Consumption Calculator) feature and its benefits to evaluate the impacts of power-saving
techniques on a given application sequence.
The key considerations to reduce a given application power consumption are:
• Reducing the operating voltage
• Reducing the time spent in energy consuming modes
It is up to the developer to select a configuration that gives the best compromise
between low-power consumption and performance.
• Maximizing the time spent in non-active and low-power modes
• Using the optimal clock configuration
The core should always operate at relatively good speed, since reducing the operating
frequency can increase energy consumption if the microcontroller has to remain for a
long time in an active operating mode to perform a given operation.
• Enabling only the peripherals relevant for the current application state and clock-gating
the others
• When relevant, using the peripherals with low-power features (e.g. waking up the
microcontroller with the I2C)
• Minimizing the number of state transitions
• Optimizing memory accesses during code execution
– Prefer code execution from RAM to flash memory
– When relevant, consider aligning CPU frequency with flash memory operating
frequency for zero wait states.
The following tutorial shows how the STM32CubeMX Power Consumption Calculator
feature can help to tune an application to minimize its power consumption and extend the
battery life.
Note: The Power Consumption Calculator does not account for I/O dynamic current consumption
and external board components that can also affect current consumption. For this purpose,
an “additional consumption” field is provided for the user to specify such consumption value.

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13.2 Application example description

The application is designed using the NUCLEO-L476RG board, based on an
STM32L476RGTx device, and supplied by a 2.4 V battery.
The main purpose of this application is to perform ADC measurements and transfer the
conversion results over UART. It uses:
• Multiple low-power modes: Low-power run, Low-power sleep, Sleep, Stop and Standby
• Multiple peripherals: USART, DMA, Timer, COMP, DAC and RTC
– The RTC is used to run a calendar and to wake up the CPU from Standby when a
specified time has elapsed.
– The DMA transfers ADC measurements from ADC to memory
– The USART is used in conjunction with the DMA to send/receive data via the
virtual COM port and to wake up the CPU from Stop mode.
The process to optimize such complex application is to start describing first a functional only
sequence then to introduce, on a step by step basis, the low-power features provided by the
STM32L476RG microcontroller.

13.3 Using the Power Consumption Calculator

13.3.1 Creating a power sequence

Follow the steps below to create the sequence (see Figure 537):
1. Launch STM32CubeMX.
2. Click new project and select the Nucleo-L476RG board from the Board tab.
3. Click the Power Consumption Calculator tab to select the Power Consumption
Calculator view. A first sequence is then created as a reference.
4. Adapt it to minimize the overall current consumption. To do this:
a) Select 2.4 V VDD power supply. This value can be adjusted on a step by step basis
(see Figure 538).
b) Select the Li-MnO2 (CR2032) battery. This step is optional. The battery type can
be changed later on (see Figure 538).

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Figure 537. Power Consumption Calculation example

Figure 538. VDD and battery selection menu

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5. Enable the Transition checker to ensure the sequence is valid (see Figure 538). This
option allows verifying that the sequence respects the allowed transitions implemented
within the STM32L476RG.
6. Click the Add button to add steps that match the sequence described in Figure 538.
– By default the steps last 1 ms each, except for the wake-up transitions preset
using the transition times specified in the product datasheet (see Figure 539).
– Some peripherals for which consumption is unavailable or negligible are
highlighted with ‘*’ (see Figure 539).

Figure 539. Sequence table

7. Click the Save button to save the sequence as SequenceOne.

The application consumption profile is generated. It shows that the overall sequence
consumes an average of 2.01 mA for 9 ms, and that the battery lifetime is only four days
(see Figure 540).

Figure 540. sequence results before optimization

13.3.2 Optimizing application power consumption

Let us now take actions to optimize the overall consumption and the battery lifetime. These
actions are performed on steps 1, 4, 5, 6, 7, 8 and 10.
The next figures show on the left the original step, and on the right the step updated with
optimization actions.

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Step 1 (Run)
• Findings
All peripherals are enabled although the application requires only the RTC.
• Actions
– Lower the operating frequency
– Enable only the RTC peripheral
– To reduce the average current consumption, reduce the time spent in this mode
• Results
The current is reduced from 9.05 to 2.16 mA (see Figure 541).

Figure 541. Step 1 optimization

Step 4 (Run, RTC)

• Action
Reduce the time spent in this mode to 0.1 ms

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Step 5 (Run, ADC, DMA, RTC)

• Actions
– Change to Low-power run mode
– Lower the operating frequency
• Results
The current consumption is reduced from 6.17 mA to 271 µA (see Figure 542).

Figure 542. Step 5 optimization

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Step 6 (Sleep, DMA, ADC, RTC)

• Actions
– Switch to Lower-power sleep mode (BAM mode)
– Reduce the operating frequency to 2 MHz
• Results
The current consumption is reduced from 703 µA to 93 µA (see Figure 543).

Figure 543. Step 6 optimization

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Step 7 (Run, DMA, RTC, USART)

• Actions
– Switch to Low-power run mode
– Use the power efficient LPUART peripheral
– Reduce the operating frequency to 1 MHz using the interpolation feature
• Results
The current consumption is reduced from 1.92 mA to 42 µA (see Figure 544).

Figure 544. Step 7 optimization

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Step 8 (Stop 0, USART)

• Actions
– Switch to Stop1 low-power mode
– Use the power-efficient LPUART peripheral
• Results
The current consumption is reduced (see Figure 545).

Figure 545. Step 8 optimization

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Step 10 (RTC, USART)

• Actions
– Use the power-efficient LPUART peripheral
– Reduce the operating frequency to 1 MHz
• Results
The current consumption is reduced from 1.89 mA to 234 µA (see Figure 546).
The example given in Figure 547 shows an average current consumption reduction of
155 µA.

Figure 546. Step 10 optimization

See Figure 547 for the overall results: 7 ms duration, about two months battery life, and an
average current consumption of 165.25 µA.
Use the compare button to compare the current results to the original ones saved as
SequenceOne.pcs.

Figure 547. Power sequence results after optimizations

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14 Tutorial 4 - Example of UART communications with

an STM32L053xx Nucleo board

This tutorial aims at demonstrating how to use STM32CubeMX to create a UART serial
communication application for a NUCLEO-L053R8 board.
A Windows PC is required for the example. The ST-Link USB connector is used both for
serial data communications, and firmware downloading and debugging on the MCU. A
Type-A to mini-B USB cable must be connected between the board and the computer. The
USART2 peripheral uses PA2 and PA3 pins, which are wired to the ST-Link connector. In
addition, USART2 is selected to communicate with the PC via the ST-Link Virtual COM Port.
A serial communication client, such as Tera Term, needs to be installed on the PC to display
the messages received from the board over the virtual communication Port.

14.1 Tutorial overview

Tutorial 4 will take you through the following steps:
1. Selection of the NUCLEO-L053R8 board from the New Project menu.
2. Selection of the required features (debug, USART, timer) from the Pinout view:
peripheral operating modes as well as assignment of relevant signals on pins.
3. Configuration of the MCU clock tree from the Clock Configuration view.
4. Configuration of the peripheral parameters from the Configuration view
5. Configuration of the project settings in the Project Manager menu and generation of
the project (initialization code only).
6. Project update with the user application code corresponding to the UART
communication example.
7. Compilation, and execution of the project on the board.
8. Configuration of Tera Term software as serial communication client on the PC.
9. The results are displayed on the PC.

14.2 Creating a new STM32CubeMX project and

selecting the Nucleo board
To do this, follow the sequence below:
1. Select File > New project from the main menu bar. This opens the New Project
window.
2. Go to the Board selector tab and filter on STM32L0 series.
3. Select NUCLEO-L053R8 and click OK to load the board within the STM32CubeMX
user interface (see Figure 548).

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Figure 548. Selecting NUCLEO_L053R8 board

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14.3 Selecting the features from the Pinout view

1. Select Debug Serial Wire under SYS (see Figure 549).

Figure 549. Selecting debug pins

2. Select Internal Clock as clock source under TIM2 peripheral (see Figure 550).

Figure 550. Selecting TIM2 clock source

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3. Select the Asynchronous mode for the USART2 peripheral (see Figure 551).

Figure 551. Selecting asynchronous mode for USART2

4. Check that the signals are properly assigned on pins (see Figure 552):
– SYS_SWDIO on PA13
– TCK on PA14
– USART_TX on PA2
– USART_RX on PA3

Figure 552. Checking pin assignment

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14.4 Configuring the MCU clock tree from the Clock Configuration
view
1. Go to the Clock Configuration tab and leave the configuration untouched, in order to
use the MSI as input clock and an HCLK of 2.097 MHz (see Figure 553).

Figure 553. Configuring the MCU clock tree

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14.5 Configuring the peripheral parameters from the

Configuration view
1. From the Configuration tab, click USART2 to open the peripheral Parameter
Settings window and set the baud rate to 9600. Make sure the Data direction is set to
“Receive and Transmit” (see Figure 554).
2. Click OK to apply the changes and close the window.

Figure 554. Configuring USART2 parameters

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3. Click TIM2 and change the prescaler to 16000, the Word Length to 8 bits and the
Counter Period to 1000 (see Figure 555).

Figure 555. Configuring TIM2 parameters

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4. Enable TIM2 global interrupt from the NVIC Settings tab (see Figure 556).

Figure 556. Enabling TIM2 interrupt

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14.6 Configuring the project settings and generating the project

1. In the Project Settings menu, specify the project name, destination folder, and select
the EWARM IDE toolchain (see Figure 557).

Figure 557. Project Settings menu

If the firmware package version is not already available on the user PC, a progress
window opens to show the firmware package download progress.

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2. In the Code Generator tab, configure the code to be generated as shown in

Figure 558, and click OK to generate the code.

Figure 558. Generating the code

14.7 Updating the project with the user application code

Add the user code as follows:
/* USER CODE BEGIN 0 */
#include "stdio.h"
#include "string.h"
/* Buffer used for transmission and number of transmissions */
char aTxBuffer[1024];
int nbtime=1;
/* USER CODE END 0 */
Within the main function, start the timer event generation function as follows:
/* USER CODE BEGIN 2 */

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/* Start Timer event generation */

HAL_TIM_Base_Start_IT(&htim2);
/* USER CODE END 2 */

/* USER CODE BEGIN 4 */

void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){
sprintf(aTxBuffer,"STM32CubeMX rocks %d times \t", ++nbtime);
HAL_UART_Transmit(&huart2,(uint8_t *) aTxBuffer, strlen(aTxBuffer), 5000);
}
/* USER CODE END 4 */

14.8 Compiling and running the project

1. Compile the project within your favorite IDE.
2. Download it to the board.
3. Run the program.

14.9 Configuring Tera Term software as serial communication

client on the PC
1. On the computer, check the virtual communication port used by ST Microelectronics
from the Device Manager window (see Figure 559).

Figure 559. Checking the communication port

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2. To configure Tera Term to listen to the relevant virtual communication port, adjust the
parameters to match the USART2 parameter configuration on the MCU (see
Figure 560).

Figure 560. Setting Tera Term port parameters

3. The Tera Term window displays a message coming from the board at a period of a few
seconds (see Figure 561).

Figure 561. Setting Tera Term port parameters

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15 Tutorial 5: Exporting current project configuration to

a compatible MCU

When List pinout compatible MCUs is selected from the Pinout menu, STM32CubeMX
retrieves the list of the MCUs which are compatible with the current project configuration,
and offers to export the current configuration to the newly selected compatible MCU.
This tutorial shows how to display the list of compatible MCUs and export your current
project configuration to a compatible MCU:
1. Load an existing project, or create and save a new project:

Figure 562. Existing or new project pinout

2. Go to the Pinout menu and select List Pinout Compatible MCUs. The Pinout
compatible window pops up (see Figure 563 and Figure 564).
If needed, modify the search criteria and the filter options and restart the search
process by clicking the Search button.
The color shading and the Comments column indicate the level of matching:
– Exact match: the MCU is fully compatible with the current project (see Figure 564
for an example).
– Partial match with hardware compatibility: the hardware compatibility can be
ensured but some pin names could not be preserved. Hover the mouse over the
desired MCU to display an explanatory tooltip (see Figure 563 for an example).

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– Partial match without hardware compatibility: not all signals can be assigned to the
exact same pin location and a remapping will be required. Hover the mouse over
the desired MCU to display an explanatory tooltip (see Figure 564 for an
example).

Figure 563. List of pinout compatible MCUs - Partial match

with hardware compatibility

Figure 564. List of Pinout compatible MCUs - Exact and partial match

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3. Then, select an MCU to import the current configuration to, and click OK, Import:

Figure 565. Selecting a compatible MCU and importing the configuration

The configuration is now available for the selected MCU:

Figure 566. Configuration imported to the selected compatible MCU

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4. To see the list of compatible MCUs at any time, select Outputs under the Window
menu.
To load the current configuration to another compatible MCU, double-click the list of
compatible MCUs.
5. To remove some constraints on the search criteria, several solutions are possible:
– Select the Ignore Pinning Status checkbox to ignore pin status (locked pins).
– Select the Ignore Power Pins checkbox not to take into account the power pins.
– Select the Ignore System Pins not take into account the system pins. Hover the
mouse over the checkbox to display a tooltip that lists the system pins available on
the current MCU.

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16 Tutorial 6 – Adding embedded software packs to user

projects

In this tutorial, the Oryx-Embedded.Middleware.1.7.8. pack is taken as an example to

demonstrate how to a to add pack software components to STM32CubeMX projects. The
use of this package shall not be understood as an STMicroelectronics recommendation.
To add embedded software packs to your project, proceed as follows:
1. Install Oryx-Embedded.Middleware.1.7.8.pack using the .pdsc file available from
http://www.oryx-embedded.com (see Section 3.4.5: Installing embedded software
packs).
2. Select New project.
3. Select STM32F01CCFx from the MCU selector.
4. Select Additional Software from the Pinout & Configuration view to open the
additional software component window and choose the following software components:
Compiler Support, RTOS Port/None and Date Time Helper Routines from the
CycloneCommon bundle (see Section 4.15: Software Packs component selection
window).
5. Click OK to display the selected components on the tree view and click the checkbox to
enable the software components for the current project (see Figure 567).

Figure 567. Additional software components enabled for the current project

The pack name highlighted in green indicates that all conditions for the selected
software components resolve to true. If at least one condition is not resolved, the pack
name is highlighted in orange.

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6. Check that no parameters can be configured in the Configuration tab (see

Figure 568).

Figure 568. Pack software components: no configurable parameters

7. Select the Project manager project tab to specify project parameters (see Figure 569),
and choose IAR™ EWARM as IDE.

Figure 569. Pack tutorial: project settings

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8. Generate your project by clicking . Accept to download the

STM32CubeF4 MCU package if it is not present in STM32Cube repository.
9. Click Open project. The Oryx software components are displayed in the generated
project (see Figure 570).

Figure 570. Generated project with third party pack components

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17 Tutorial 7 – Using the X-Cube-BLE1 software pack

This tutorial demonstrates how to achieve a functional project using the X-Cube-BLE1
software pack.
Below the prerequisites to run this tutorial:
• Hardware: NUCLEO-L053R8, X-NUCLEO-IDB05A1 and mini-USB cable (see
Figure 571)
• Tools: STM32CubeMX, IDE (Atollic® or any other toolchain supported by
STM32CubeMX)
• Embedded software package: STM32CubeL0 (version 1.10.0 or higher), X-Cube-BLE1
1.1.0 (see Figure 572).
• Mobile application (see Figure 573): STMicroelectronics BlueNRG application for iOS®
or Android™

Figure 571. Hardware prerequisites

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Figure 572. Embedded software packages

Figure 573. Mobile application

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Proceed as follows to install and run the tutorial:

1. Check STM32CubeMX Internet connection:
a) Select the Help > Updater Settings menu to open the updater window.
b) Verify in the Connection tab that the Internet connection is configured and up.
2. Install the required embedded software packages (see Figure 574):
a) Select the Help > Manage Embedded software packages menu to open the
embedded software package manager window.
b) Click the Refresh button to refresh the list with the latest available package
versions.
c) Select the STM32Cube MCU Package tab and check that the STM32CubeL0
firmware package version 1.10.0 or higher is installed (the checkbox must be
green). Otherwise select the checkbox and click Install now.
d) Select the STMicrolectronics tab and check that the X-Cube-BLE1 software pack
version 1.0.0 is installed (checkbox must be green). Otherwise, select the
checkbox and click Install now.

Figure 574. Installing Embedded software packages

3. Start a new project:

a) Select New Project to open the new project window.
b) Select the Board selector tab.
c) Select Nucleo64 as board type and STM32L0 as MCU Series.
d) Select the NUCLEO-L053R8 from the resulting board list (see Figure 575).
e) Answer No when prompted to initialize all peripherals in their default mode (see
Figure 576).

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Figure 575. Starting a new project - selecting the NUCLEO-L053R8 board

Figure 576. Starting a new project - initializing all peripherals

4. Add X-Cube-BLE1 components to the project:

a) Click Additional Software from Pinout & Configuration view to open the
Additional Software component Selection window.
b) Select the relevant components (see Figure 577)
The Application group comes with a list of applications: the C files implement the
application loop, that is the Process() function. From the Application group, select
the SensorDemo application.
Select the Controller and Utils components
Select the Basic variant for the HCI_TL component. The Basic variant provides
the STMicroelectronics implementation of the HCI_TL API while the template
option requires users to implement their own code.
Select the UserBoard variant as HCI_TL_INTERFACE component. Using the
UserBoard option generates the <boardname>_bus.c file, that is
nucleo_l053r8_bus.c for this tutorial, while the template option generates the
custom_bus.c file and requires users to provide their own implementation.
Refer to the X-Cube-BLE1 pack documentation for more details on software
components.

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c) Click OK to apply the selection to the project and close the window. The left panel
Additional Software section is updated accordingly.

Figure 577. Selecting X-Cube-BLE1 components

5. Enable peripherals and GPIOs from the Pinout tab (see Figure 578):
a) Configure USART2 in Asynchronous mode.
b) Configure SPI1 in Full-duplex master mode.
c) Left-click the following pins and configure them for the required GPIO settings:
PA0: GPIO_EXTI0
PA1: GPIO_Output
PA8: GPIO_Output
d) Enable Debug Serial Wire under SYS peripheral.

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Figure 578. Configuring peripherals and GPIOs

6. Configure the peripherals from the Configuration tab:

a) Click the NVIC button under the System section to open the NVIC configuration
window. Enable EXTI line 0 and line 1 interrupts and click OK (see Figure 579).
b) Click the SPI button under the Connectivity section to open the SPI
configuration window. Check that the data size is set to 8 bits and the prescaler
value to 16 so that HCLK divided by the prescaler value is less or equal to 8 MHz.
c) Click USART2 under the Connectivity section to open the Configuration window
and check the following parameter settings:
Under Parameter Settings:
Baud rate: 115200 bits/s
Word length: 8 bits (including parity)
Parity: none
Stop bits: 1
Under GPIO Settings:
User labels: USART_TX and USART_RX

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Figure 579. Configuring NVIC interrupts

7. Enable and configure X-Cube-BLE1 pack components from the

Pinout & Configuration view:
a) Click the pack items from the left panel to show the mode and configuration tabs.
b) Click the check boxes from the Mode panel to enable X-Cube-BLE1, the
configuration panel appears showing the parameters to configure. An orange
triangle indicates that some parameters are not configured. It turns into a green
check mark once all parameters are correctly configured (see Figure 580).
c) Leave the Parameter Settings Tab unchanged.
d) Go the Platform settings tab, configure the connection with the hardware
resources as indicated in Figure 580 and Table 26.

Table 26. Connection with hardware resources

Name IPs or components Found solutions

BUS IO driver SPI in Full-duplex master mode SPI1

EXTI Line GPIO:EXTI PA0
CS Line GPIO:output PA1
Reset Line GPIO:output PA8
BSP LED GPIO:output PA5
BSP Button GPIO:EXTI PC13
BSP USART USART in Asynchronous mode USART2

Check that the icon turns to . Click OK to close the Configuration window.

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Figure 580. Enabling X-Cube-BLE1

8. Generate the SensorDemo project:

a) Click to generate the code. The Project Settings window
opens if the project has not yet been saved.
b) Click to generate the code once the project settings have
been properly configured (see Figure 581). When the generation is complete, a
dialog window requests to open the project folder (Open Folder) or to open the
project in IDE toolchain (Open Project). Select Open Project (see Figure 582).

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Figure 581. Configuring the SensorDemo project

Figure 582. Open SensorDemo project in the IDE toolchain

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18 Creating LPBAM projects

18.1 LPBAM overview

Disclaimer: to learn about the LPBAM mode and its usage, it is recommended to read the
LPBAM application note available on www.st.com, and the LPBAM utility getting started
guide located under the Utilities folder of the STM32Cube firmware package.

18.1.1 LPBAM operating mode

LPBAM stands for low power background autonomous mode. It is an operating mode that
allows peripherals to be functional and autonomous independently from power modes and
without any software running. It is performed thanks to a hardware subsystem embedded in
STM32 products. Thanks to DMA transfers in Linked-list mode, the LPBAM subsystem can
chain different actions to build a useful functionality (peripheral configurations and
transfers). Optionally, it can generate asynchronous events and interrupts. It operates
without any CPU intervention. Consequently, the two major benefits from using the LPBAM
subsystem mechanisms are an optimized power consumption, and an offloaded CPU.

18.1.2 LPBAM firmware

The LPBAM firmware has been designed to help users create LPBAM applications: the
LPBAM utility is a set of modular drivers located under the Utilities folder of the STM32Cube
firmware package. Each module comes as a pair of C file that provides the APIs needed to
build an application scenario. Each module manages the configurability and the data
transfers for a given peripheral. The LPBAM utility is designed to be compatible with any
STM32 devices supporting LPBAM subsystem mechanisms through a configuration
module: it requires a configuration file stm32_lpbam_conf.h aligned with the application
needs. The LPBAM utility has a single application entry point, the stm32_lpbam.h, that must
be included in the project.

18.1.3 Supported series

The LPBAM firmware supports STM32U575/585, STM32U595/5A5 and STM32U599/5A9
products, for projects with or without TrustZone® activated.
STM32CubeMX 6.5.0 introduces LPBAM for projects without TrustZone® activated on the
STM32U575/585 product line: users can create LPBAM applications for their project using
STM32CubeMX LPBAM Scenario & Configuration view and generate the corresponding
code. The generated C project embeds the LPBAM firmware.
STM32CubeMX 6.6.0 adds LPBAM support for projects with TrustZone® activated.

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18.1.4 LPBAM design

It is recommended to use LPBAM to save power and offload the CPU.
• The LPBAM mechanism supports the following set of peripherals on the Smart Run
Domain: ADC4, COMP1/2, DAC1, I2C3, LPDMA1, LPGPIO, LPTIM1/2/3, LPUART1,
OPAMP1/2, SPI3, VREFBUF.
• According to the LPDMA implementation in the Smart run domain, the LPBAM has
access only to SRAM4.
• The LPBAM mechanism implementation can run autonomously until Stop2 mode.
• To reach the lowest power consumption, the system power usage, the system clock
and the autonomous peripheral kernel clock can be configured:

18.1.5 LPBAM project support in STM32CubeMX

An LPBAM project is composed of a main project, and of one or more LPBAM applications.

Figure 583. LPBAM project

The “Main project” contains the “SoC and IPs configuration” at initialization time and a
runtime description of the main application. STM32CubeMX allows to describe the “SOC
and IPs Configuration” part.
Each LPBAM application contains a “SoC and IPs configuration” and a runtime description.
STM32CubeMX allows to describe both.
STM32CubeMX generated code for “SoC and IPs configurations” uses the STM32Cube
HAL and/or LL APIs, for both the main project and the LPBAM application. The code
generated for the LPBAM application runtime uses the LPBAM firmware API.
Figure 584 is an example of what can be executed at runtime for a simple LPBAM project
composed of the main application and of one LPBAM application.

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Figure 584. Project timeline

18.2 Creating an LPBAM project

18.2.1 LPBAM feature availability

When a project with LPBAM feature capability is opened, a dedicated entry is shown in the
user interface (see Figure 585). The feature is optional and when it is not used, it has no
impact on the generated project.

Figure 585. Project with LPBAM capability

18.2.2 Describing an LPBAM project

Describing an LPBAM project in STM32CubeMX consists in describing the main project
using STM32CubeMX main project page, and one or more LPBAM applications using the
dedicated LPBAM Scenario & Configuration page.

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Starting with STM32CubeMX 6.5:

• Create a project by selecting an MCU or board part number from the STM32U575/585
product line.
• Do not activate TrustZone® for the project.
• Click “LPBAM Scenario & Configuration” ribbon to view LPBAM dedicated page.
The LPBAM context is highlighted with a pink border. You can switch back and forth
between the main project configuration and the LPBAM Scenario & Configuration by clicking
the corresponding ribbon.

Figure 586. LPBAM scenario & configuration view

18.2.3 Managing LPBAM applications in a project

When entering the LPBAM Scenario & Configuration view, you must first add an LPBAM
application.
Adding, removing, renaming, and switching between LPBAM applications is done from the
left panel under the LPBAM manager section.
To add the first LPBAM application, click “Add Application”:
• If the default name is kept, the application “LpbamApp1” is created.
• The first Queue “Queue1” of LpbamApp1 is created.
• The configuration views (LPBAM scenario, pinout & ip, clock) necessary to describe
Lpbam App1 are available.
To add more queues, click “Add Queue”
To delete an application (or a queue), right-click the application (or the queue) name and
select “Delete”.

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To rename an application (or a queue), right-click the application (or the queue) name and
select “Rename”. Note that the application name is used in the generated project.
To switch between LPBAM applications, click the application name, this loads the LPBAM
panel for the selected application.
To switch between queues in an LPBAM application, click the queue name: the middle and
right panels are refreshed to display the selected queue and its configuration.

Figure 587. Adding an application

18.3 Describing an LPBAM application

18.3.1 Overview (SoC & IPs configuration, runtime scenario)

Describing an LPBAM application consists in configuring the SoC and IPs, as it is done for a
standard STM32CubeMX project, as well as describing the runtime part of the application.

SoC and IPs configuration

To configure IP and SOC in the context of an LPBAM application, use the Pinout &
Configuration and Clock configuration provided with the LPBAM application.

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Figure 588. SoC and IPs configuration

Runtime description (scenario)

With standard STM32CubeMX projects, the user must add the code to manage the runtime
behavior of the main application based on STM32Cube HAL or LL driver APIs, such as
HAL_COMP_Start, HAL_TIM_Start, HAL_TIM_Stop.
For LPBAM applications, STM32CubeMX provides the LPBAM Scenario & Configuration
panel to create the runtime description (scenario). As shown in Figure 589, this panel is
divided in three parts.

Figure 589. LPBAM scenario: creation & configuration panels

Note: LPBAM applications use the LPBAM firmware APIs and consist of chained DMA transfers.

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In the context of an LPBAM application, the first panel is used for:

• Managing queues for the application.
• Browsing and adding nodes to the queue currently selected in STM32CubeMX user
interface.
• Application specific settings. These settings cannot be changed nor disabled when
using LPBAM on STM32U5 series.
The second panel displays the diagram of the queue currently selected for one selected
queue of the LPBAM application.
The third panel lets the user to configure either the queue (if the queue name is clicked), or
a node (if the node is selected on the diagram).

18.3.2 SoC& IPs: configuring the clock

The LPBAM subsystem is functional down to STOP2 mode and supports only IPs on the
Smart run domain. Consequently, in the LPBAM context, only a subset of the clock tree can
be configured. Refer to Section 4.10 for details on how to configure a clock tree in
STM32CubeMX.

Figure 590. Clock tree configuration

18.3.3 SoC & IPs: configuring the IPs

Only IPs of the Smart run domain are available in the LPBAM context.
In the LPBAM context, most IPs show the same configuration possibilities as the main
project. However, for some IPs, some additional configuration is needed. For example,
when an IP internal interrupt can be used in the LPBAM context, a dedicated configuration
Tab is shown.

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Figure 591. Available IPs

Figure 592. IP configuration: advanced settings

All IPs used at runtime by the LPBAM must be configured in the Pinout & Configuration
view. Their configuration must be coherent with the LPBAM scenario.

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Clicking “Check LPBAM Design” on the upper right corner of the user interface returns, for
each IP used but not configured in an LPBAM application, a warning in the LPBAM output
window.

Warning: “Check LPBAM Design” checks only that the IPs are
configured in the “Pinout & Configuration”, it does not check
whether the HAL configuration is coherent with the LPBAM
APIs used in the scenario.

18.3.4 SoC & IPs: configuring Low Power settings

Starting with STM32CubeMX6.5, users can configure low power settings for their project.
These settings (to be found under the PWR IP) are very important to minimize the power
consumption of an LPBAM application.

Figure 593. LPBAM low power settings

18.3.5 LPBAM scenario: managing queues

An LPBAM scenario consists of one or more queues, each with one or more nodes. The
center panel describes the scenario of the LPBAM application: click the queue name to
display its diagram in the center panel and its configuration in the right panel. The name of
the selected queue is underlined in blue.
To add more queues, click the “+” button in that panel, or click “Add queues” from the
LPBAM management section in the left panel:
• The maximum number of queues is four on STM32U5 series, limited by the number of
LPDMA1 channels.
• Adding an LPBAM application to the project automatically creates one empty queue for
that application.

Warning: For LPBAM applications with multiple queues,

STM32CubeMX does not manage the runtime

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synchronization between queues. It is the user’s

responsibility when assembling its final application to “start”
the different queues at runtime.

The “LPBAM Management” section allows to remove and rename queues:

• To delete a queue, right-click the queue name and select “Delete”.
• To rename a queue, right-click the queue name and select “Rename”.
• To switch between queues in an LPBAM application, click the queue name: the middle
and right panels are refreshed to display the selected queue and its configuration.

18.3.6 Queue description: managing nodes

A queue description consists of a sequence of functional nodes on a timeline: the sequence
is displayed as a diagram in the central panel and the queue configuration in the right panel.
To add nodes to a queue:
• Click the name of the queue to be updated.
• Use the “LPBAM function Toolbox”, in the left panel to browse the list of IPs and
functions (LPBAM firmware APIs) that can be used to create nodes.
• Click the IP name to expand and see the list of available functions.
• Click the “+” sign next to the function name to add the function as a node in the queue:
the queue diagram in the center panel is updated accordingly.
• Example: on Queue1 of LpbamAp1, COMP1 is started, then data transfer on COMP1
Output is performed (see Figure 594).
To remove nodes from the diagram, click the cross on the node right-end-upper corner.

Figure 594. Adding nodes to a queue

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18.3.7 Queue description: configuring the queue in circular mode

STM32CubeMX offers the possibility to design circular queues:
• Select the queue to be configured by clicking the queue name in the center panel: the
queue configuration is displayed in the right panel.
• Click the Circular mode checkbox to configure the queue in circular mode: by default,
the queue loops back to the first node (see Figure 595).
• To loop back to a different node, click the end of the arrow and drag it to the node of
choice.
• To remove the loop, uncheck Circular mode.

Figure 595. Queue in circular mode

Some functions first configure the IP, then manage the data transfer. In case of circular
mode, the loop can be plugged on the configuration (“Conf”) or on the data part (“Data”) of
the function.
An example is provided in Figure 596: when the queue is executed, the two first nodes and
the configuration of the third node are executed once. whereas the data transfer is repeated
as part of the loop.

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Figure 596. Queue looping back on IP data transfer

18.3.8 Queue description: configuring the DMA channel hosting the queue
The execution of an LPBAM queue consists of LPDMA chained transfers. The DMA hosting
the queue execution must be configured as needed by the application (see Figure 597).

Figure 597. LPBAM queue: DMA configuration

Basic configuration
Select the queue to be configured by clicking the queue name on the center panel, the
configuration of the DMA channel hosting that queue is shown in the right panel.

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Note that some settings usually available for configuring a DMA channel are not provided in
the user interface, as they are directly managed either by STM32CubeMX or by the LPBAM
driver.

DMA channel NVIC configuration

NVIC settings are available only if one DMA channel interrupt is enabled (see right panel in
Figure 597). The preemption priority and sub priority ranges in the LPBAM context depend
on the NVIC priority group set for the whole project (the main project with the LPBAM
applications).

Warning: Always check preemption and sub-priorities in the LPBAM

context after changing the NVIC priority group from the main
project Pinout& Configuration view.

18.3.9 Node description: accessing contextual help and documentation

STM32CubeMX provides contextual help and link to reference documentation on LPBAM
functions to guide the user during the function selection process:
• From the “LPBAM function Toolbox” in the left panel, hover the mouse on an IP name
to show the contextual help with links to reference documentation (see Figure 598).
• It is recommended to read carefully the LPBAM global documentation and the IP
“Description, Usage and Constraint” to learn how to assemble nodes in a queue,
several queues, what can be done and what cannot be done. Some restrictions apply
and are due to the LPBAM mechanism. They are not coming from the IP itself or from
HAL constraints.

Figure 598. LPBAM functions contextual help

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18.3.10 Node description: configuring node parameters

Once a function is chosen from the “LPBAM Function Toolbox” and added to a queue, it can
be configured. In the center panel, click on a node to select it: the function is highlighted in
pink, and its configuration is shown in the right panel (see Figure 599).
The example shows the “Start” parameters of the LPBAM COMP1_Start function. The HAL
driver uses the same parameter names to configure a COMP IP. As mentioned before, the
LPBAM firmware is not a HAL driver. However, the IP being unique, the LPBAM driver has
been designed so that the IP parameters use, whenever possible, the same naming as
found in the HAL driver.

Figure 599. LPBAM queue node configuration

Warning: LPBAM IP functions access IP hardware resources, to be

properly configured in the “Pinout & Configuration” view.

When a parameter is set to a hardware resource such as a GPIO, the resource must be
configured in the Pinout & Configuration view.
In the example shown in Figure 599, the COMP “Input Plus” is set to PC5. If PC5 is not
configured in the “Pinout & configuration” view, the generated LPBAM application can gets a
“null signal” on Input Plus, and will be not functional.
To fix this issue:
• Go to the Pinout&Configuration view
• Search PC5 using the search field
• Right-click the PC5 pin and select COMP_Inp (see Figure 600)

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Figure 600. LPBAM node: configuring hardware resources

Another example can be made using a timer to generate a PWM signal. The HAL driver
requires a timer channel to be configured as output. Same applies when using the LPBAM
firmware.
Note: All constraints concerning the initial configuration of the IP are mentioned in the LPBAM
firmware documentation. Use STM32CubeMX “LPBAM Design check” mechanism (see
dedicated section) to detect missing configurations.

18.3.11 Node description: configuring a trigger

For all IPs and functions, with the LPBAM firmware it is possible to use a hardware signal to
trigger a node. STM32CubeMX allows to configure such trigger from the node configuration
panel. By default, the node execution is not triggered. When trigger is enabled, all possible
trigger signals are listed.

Warning: It is the user responsibility to properly configure the triggers.

STM32CubeMX does not check for configuration errors.

Taking the COMP function “Start” as an example (see Figure 601), choose the function
execution to be triggered on the rising edge of hardware signal, for the example, then, select
the hardware signal among the list of hardware signals proposed.

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Figure 601. LPBAM node trigger configuration

If a node is a function managing LPTIM1_CH1, it is possible to select LPTIM1_CH1 as the

trigger (see Figure 602).

Figure 602. LPBAM node triggered using timer channel

18.3.12 Node description: reconfiguring a DMA for Data transfer

Nodes set to a function managing data transfers (all functions with associated data transfer
and with a name not ending with _Config), come with a specific configuration section:
“Reconfigure DMA for Data Transfer” (see Figure 603).
Each DMA data transfer is based on a specific configuration, including, among others, data
size, buffer address, address increment. The DMA default settings are functional.

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Figure 603. LPBAM node: reconfiguring a DMA

DMA settings can be changed, but they depend upon the IP and the function.
For example, for “COMP Output Level”:
• Data transferred are output data and are transferred from the register IP to the memory.
The “Source Address” referring to the IP data register is not incremented:
STM32CubeMX user interface shows that the “Source address increment after
transfer” parameter cannot be enabled.
• Data transferred to memory can be saved at the same memory address, or in a Table:
in this case, the “Destination Address increment after transfer” can be disabled or left
enabled (see Figure 603).

Figure 604. Reconfiguring DMA for data transfer when destination is memory

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18.4 Checking the LPBAM design

STM32CubeMX offers users with the possibility to check their LPBAM design for coherency
and completeness, by detecting:
• Incoherences between the IP LPBAM function selected for a node and the
corresponding IP configuration.
• Wrong queue designs (the sequence of nodes is invalid).
Click CHECK LPBAM DESIGN to check all LPBAM applications currently available in the
project. Results appear in the LPBAM output log window (see Figure 605).
Note: Messages raised on the LPBAM design do not prevent users to generate the C code for
their project. Supported type of messages are ERROR (in red), Warning (in orange), and
Information (in blue).

Figure 605. Design check

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18.5 Generating a project with LPBAM applications

Click Generate Code from the main project view. As exemplified in Figure 605, the resulting
project shows, in addition to the main project files and folders, the stm32_lpbam_conf.h file,
a dedicated folder for the configuration code, and the utilities folder with the LPBAM utility
firmware.

Figure 606. STM32CubeMX project generated with LPBAM applications

STM32CubeMX generates:
• In the Core/Inc folder, the stm32_lpbam_conf.h file that defines all the LPBAM modules
enabled for the LPBAM applications, to be used by the LPBAM utility firmware.
• In the LPBAM folder, the code for the LPBAM applications and their scenarios. The
lpbam_<application name>.h file provides the prototypes of the functions to call in the
main project to initialize the application, build and initialize the scenario, link it with the
DMA, start it, stop it, unlink it, and de-initialize it.
As an example, for the LpbamAp1 application, STM32CubeMX generates the following
functions:
/* LpbamAp1 application initialization */
void MX_LpbamAp1_Init(void);

/* LpbamAp1 application - scenario initialization */

void MX_LpbamAp1_Scenario_Init(void);

/* LpbamAp1 application - scenario build */

void MX_LpbamAp1_Scenario_Build(void);

/* LpbamAp1 application - scenario link */

void MX_LpbamAp1_Scenario_Link(DMA_HandleTypeDef *hdma);

/* LpbamAp1 application - scenario start */

void MX_LpbamAp1_Scenario_Start(DMA_HandleTypeDef *hdma);

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/* LpbamAp1 application - scenario stop */

void MX_LpbamAp1_Scenario_Stop(DMA_HandleTypeDef *hdma);

/* LpbamAp1 application - scenario unlink */

void MX_LpbamAp1_Scenario_UnLink(DMA_HandleTypeDef *hdma);

/* LpbamAp1 application - scenario de-initialization */

void MX_LpbamAp1_Scenario_DeInit(void);

18.6 LPBAM application for TrustZone® activated projects

Starting with STM32CubeMX 6.6.0, users can create LPBAM applications for projects with
TrustZone® activated.
1. Access to MCU selector and select an STM32U575/585 device
2. Click Create a new project
3. Choose the option “with TrustZone activated”

STM32CubeMX standard project view

STM32CubeMX standard project view proposes security settings for peripherals
(Figure 607) and the clock tree (Figure 608).

STM32CubeMX LPBAM view

In STM32CubeMX LPBAM Application configuration context, the peripherals and the clock
tree do not come with dedicated security settings (see Figure 609 and Figure 610). The
choice of context, secure or nonsecure, is done at LPBAM application level (Figure 611).

Security settings coherency check

1. Click
2. Enable Show Attribute Warning Messages to see details about LPBAM security related
configuration issues (see Figure 612)

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Figure 607. STM32CubeMX project - Peripheral secure context assignment

Figure 608. STM32CubeMX project - Clock source secure context assignment

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Figure 609. LPBAM project - Peripheral no context assignment

Figure 610. LPBAM application - Clock source no context assignment

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Figure 611. LPBAM application - Secure context assignment

Figure 612. LPBAM design security coherency check

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Appendix A STM32CubeMX pin assignment rules

The following pin assignment rules are implemented in STM32CubeMX:

• Rule 1: Block consistency
• Rule 2: Block inter-dependency
• Rule 3: One block = one peripheral mode
• Rule 4: Block remapping (only for STM32F10x)
• Rule 5: Function remapping
• Rule 6: Block shifting (only for STM32F10x)
• Rule 7: Setting or clearing a peripheral mode
• Rule 8: Mapping a function individually (if Keep Current Placement is unchecked)
• Rule 9: GPIO signals mapping

A.1 Block consistency

When setting a pin signal (provided there is no ambiguity about the corresponding
peripheral mode), all the pins/signals required for this mode are mapped and pins are
shown in green (otherwise the configured pin is shown in orange).
When clearing a pin signal, all the pins/signals required for this mode are unmapped
simultaneously and the pins turn back to gray.

Example of block mapping with an STM32F107x MCU

If the user assigns I2C1_SMBA function to PB5, then STM32CubeMX configures pins and
modes as follows:
• I2C1_SCL and I2C1_SDA signals are mapped to the PB6 and PB7 pins, respectively
(see Figure 613).
• I2C1 peripheral mode is set to SMBus-Alert mode.

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Figure 613. Block mapping

Example of block remapping with an STM32F107x MCU

If the user assigns GPIO_Output to PB6, STM32CubeMX automatically disables I2C1
SMBus-Alert peripheral mode from the peripheral tree view and updates the other I2C1 pins
(PB5 and PB7) as follows:
• If they are unpinned, the pin configuration is reset (pin grayed out).
• If they are pinned, the peripheral signal assigned to the pins is kept and the pins are
highlighted in orange since they no longer match a peripheral mode (see Figure 614).

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Figure 614. Block remapping

For STM32CubeMX to find an alternative solution for the I2C peripheral mode, the user will
need to unpin I2C1 pins and select the I2C1 mode from the peripheral tree view (see
Figure 615 and Figure 616).

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Figure 615. Block remapping - Example 1

Figure 616. Block remapping - Example 2

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A.2 Block inter-dependency

On the Pinout view, the same signal can appear as an alternate function for multiple pins.
However it can be mapped only once.
As a consequence, for STM32F1 MCUs, two blocks of pins cannot be selected
simultaneously for the same peripheral mode: when a block/signal from a block is selected,
the alternate blocks are cleared.

Example of block remapping of SPI in full-duplex master mode with an

STM32F107x MCU
If SPI1 full-duplex master mode is selected from the tree view, by default the corresponding
SPI signals are assigned to PB3, PB4 and PB5 pins (see Figure 617).
If the user assigns to PA6 the SPI1_MISO function currently assigned to PB4,
STM32CubeMX clears the PB4 pin from the SPI1_MISO function, as well as all the other
pins configured for this block, and moves the corresponding SPI1 functions to the relevant
pins in the same block as the PB4 pin (see Figure 618).
(by pressing CTRL and clicking PB4 to show PA6 alternate function in blue, then drag and
drop the signal to pin PA6)

Figure 617. Block inter-dependency - SPI signals assigned to PB3/4/5

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Figure 618. Block inter-dependency - SPI1_MISO function assigned to PA6

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A.3 One block = one peripheral mode

When a block of pins is fully configured in the Pinout view (shown in green), the related
peripheral mode is automatically set in the Peripherals tree.

Example of STM32F107x MCU

Assigning the I2C1_SMBA function to PB5 automatically configures I2C1 peripheral in
SMBus-Alert mode (see Peripheral tree in Figure 619).

Figure 619. One block = one peripheral mode - I2C1_SMBA function assigned to PB5

A.4 Block remapping (STM32F10x only)

To configure a peripheral mode, STM32CubeMX selects a block of pins and assigns each
mode signal to a pin in this block. In doing so, it looks for the first free block to which the
mode can be mapped.
When setting a peripheral mode, if at least one pin in the default block is already used,
STM32CubeMX tries to find an alternate block. If none can be found, it either selects the
functions in a different sequence, or unchecks , and remaps all
the blocks to find a solution.

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Example
STM32CubeMX remaps USART3 hardware-flow-control mode to the (PD8-PD9-PD11-
PD12) block, because PB14 of USART3 default block is already allocated to the
SPI2_MISO function (see Figure 620).

Figure 620. Block remapping - Example 2

A.5 Function remapping

To configure a peripheral mode, STM32CubeMX assigns each signal of the mode to a pin.
In doing so, it will look for the first free pin the signal can be mapped to.

Example using STM32F415x

When configuring USART3 for the Synchronous mode, STM32CubeMX discovered that the
default PB10 pin for USART3_TX signal was already used by SPI. It thus remapped it to
PD8 (see Figure 621).

Figure 621. Function remapping example

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A.6 Block shifting (only for STM32F10x and when

“Keep Current Signals placement” is unchecked)
If a block cannot be mapped and there are no free alternate solutions, STM32CubeMX tries
to free the pins by remapping all the peripheral modes impacted by the shared pin.

Example
With the Keep current signal placement enabled, if USART3 synchronous mode is set first,
the Asynchronous default block (PB10-PB11) is mapped and Ethernet becomes unavailable
(shown in red) (see Figure 622).
Unchecking allows STM32CubeMX shifting blocks around
and freeing a block for the Ethernet MII mode. (see Figure 623).

Figure 622. Block shifting not applied

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Figure 623. Block shifting applied

A.7 Setting and clearing a peripheral mode

The Peripherals panel and the Pinout view are linked: when a peripheral mode is set or
cleared, the corresponding pin functions are set or cleared.

A.8 Mapping a function individually

When STM32CubeMX needs a pin that has already been assigned manually to a function
(no peripheral mode set), it can move this function to another pin, only if
is unchecked and the function is not pinned (no pin icon).

A.9 GPIO signals mapping

I/O signals (GPIO_Input, GPIO_Output, GPIO_Analog) can be assigned to pins either
manually through the Pinout view or automatically through the Pinout menu. Such pins can
no longer be assigned automatically to another signal: STM32CubeMX signal automatic
placement does not take into account this pin anymore since it does not shift I/O signals to
other pins.
The pin can still be manually assigned to another signal or to a reset state.

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Appendix B STM32CubeMX C code generation design

choices and limitations

B.1 STM32CubeMX generated C code and user sections

The C code generated by STM32CubeMX provides user sections as illustrated below. They
allow user C code to be inserted and preserved at next C code generation.
User sections shall neither be moved nor renamed. Only the user sections defined by
STM32CubeMX are preserved. User created sections will be ignored and lost at next C
code generation.
/* USER CODE BEGIN 0 */
(..)
/* USER CODE END 0 */
Note: STM32CubeMX may generate C code in some user sections. It will be up to the user to
clean the parts that may become obsolete in this section. For example, the while(1) loop in
the main function is placed inside a user section as illustrated below:
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */

/* USER CODE BEGIN 3 */

}
/* USER CODE END 3 */

B.2 STM32CubeMX design choices for peripheral initialization

STM32CubeMX generates peripheral _Init functions that can be easily identified thanks to
the MX_ prefix:
static void MX_GPIO_Init(void);
static void MX_<Peripheral Instance Name>_Init(void);
static void MX_I2S2_Init(void);
An MX_<peripheral instance name>_Init function exists for each peripheral instance
selected by the user (e.g, MX_I2S2_Init). It performs the initialization of the relevant handle
structure (e.g, &hi2s2 for I2S second instance) that is required for HAL driver initialization
(e.g., HAL_I2S_Init) and the actual call to this function:
void MX_I2S2_Init(void)
{
hi2s2.Instance = SPI2;
hi2s2.Init.Mode = I2S_MODE_MASTER_TX;
hi2s2.Init.Standard = I2S_STANDARD_PHILLIPS;
hi2s2.Init.DataFormat = I2S_DATAFORMAT_16B;
hi2s2.Init.MCLKOutput = I2S_MCLKOUTPUT_DISABLE;

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hi2s2.Init.AudioFreq = I2S_AUDIOFREQ_192K;
hi2s2.Init.CPOL = I2S_CPOL_LOW;
hi2s2.Init.ClockSource = I2S_CLOCK_PLL;
hi2s2.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_ENABLE;
HAL_I2S_Init(&hi2s2);
}
By default, the peripheral initialization is done in main.c. If the peripheral is used by a
middleware mode, the peripheral initialization can be done in the middleware corresponding
.c file.
Customized HAL_<Peripheral Name>_MspInit() functions are created in the
stm32f4xx_hal_msp.c file to configure the low-level hardware (GPIO, CLOCK) for the
selected peripherals.

B.3 STM32CubeMX design choices and limitations for

middleware initialization

B.3.1 Overview
STM32CubeMX does not support C user code insertion in Middleware stack native files
although stacks such as LwIP might require it in some use cases.
STM32CubeMX generates middleware Init functions that can be easily identified thanks to
the MX_ prefix:
MX_LWIP_Init(); // defined in lwip.h file
MX_USB_HOST_Init(); // defined in usb_host.h file
MX_FATFS_Init(); // defined in fatfs.h file
Note however the following exceptions:
• No Init function is generated for FreeRTOS unless the user chooses, from the Project
Settings window, to generate Init functions as pairs of .c/.h files. Instead, a
StartDefaultTask function is defined in the main.c file and CMSIS-RTOS native function
(osKernelStart) is called in the main function.
• If FreeRTOS is enabled, the Init functions for the other middlewares in use are called
from the StartDefaultTask function in the main.c file.
Example:
void StartDefaultTask(void const * argument)
{
/* init code for FATFS */
MX_FATFS_Init();
/* init code for LWIP */
MX_LWIP_Init();
/* init code for USB_HOST */
MX_USB_HOST_Init();
/* USER CODE BEGIN 5 */
/* Infinite loop */
for(;;)
{

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osDelay(1);
}
/* USER CODE END 5 */
}

B.3.2 USB host

USB peripheral initialization is performed within the middleware initialization C code in the
usbh_conf.c file, while USB stack initialization is done within the usb_host.c file.
When using the USB Host middleware, the user is responsible for implementing the
USBH_UserProcess callback function in the generated usb_host.c file.
From STM32CubeMX user interface, the user can select to register one class or all classes
if the application requires switching dynamically between classes.

B.3.3 USB device

USB peripheral initialization is performed within the middleware initialization C code in the
usbd_conf.c file, while USB stack initialization is done within the usb_device.c file.
USB VID, PID and String standard descriptors are configured via STM32CubeMX user
interface and available in the usbd_desc.c generated file. Other standard descriptors
(configuration, interface) are hard-coded in the same file preventing support of USB
composite devices.
When using the USB Device middleware, the user is responsible for implementing the
functions in the usbd_<classname>_if.c class interface file for all device classes (such as
usbd_storage_if.c).
USB MTP and CCID classes are not supported.

B.3.4 FatFs
FatFs is a generic FAT/exFAT file system solution well suited for small embedded systems.
FatFs configuration is available in ffconf.h generated file.
The initialization of the SDIO peripheral for the FatFs SD card mode and of the FMC
peripheral for the FatFs External SDRAM and External SRAM modes are kept in the main.c
file.
Some files need to be modified by the user to match user board specificities (BSP in
STM32Cube embedded software package can be used as example):
• bsp_driver_sd.c/.h generated files when using FatFs SD card mode
• bsp_driver_sram.c/.h generated files when using FatFs External SRAM mode
• bsp_driver_sdram.c/.h generated files when using FatFs External SDRAM mode.
Multi-drive FatFs is supported, which means that multiple logical drives can be used by the
application (External SDRAM, External SRAM, SD card, USB disk, User defined). However
support of multiple instances of a given logical drive is not available (e.g. FatFs using two
instances of USB hosts or several RAM disks).
NOR and NAND flash memory are not supported. In this case, the user shall select the
FatFs user-defined mode and update the user_diskio.c driver file generated to implement
the interface between the middleware and the selected peripheral.

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B.3.5 FreeRTOS
FreeRTOS is a free real-time embedded operating system well suited for microcontrollers.
FreeRTOS configuration is available in FreeRTOSConfig.h generated file.
When FreeRTOS is enabled, all other selected middleware modes (e.g., LwIP, FatFs, USB)
will be initialized within the same FreeRTOS thread in the main.c file.
When GENERATE_RUN_TIME_STATS, CHECK_FOR_STACK_OVERFLOW,
USE_IDLE_HOOK, USE_TICK_HOOK and USE_MALLOC_FAILED_HOOK parameters
are activated, STM32CubeMX generates freertos.c file with empty functions that the user
shall implement. This is highlighted by the tooltip (see Figure 624).

Figure 624. FreeRTOS HOOK functions to be completed by user

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B.3.6 LwIP
LwIP is a small independent implementation of the TCP/IP protocol suite: its reduced RAM
usage makes it suitable for use in embedded systems with tens of Kbytes of free RAM.
LwIP initialization function is defined in lwip.c, while LwIP configuration is available in
lwipopts.h generated file.
STM32CubeMX supports LwIP over Ethernet only. The Ethernet peripheral initialization is
done within the middleware initialization C code.
STM32CubeMX does not support user C code insertion in stack native files. However, some
LwIP use cases require modifying stack native files (e.g., cc.h, mib2.c): user modifications
shall be backed up since they will be lost at next STM32CubeMX generation.
Starting with LwIP release 1.5, STM32CubeMX LwIP supports IPv6 (see Figure 626).
DHCP must be disabled, to configure a static IP address.

Figure 625. LwIP 1.4.1 configuration

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Figure 626. LwIP 1.5 configuration

STM32CubeMX generated C code will report compilation errors when specific parameters
are enabled (disabled by default). The user must fix the issues with a stack patch
(downloaded from Internet) or user C code. The following parameters generate an error:
• MEM_USE_POOLS: user C code to be added either in lwipopts.h or in cc.h (stack file).
• PPP_SUPPORT, PPPOE_SUPPORT: user C code required
• MEMP_SEPARATE_POOLS with MEMP_OVERFLOW_CHECK > 0: a stack patch
required
• MEM_LIBC_MALLOC & RTOS enabled: stack patch required
• LWIP_EVENT_API: stack patch required
In STM32CubeMX, the user must enable FreeRTOS in order to use LwIP with the netconn
and sockets APIs. These APIs require the use of threads and consequently of an operating
system. Without FreeRTOS, only the LwIP event-driven raw API can be used.

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B.3.7 Libjpeg
Libjpeg is a widely used C-library that allows reading and writing JPEG files. It is delivered
within STM32CubeF7, STM32CubeH7, STM32CubeF2 and STM32CubeF4 embedded
software packages.
STM32CubeMX generates the following files, whose content can be configured by the user
through STM32CubeMX user interface:
• libjpeg.c/.h
The MX_LIBJPEG_Init() initialization function is generated within the libjpeg.c file. It is
empty. It is up to the user to enter in the user sections the code and the calls to the
libjpeg functions required for the application.
• jdata_conf.c
This file is generated only when FatFs is selected as data stream management type.
• jdata_conf.h
The content of this file is adjusted according to the datastream management type
selected.
• jconfig.h
This file is generated by STM32CubeMX. but cannot be configured.
• jmorecfg.h
Some but not all the define statements contained in this file can be modified through
the STM32CubeMX libjpeg configuration menu.

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Figure 627. Libjpeg configuration window

B.3.8 Mbed TLS

Mbed TLS is a C-library that allows including cryptographic capabilities to embedded
products. It handles Secure Sockets Layer (SSL) and Transport Layer Security (TLS)
protocols, that are used for establishing a secure, encrypted and authenticated link between
two parties over an insecure network. Mbed TLS comes with an intuitive API and minimal
coding footprint. Visit https://tls.mbed.org/ for more details.
Mbed TLS is delivered within STM32CubeF2, STM32CubeF4, STM32CubeF7 and
STM32CubeH7 embedded software packages.
Mbed TLS can work without LwIP stack (see Figure 628: Mbed TLS without LwIP).
If LwIP stack is used, FreeRTOS must be enabled as well (see Figure 629: Mbed TLS with
LwIP and FreeRTOS).

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STM32CubeMX generates the following files, whose contents can be modified by the user
through STM32CubeMX user interface (see Figure 630: Mbed TLS configuration window)
and/or using user sections in the code itself:
• mbedtls_config.h
• mbedtls.h
• net_sockets.c (generated only if LwIP is enabled)
• mbedtls.c

Figure 628. Mbed TLS without LwIP

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Figure 629. Mbed TLS with LwIP and FreeRTOS

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Figure 630. Mbed TLS configuration window

B.3.9 TouchSensing
The STM32 TouchSensing library is a C-library that allows the creation of higher-end human
interfaces by replacing conventional electromechanical switches by capacitive sensors with
STM32 microcontrollers.
It requires the touch-sensing peripheral to be configured on the microcontroller.
STM32CubeMX generates the following files, whose contents can be modified by the user
through STM32CubeMX user interface (see Figure 631: Enabling the TouchSensing
peripheral, Figure 632: Touch-sensing sensor selection panel and Figure 633:
TouchSensing configuration panel) and/or using user sections in the code itself:
• touchsensing.c/.h
• tsl_user.c/.h
• tsl_conf.h

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Figure 631. Enabling the TouchSensing peripheral

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Figure 632. Touch-sensing sensor selection panel

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Figure 633. TouchSensing configuration panel

B.3.10 PDM2PCM
The PDM2PCM library is a C-library that allows converting a pulse density modulated
(PDM) data output into a 16-bit pulse-code modulation (PCM) format. It requires the CRC
peripheral to be enabled.
STM32CubeMX generates the following files, whose content can be modified by the user
through STM32CubeMX user interface and/or using user sections in the code itself:
• pdm2pcm.h/.c

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B.3.11 STM32WPAN BLE/Thread (STM32WB series only)

STM32WPAN BLE and Thread middleware are now supported in STM32CubeMX.

Figure 634. BLE and Thread middleware support in STM32CubeMX

They are exclusive in a given project and configuration with FreeRTOS is not yet supported.

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Application projects generated with STM32CubeMX can be found in the project folder of the
STM32CubeWB MCU package.

Figure 635. STM32CubeWB Package download

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This package can be installed through STM32CubeMX following the standard procedure
described in Section 3.4.3: Installing STM32 MCU packages.

Figure 636. STM32CubeWB BLE applications folder

BLE configuration
To enable BLE some peripherals (RTC, HSEM, RF) must be activated first.
Then, an application type must be selected, it can be one among Transparent mode, Server
profile, Router profile or Client profile.
Finally, the mode and other parameters relevant to this application type must be configured.
Note: The BLE Transparent mode and all Thread applications require either the USART or the
LPUART peripheral to be configured as well.

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Figure 637. BLE Server profile selection

Figure 638. BLE Client profile selection

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Thread configuration
To enable Thread some peripherals (RTC, HSEM, RF) must be activated first.
Then, an application type must be selected and the relevant parameters configured.

Figure 639. Thread application selection

B.3.12 CMSIS packs selection limitation

The restriction about applications comes from a simple generated code consideration: an
application is meant to be the root of the execution (excluding the main function).
This means that the generated function defines the execution of the selected application. In
that sense, it is meant to be the last call of the main method, and must not give hand back to
the main function.Two applications cannot be called, as this means generating calls in the
main function, and then the second call is never reached.
If you need to call both applications:
• An RTOS must run them in threads, or
• You manually add the right code to execute them (in that context, they are not
applications, as they are not at the root of the execution), or
• Change the meaning of the application components.

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B.3.13 OpenAmp and RESMGR_UTILITY

(STM32MPUs and STM32H7 dual-core products)
New software and hardware have been introduced on dual-core products to enable
multi-core cooperation.
• For STM32MPUs only: the inter-processor communication controller (IPCC) used to
exchange data between two processor instances relies on the fact that shared memory
buffers are allocated in the MCU SRAM and that each processor owns specific register
bank and interrupts.
• For STM32MPUs only: the OpenAMP middleware for intercommunication between
Cortex-A and Cortex-M cores implements the RPMsg messaging protocol (see
Figure 640).
• The resource manager library (RESMGR_UTILITY) for system resource management:
multi-processor devices give the possibility to run independent firmware on several
cores (see Figure 641). This implies a core could use some peripherals without
knowledge of the usage of these same peripherals: the role of the resource
management library is to control the assignment of a peripheral to a dedicated core
and to provide a method to configure the system resources used to operate that
peripheral (see Figure 642).

Figure 640. Enabling OpenAmp for STM32MPUs

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Figure 641. Enabling the Resource Manager for STM32MPUs

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Figure 642. Resource Manager: peripheral assignment view

For more details visit STM32MPUs dedicated wiki site at https://wiki.st.com/stm32mpu.

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Appendix C STM32 microcontrollers naming conventions

STM32 microcontroller part numbers are codified following the below naming conventions:
• Device subfamilies
The higher the number, the more features available.
For example STM32L0 line includes STM32L051, L052, L053, L061, L062, L063
subfamilies where STM32L06x part numbers come with AES while STM32L05x do not.
The last digit indicates the level of features. In the above example:
– 1 = Access line
– 2 = with USB
– 3 = with USB and LCD.
• Pin counts
– F = 20 pins
– G = 28 pins
– K = 32 pins
– T = 36 pins
– S = 44 pins
– C = 48 pins
– R = 64 (or 66) pins)
– M = 80 pins
– O = 90 pins
– V = 100 pins
– Q = 132 pins (e. g. STM32L162QDH6)
– Z = 144 pins
– I = 176 (+25) pins
– B = 208 pins (e. g. STM32F429BIT6)
– N = 216 pins
• Flash memory sizes
– 4 = 16 Kbytes of flash memory
– 6 = 32 Kbytes of flash memory
– 8 = 64 Kbytes of flash memory
– B = 128 Kbytes of flash memory
– C = 256 Kbytes of flash memory
– D = 384 Kbytes of flash memory
– E = 512 Kbytes of flash memory
– F = 768 Kbytes of flash memory
– G = 1024 Kbytes of flash memory
– I = 2048 Kbytes of flash memory
• Packages
– B = SDIP
– H = BGA

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– M = SO
– P = TSSOP
– T = LQFP
– U = VFQFPN
– Y = WLCSP
Figure 643 shows an example of STM32 microcontroller part numbering scheme.

Figure 643. STM32 microcontroller part numbering scheme

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Appendix D STM32 microcontrollers power consumption

parameters

This section provides an overview on how to use STM32CubeMX Power Consumption

Calculator.
Microcontroller power consumption depends on chip size, supply voltage, clock frequency
and operating mode. Embedded applications can optimize STM32 MCU power
consumption by reducing the clock frequency when fast processing is not required and
choosing the optimal operating mode and voltage range to run from. A description of STM32
power modes and voltage range is provided below.

D.1 Power modes

STM32 MCUs support different power modes (refer to STM32 MCU datasheets for full
details).

D.1.1 STM32L1 series

STM32L1 microcontrollers feature up to 6 power modes, including 5 low-power modes:
• Run mode
This mode offers the highest performance using HSE/HSI clock sources. The CPU
runs up to 32 MHz and the voltage regulator is enabled.
• Sleep mode
This mode uses HSE or HSI as system clock sources. The voltage regulator is enabled
and the CPU is stopped. All peripherals continue to operate and can wake up the CPU
when an interrupt/event occurs.
• Low- power run mode
This mode uses the multispeed internal (MSI) RC oscillator set to the minimum clock
frequency (131 kHz) and the internal regulator in low-power mode. The clock frequency
and the number of enabled peripherals are limited.
• Low-power sleep mode
This mode is achieved by entering Sleep mode. The internal voltage regulator is in low-
power mode. The clock frequency and the number of enabled peripherals are limited. A
typical example would be a timer running at 32 kHz.
When the wake-up is triggered by an event or an interrupt, the system returns to the
Run mode with the regulator ON.
• Stop mode
This mode achieves the lowest power consumption while retaining RAM and register
contents. Clocks are stopped. The real-time clock (RTC) an be backed up by using
LSE/LSI at 32 kHz/37 kHz. The number of enabled peripherals is limited. The voltage
regulator is in low-power mode.
The device can be woken up from Stop mode by any of the EXTI lines.
• Standby mode
This mode achieves the lowest power consumption. The internal voltage regulator is
switched off so that the entire VCORE domain is powered off. Clocks are stopped and
the real-time clock (RTC) can be preserved up by using LSE/LSI at 32 kHz/37 kHz.

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RAM and register contents are lost except for the registers in the Standby circuitry. The
number of enabled peripherals is even more limited than in Stop mode.
The device exits Standby mode upon reset, rising edge on one of the three WKUP pins,
or if an RTC event occurs (if the RTC is ON).
Note: When exiting Stop or Standby modes to enter the Run mode, STM32L1 MCUs go through a
state where the MSI oscillator is used as clock source. This transition can have a significant
impact on the global power consumption. For this reason, the Power Consumption
Calculator introduces two transition steps: WU_FROM_STOP and WU_FROM_STANDBY.
During these steps, the clock is automatically configured to MSI.

D.1.2 STM32F4 series

STM32F4 microcontrollers feature a total of 5 power modes, including 4 low-power modes:
• Run mode
This is the default mode at power-on or after a system reset. It offers the highest
performance using HSE/HSI clock sources. The CPU can run at the maximum
frequency depending on the selected power scale.
• Sleep mode
Only the CPU is stopped. All peripherals continue to operate and can wake up the CPU
when an interrupt/even occurs. The clock source is the clock that was set before
entering Sleep mode.
• Stop mode
This mode achieves a very low power consumption using the RC oscillator as clock
source. All clocks in the 1.2 V domain are stopped as well as CPU and peripherals.
PLL, HSI RC and HSE crystal oscillators are disabled. The content of registers and
internal SRAM are kept.
The voltage regulator can be put either in normal Main regulator mode (MR) or in Low-
power regulator mode (LPR). Selecting the regulator in low-power regulator mode
increases the wake-up time.
The flash memory can be put either in Stop mode to achieve a fast wake-up time. or in
Deep power-down to obtain a lower consumption with a slow wake-up time.
The Stop mode features two sub-modes:
– Stop in Normal mode (default mode)
In this mode, the 1.2 V domain is preserved in nominal leakage mode and the
minimum V12 voltage is 1.08 V.
– Stop in Under-drive mode
In this mode, the 1.2 V domain is preserved in reduced leakage mode and V12
voltage is less than 1.08 V. The regulator (in Main or Low-power mode) is in
under-drive or low-voltage mode. The flash memory must be in Deep-power-down
mode. The wake-up time is about 100 µs higher than in normal mode.
• Standby mode
This mode achieves very low power consumption with the RC oscillator as a clock
source. The internal voltage regulator is switched off so that the entire 1.2 V domain is
powered off: CPU and peripherals are stopped. The PLL, the HSI RC and the HSE
crystal oscillators are disabled. SRAM and register contents are lost except for
registers in the backup domain and the 4-byte backup SRAM when selected. Only RTC
and LSE oscillator blocks are powered. The device exits Standby mode when an

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external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pin, or an RTC
alarm/ wake-up/tamper/time stamp event occurs.
• VBAT operation
It allows to significantly reduced power consumption compared to the Standby mode.
This mode is available when the VBAT pin powering the Backup domain is connected to
an optional standby voltage supplied by a battery or by another source. The VBAT
domain is preserved (RTC registers, RTC backup register and backup SRAM) and
RTC and LSE oscillator blocks powered. The main difference compared to the Standby
mode is external interrupts and RTC alarm/events do not exit the device from VBAT
operation. Increasing VDD to reach the minimum threshold does.

D.1.3 STM32L0 series

STM32L0 microcontrollers feature up to 8 power modes, including 7 low-power modes to
achieve the best compromise between low-power consumption, short startup time and
available wake-up sources:
• Run mode
This mode offers the highest performance using HSE/HSI clock sources. The CPU can
run up to 32 MHz and the voltage regulator is enabled.
• Sleep mode
This mode uses HSE or HSI as system clock sources. The voltage regulator is enabled
and only the CPU is stopped. All peripherals continue to operate and can wake up the
CPU when an interrupt/event occurs.
• Low-power run mode
This mode uses the internal regulator in low-power mode and the multispeed internal
(MSI) RC oscillator set to the minimum clock frequency (131 kHz). In Low-power run
mode, the clock frequency and the number of enabled peripherals are both limited.
• Low-power sleep mode
This mode is achieved by entering Sleep mode with the internal voltage regulator in
low-power mode. Both the clock frequency and the number of enabled peripherals are
limited. Event or interrupt can revert the system to Run mode with regulator on.
• Stop mode with RTC
The Stop mode achieves the lowest power consumption with, while retaining the RAM,
register contents and real time clock. The voltage regulator is in low-power mode. LSE
or LSI is still running. All clocks in the VCORE domain are stopped, the PLL, MSI RC,
HSE crystal and HSI RC oscillators are disabled.
Some peripherals featuring wake-up capability can enable the HSI RC during Stop
mode to detect their wake-up condition. The device can be woken up from Stop mode
by any of the EXTI line, in 3.5 µs, and the processor can serve the interrupt or resume
the code.
• Stop mode without RTC
This mode is identical to “Stop mode with RTC “, except for the RTC clock which is
stopped here.
• Standby mode with RTC
The Standby mode achieves the lowest power consumption with the real time clock
running. The internal voltage regulator is switched off so that the entire VCORE domain

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is powered off. The PLL, MSI RC, HSE crystal and HSI RC oscillators are also switched
off. The LSE or LSI is still running.
After entering Standby mode, the RAM and register contents are lost except for
registers in the Standby circuitry (wake-up logic, IWDG, RTC, LSI, LSE crystal 32 kHz
oscillator, RCC_CSR register).
The device exits Standby mode in 60 µs when an external reset (NRST pin), an IWDG
reset, a rising edge on one of the three WKUP pins, RTC alarm (Alarm A or Alarm B),
RTC tamper event, RTC timestamp event or RTC wake-up event occurs.
• Standby mode without RTC
This mode is identical to Standby mode with RTC, except that the RTC, LSE and LSI
clocks are stopped.
The device exits Standby mode in 60 µs when an external reset (NRST pin) or a rising
edge on one of the three WKUP pin occurs.
Note: The RTC, the IWDG, and the corresponding clock sources are not stopped automatically by
entering Stop or Standby mode. The LCD is not stopped automatically by entering Stop
mode.

D.2 Power consumption ranges

STM32 MCUs power consumption can be further optimized thanks to the dynamic voltage
scaling feature: the main internal regulator output voltage V12 that supplies the logic (CPU,
digital peripherals, SRAM and flash memory) can be adjusted by software by selecting a
power range (STM32L1 and STM32L0) or power scale (STM32 F4).
Power consumption range definitions are provided below (refer to STM32 MCU datasheets
for full details).

D.2.1 STM32L1 series features three VCORE ranges

• High performance Range 1 (VDD range limited to 2.0-3.6 V), with the CPU running at
up to 32 MHz
The voltage regulator outputs a 1.8 V voltage (typical) as long as the VDD input voltage
is above 2.0 V. Flash program and erase operations can be performed.
• Medium performance Range 2 (full VDD range), with a maximum CPU frequency of
16 MHz
At 1.5 V, the flash memory is still functional but with medium read access time.
Program and erase operations are still possible.
• Low performance Range 3 (full VDD range), with a maximum CPU frequency limited to
4 MHz (generated only with the multispeed internal RC oscillator clock source)
At 1.2 V, the flash memory is still functional but with slow read access time. Program
and erase operations are no longer available.

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D.2.2 STM32F4 series features several VCORE scales

The scale can be modified only when the PLL is OFF and when HSI or HSE is selected as
system clock source.
• Scale 1 (V12 voltage range limited to 1.26 - 1.40 V), default mode at reset.
HCLK frequency range = 144 MHz to 168 MHz (180 MHz with over-drive).
This is the default mode at reset.
• Scale 2 (V12 voltage range limited to 1.20 - 1.32 V).
HCLK frequency range is up to 144 MHz (168 MHz with over-drive).
• Scale 3 (V12 voltage range limited to 1.08 - 1.20 V), default mode when exiting Stop
mode.
HCLK frequency ≤120 MHz.
The voltage scaling is adjusted to fHCLK frequency as follows:
• STM32F429x/39x MCUs:
– Scale 1: up to 168 MHz (up to 180 MHz with over-drive)
– Scale 2: from 120 to 144 MHz (up to 168 MHz with over-drive)
– Scale 3: up to 120 MHz.
• STM32F401x MCUs:
No Scale 1
– Scale 2: from 60 to 84 MHz
– Scale 3: up to 60 MHz.
• STM32F40x/41x MCUs:
– Scale 1: up to 168 MHz
– Scale 2: up to 144 MHz

D.2.3 STM32L0 series features three VCORE ranges

• Range 1 (VDD range limited to 1.71 to 3.6 V), with CPU running at a frequency up to
32 MHz
• Range 2 (full VDD range), with a maximum CPU frequency of 16 MHz
• Range 3 (full VDD range), with a maximum CPU frequency limited to 4.2 MHz.

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Appendix E STM32Cube embedded software packages

Along with STM32CubeMX C code generator, embedded software packages are part of
STM32Cube initiative (refer to DB2164 databrief): these packages include a low-level
hardware abstraction layer (HAL) that covers the microcontroller hardware, together with an
extensive set of examples running on STMicroelectronics boards (see Figure 644). This set
of components is highly portable across the STM32 series. The packages are fully
compatible with STM32CubeMX generated C code.

Figure 644. STM32Cube Embedded Software package

Evaluation board demonstration

Discovery board demonstration Dedicated board demonstration
(Demo builder framework)

Application level demonstrations

Middleware examples

(time, string, file..)

Utilities
Enhanced
TCP/IP USB Graphical FAT file
NAND
IwIP stack + Host & library system
memory

FreeRTOS
Polar SSL Device library STEmWin (FatFs)
driver

RTOS
Middleware level

CMSIS
HAL examples

Hardware Abstraction Layer APIs (HAL) Board Support Package (BSP)

Utilities
HAL APIs

Evaluation boards, discovery boards,

MCU Series (STM32F4, F1, F2, F3..)
dedicated demonstration boards
Hardware
MSv34720V2

Note: STM32CubeF0, STM32CubeF1, STM32CubeF2, STM32CubeF3, STM32CubeF4,

STM32CubeL0 and STM32CubeL1 embedded software packages are available on st.com.
They are based on STM32Cube release v1.1 (other series will be introduced progressively)
and include the embedded software libraries used by STM32CubeMX for initialization C
code generation.
The user should use STM32CubeMX to generate the initialization C code and the examples
provided in the package to get started with STM32 application development.

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Revision history

Table 27. Document revision history

STM32CubeMX
Date Revision Changes
release number

17-Feb-2014 1 4.1 Initial release.

Added support of STM32CubeF2 and STM32F2 Series in cover
page, Section 2.2: Key features, Section 5.14.1: Peripherals and
Middleware Configuration window, and Appendix E: STM32Cube
embedded software packages.
Updated Section 11.1: Creating a new STM32CubeMX Project,
Section 11.2: Configuring the MCU pinout, Section 11.6: Configuring
04-Apr-2014 2 4.2
the MCU initialization parameters.
Section “Generating GPIO initialization C code move to Section 8:
Tutorial 3- Generating GPIO initialization C code (STM32F1 Series
only) and content updated.
Added Section 18.6: Why do I get the error “Java 8 update 45” when
installing “Java 8 update 45” or a more recent version of the JRE?.
Added support of STM32CubeL0 and STM32L0 Series in cover page,
Section 2.2: Key features, Section 2.3: Rules and limitations and
Section 5.14.1: Peripherals and Middleware Configuration window
Added board selection in Table 13: File menu functions,
Section 5.7.3: Pinout menu and Section 4.2: New Project window.
Updated Table 15: Pinout menu.
Updated Figure 323: Power Consumption Calculator default view and
added battery selection in Section 5.3.1: Building a power
24-Apr-2014 3 4.3 consumption sequence.
Updated note in Section 5.3: Power Consumption Calculator view
Updated Section 11.1: Creating a new STM32CubeMX Project.
Added Section 19.7: Why does the RTC multiplexer remain inactive
on the Clock tree view?, Section 19.8: How can I select LSE and HSE
as clock source and change the frequency?, and Section 19.9: Why
STM32CubeMX does not allow me to configure PC13, PC14, PC15,
and PI8 as outputs when one of them is already configured as an
output?.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Added support of STM32CubeF0, STM32CubeF3, STM32F0 and

STM32F3 Series in cover page, Section 2.2: Key features,
Section 2.3: Rules and limitations,
Added board selection capability and pin locking capability in
Section 2.2: Key features, Table 2: Home page shortcuts, Section 4.2:
New Project window, Section 5.7: Toolbar and menus, Section 4.13:
Set unused/reset used GPIOs windows, Section 4.11: Project
Manager view, and Section 5.15: Pinout view. Added Section 5.15.1:
Pinning and labeling signals on pins.
Updated Section 5.16: Configuration view and Section 4.10: Clock
Configuration view and Section 5.3: Power Consumption Calculator
view.
Updated Figure 51: STM32CubeMX Main window upon MCU
selection, Figure 183: Project Settings window, Figure 310: About
window, Figure 140: STM32CubeMX Pinout view, Figure 120: Chip
view, Figure 323: Power Consumption Calculator default view,
Figure 324: Battery selection, Figure 87: Building a power
consumption sequence, Figure 326: Power consumption sequence:
New Step default view, Figure 333: Power Consumption Calculator
view after sequence building, Figure 334: Sequence table
19-Jun-2014 4 4.4 management functions, Figure 88: PCC Edit Step window, Figure 83:
Power consumption sequence: new step configured (STM32F4
example), Figure 331: ADC selected in Pinout view, Figure 332:
Power Consumption Calculator configuration window: ADC enabled
using import pinout, Figure 336: Description of the Results area,
Figure 100: Peripheral power consumption tooltip, Figure 537: Power
Consumption Calculation example, Figure 155: Sequence table and
Figure 156: Power Consumption Calculation results.
Updated Figure 142: STM32CubeMX Configuration view and
Figure 39: STM32CubeMX Configuration view - STM32F1 Series
titles.
Added STM32L1 in Section 5.3: Power Consumption Calculator view.
Removed Figure Add a new step using the PCC panel from
Section 8.1.1: Adding a step. Removed Figure Add a new step to the
sequence from Section 5.3.2: Configuring a step in the power
sequence.
Updated Section 8.2: Reviewing results.
Updated appendix B.3.4: FatFs and Appendix D: STM32
microcontrollers power consumption parameters. Added Appendix
D.1.3: STM32L0 series and D.2.3: STM32L0 series features three
VCORE ranges.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Added support of STM32CubeL1 Series in cover page, Section 2.2:

Key features, Section 2.3: Rules and limitations,
Updated Section 3.2.3: Uninstalling STM32CubeMX standalone
version.
Added off-line updates in Section 3.4: Getting updates using
STM32CubeMX, modified Figure 21: Embedded Software Packages
Manager window, and Section 3.4.3: Installing STM32 MCU
packages.
Updated Section 4: STM32CubeMX user interface introduction,
Table 2: Home page shortcuts and Section 4.2: New Project window.
Added Figure 43: New Project window - Board selector.
Updated Figure 191: Project Settings code generator.
Modified step 3 in Section 4.11: Project Manager view.
Updated Figure 39: STM32CubeMX Configuration view - STM32F1
Series.
Added STM32L1 in Section 5.14.1: Peripherals and Middleware
Configuration window.
Updated Figure 84: GPIO configuration window - GPIO selection;
Section 4.5.12: GPIO configuration window and Figure 89: DMA
19-Sep-2014 5 4.5 MemToMem configuration.
Updated introduction of Section 4.10: Clock Configuration view.
Updated Section 4.10.1: Clock tree configuration functions and
Section 4.10.3: Recommendations, Section 5.3: Power Consumption
Calculator view, Figure 326: Power consumption sequence: New
Step default view, Figure 333: Power Consumption Calculator view
after sequence building, Figure 83: Power consumption sequence:
new step configured (STM32F4 example), and Figure 332: Power
Consumption Calculator configuration window: ADC enabled using
import pinout. Added Figure 335: Power Consumption: Peripherals
consumption chart and updated Figure 100: Peripheral power
consumption tooltip. Updated Section 5.3.4: Power sequence step
parameters glossary.
Updated Section 6: STM32CubeMX C Code generation overview.
Updated Section 11.1: Creating a new STM32CubeMX Project and
Section 11.2: Configuring the MCU pinout.
Added Section 12: Tutorial 2 - Example of FatFs on an SD card using
STM32429I-EVAL evaluation board and updated Section 8: Tutorial
3- Generating GPIO initialization C code (STM32F1 Series only).
Updated Section 5.3.2: Configuring a step in the power sequence.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Complete project generation, power consumption calculation and

clock tree configuration now available on all STM32 Series.
Updated Section 2.2: Key features and Section 2.3: Rules and
limitations.
Updated Eclipse IDEs in Section 3.1.3: Software requirements.
Updated Figure 18: Updater Settings window, Figure 21: Embedded
Software Packages Manager window and Figure 43: New Project
window - Board selector, Updated Section 4.11: Project Manager
view and Section 4.14: Update Manager windows.
Updated Figure 310: About window.
Removed Figure STM32CubeMX Configuration view - STM32F1
Series.
Updated Table 17: STM32CubeMX Chip view - Icons and color
scheme.
Updated Section 5.14.1: Peripherals and Middleware Configuration
window.
Updated Figure 87: Adding a new DMA request and Figure 89: DMA
MemToMem configuration.
Updated Section 4.10.1: Clock tree configuration functions.
Updated Figure 324: Battery selection, Figure 87: Building a power
19-Jan-2015 6 4.6 consumption sequence, Figure 88: PCC Edit Step window.
Added Section 6.3: Custom code generation.
Updated Figure 491: Clock tree view and Figure 496: Pinout &
Configuration view.
Updated peripheral configuration sequence and Figure 498: Timer 3
configuration window in Section 11.6.2: Configuring the peripherals.
Removed Tutorial 3: Generating GPIO initialization C code
(STM32F1 Series only).
Updated Figure 502: GPIO mode configuration.
Updated Figure 537: Power Consumption Calculation example and
Figure 155: Sequence table.
Updated Appendix A.1: Block consistency, A.2: Block inter-
dependency and A.3: One block = one peripheral mode.
Appendix A.4: Block remapping (STM32F10x only): updated Section :
Example.
Appendix A.6: Block shifting (only for STM32F10x and when “Keep
Current Signals placement” is unchecked): updated Section :
Example
Updated Appendix A.8: Mapping a function individually.
Updated Appendix B.3.1: Overview.
Updated Appendix D.1.3: STM32L0 series.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Section 2.2: Key features: removed Pinout initialization C code

generation for STM32F1 Series from; updated Complete project
generation.
Updated Figure 21: Embedded Software Packages Manager window,
Figure 43: New Project window - Board selector.
Updated IDE list in Section 4.11: Project Manager view and modified
Figure 183: Project Settings window.
Updated Section 4.10.1: Clock tree configuration functions. Updated
Figure 179: STM32F469NIHx clock tree configuration view.
Section 5.3: Power Consumption Calculator view: added transition
checker option. Updated Figure 323: Power Consumption Calculator
default view, Figure 324: Battery selection and Figure 87: Building a
power consumption sequence. Added Figure 327: Enabling the
19-Mar-2015 7 4.7 transition checker option on an already configured sequence - All
transitions valid, Figure 328: Enabling the transition checker option on
an already configured sequence - At least one transition invalid and
Figure 329: Transition checker option - Show log. Updated
Figure 333: Power Consumption Calculator view after sequence
building. Updated Section : Managing sequence steps, Section :
Managing the whole sequence (load, save and compare). Updated
Figure 88: PCC Edit Step window and Figure 336: Description of the
Results area.
Updated Figure 537: Power Consumption Calculation example,
Figure 155: Sequence table, Figure 156: Power Consumption
Calculation results and Figure 158: Power consumption results - IP
consumption chart.
Updated Appendix B.3.1: Overview and B.3.5: FreeRTOS.
Added Section 3.2.2: Installing STM32CubeMX from command line
28-May-2015 8 4.8
and Section 3.3.2: Running STM32CubeMX in command-line mode.
Added STLM32F7 and STM32L4 microcontroller Series.
Added Import project feature. Added Import function in Table 13: File
menu functions. Added Section 4.12: Import Project window. Updated
Figure 326: Power consumption sequence: New Step default view,
Figure 88: PCC Edit Step window, Figure 83: Power consumption
sequence: new step configured (STM32F4 example), Figure 332:
Power Consumption Calculator configuration window: ADC enabled
using import pinout and Figure 87: Peripheral power consumption
tooltip.
09-Jul-2015 9 4.9 Updated command line to run STM32CubeMX in Section 3.3.2:
Running STM32CubeMX in command-line mode.
Updated note in Section 5.16: Configuration view.
Added new clock tree configuration functions in Section 4.10.1.
Updated Figure 504: Middleware tooltip.
Modified code example in Appendix B.1: STM32CubeMX generated
C code and user sections.
Updated Appendix B.3.1: Overview.
Updated generated .h files in Appendix B.3.4: FatFs.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Replace UM1742 by UM1940 in Section : Introduction.

Updated command line to run STM32CubeMX in command-line
mode in Section 3.3.2: Running STM32CubeMX in command-line
mode. Modified Table 1: Command line summary.
Updated board selection in Section 4.2: New Project window.
Updated Section 5.16: Configuration view overview. Updated
Section 5.14.1: Peripherals and Middleware Configuration window,
Section 4.5.12: GPIO configuration window and Section 4.5.13: DMA
configuration window. Added Section 4.5.11: User Constants
configuration window.
27-Aug-2015 10 4.10 Updated Section 4.10: Clock Configuration view and added reserve
path.
Updated Section 11.1: Creating a new STM32CubeMX Project,
Section 11.5: Configuring the MCU clock tree, Section 11.6:
Configuring the MCU initialization parameters, Section 11.7.2:
Downloading firmware package and generating the C code,
Section 11.8: Building and updating the C code project. Added
Section 11.9: Switching to another MCU.
Updated Section 12: Tutorial 2 - Example of FatFs on an SD card
using STM32429I-EVAL evaluation board and replaced STM32F429I-
EVAL by STM32429I-EVAL.
Updated Figure 21: Embedded Software Packages Manager window
and Section 3.4.7: Checking for updates.
Character string constant supported in Section 4.5.11: User
Constants configuration window.
Updated Section 4.10: Clock Configuration view.
16-Oct-2015 11 4.11 Updated Section 5.3: Power Consumption Calculator view.
Modified Figure 537: Power Consumption Calculation example.
Updated Section 13: Tutorial 3 - Using the Power Consumption
Calculator to optimize the embedded application consumption and
more.
Added Eclipse Mars in Section 3.1.3: Software requirements
Code generation options now supported by the Project Settings
menu.
Updated Section 3.1.3: Software requirements.
Added Project Settings in Section 4.12: Import Project window.
Updated Figure 196: Automatic project import; modified Manual
project import step and updated Figure 197: Manual project import
and Figure 198: Import Project menu - Try Import with errors;
03-Dec-2015 12 4.12 modified third step of the import sequence.
Updated Figure 83: Clock Tree configuration view with errors.
Added mxconstants.h in Section 6.1: STM32Cube code generation
using only HAL drivers (default mode).
Updated Figure 537: Power Consumption Calculation example to
Figure 546: Step 10 optimization.
Updated Figure 547: Power sequence results after optimizations.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Section 2.2: Key features:

– Information related to .ioc files.
– Clock tree configuration
– Automatic updates of STM32CubeMX and STM32Cube.
Updated limitation related to STM32CubeMX C code generation in
Section 2.3: Rules and limitations.
Added Linux in Section 3.1.1: Supported operating systems and
architectures. Updated Java Run Time Environment release number
in Section 3.1.3: Software requirements.
Updated Section 3.2.1: Installing STM32CubeMX standalone version,
Section 3.2.3: Uninstalling STM32CubeMX standalone version and
Section 3.3.1: Downloading STM32CubeMX plug-in installation
package.
Updated Section 3.3.1: Running STM32CubeMX as a standalone
application.
Updated Section 4.11: Project Manager view and Section 4.14:
Update Manager windows.
Updated Section 5.15.1: Pinning and labeling signals on pins.
Added Section 4.5.16: Setting HAL timebase source
Updated Figure 143: Configuration window tabs for GPIO, DMA and
NVIC settings (STM32F4 Series).
Added note related to GPIO configuration in output mode in
Section 4.5.12: GPIO configuration window; updated Figure 84: GPIO
03-Feb-2016 13 4.13 configuration window - GPIO selection.
Modified Figure 323: Power Consumption Calculator default view,
Figure 86: Building a power consumption sequence, Figure 325: Step
management functions, Figure 327: Enabling the transition checker
option on an already configured sequence - All transitions valid,
Figure 328: Enabling the transition checker option on an already
configured sequence - At least one transition invalid.
Added import pinout button icon in Section : Importing pinout.
Added Section : Selecting/deselecting all peripherals. Modified
Figure 333: Power Consumption Calculator view after sequence
building. Updated Section : Managing the whole sequence (load,
save and compare). Updated Figure 336: Description of the Results
area and Figure 100: Peripheral power consumption tooltip.
Updated Figure 537: Power Consumption Calculation example and
Figure 539: Sequence table.
Updated Section 6.3: Custom code generation.
Updated Figure 483: Pinout view with MCUs selection and
Figure 484: Pinout view without MCUs selection window in
Section 11.1: Creating a new STM32CubeMX Project.
Updated Section 11.6.2: Configuring the peripherals.
Updated Figure 509: Project Settings and toolchain selection and
Figure 510: Project Manager menu - Code Generator tab in
Section 11.7.1: Setting project options, and Figure 511: Missing
firmware package warning message in Section 11.7.2: Downloading
firmware package and generating the C code.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Upgraded STM32CubeMX released number to 4.14.0.

Added import of previously saved projects and generation of user files
from templates in Section 2.2: Key features.
Added MacOS in Section 3.1.1: Supported operating systems and
architectures, Section 3.2.1: Installing STM32CubeMX standalone
version, Section 3.2.3: Uninstalling STM32CubeMX standalone
version and Section 3.4.3: Running STM32CubeMX plug-in from
Eclipse IDE.
Added command lines allowing the generation of user files from
templates in Section 3.3.2: Running STM32CubeMX in command-line
mode.
Updated new library installation sequence in Section 3.4.2: Updater
configuration.
Updated Figure 107: Pinout menus (Pinout tab selected) and
Figure 108: Pinout menus (Pinout tab not selected) in Section 5.7.3:
15-Mar-2016 14 4.14 Pinout menu.
Modified Table 16: Window menu.
Updated Section 5.7: Output windows.
Updated Figure 183: Project Settings window and Section 4.11.1:
Project tab.
Updated Figure 102: NVIC settings when using SysTick as HAL
timebase, no FreeRTOS and Figure 103: NVIC settings when using
FreeRTOS and SysTick as HAL timebase in Section 4.5.16: Setting
HAL timebase source.
Updated Figure 75: User Constants tab and Figure 76: Extract of the
generated main.h file in Section 4.5.11: User Constants configuration
window.
Section 4.5.12: GPIO configuration window: updated Figure 84: GPIO
configuration window - GPIO selection, Figure 85: GPIO configuration
grouped by peripheral and Figure 86: Multiple pins configuration.
Updated Section 4.5.14: NVIC configuration window.
Import project function is no more limited to MCUs of the same Series
(see Section 2.2: Key features, Section 5.7.1: File menu and
Section 4.12: Import Project window ).
Updated command lines in Section 3.3.2: Running STM32CubeMX in
command-line mode.
Table 1: Command line summary: modified all examples related to
config comands as well as set dest_path <path> example.
18-May-2016 15 4.15 Added caution note for Load Project menu in Table 13: File menu
functions.
Updated Generate Code menu description in Table 14: Project menu.
Updated Set unused GPIOs menu in Table 15: Pinout menu.
Added case where FreeRTOS in enabled in Section : Enabling
interruptions using the NVIC tab view.
Added Section 4.5.15: FreeRTOS configuration panel.
Updated Appendix B.3.5: FreeRTOS and B.3.6: LwIP.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Replaced mxconstants.h by main.h in the whole document.

Updated Introduction, Section 3.1.1: Supported operating systems
and architectures and Section 3.1.3: Software requirements.
Added Section 3.4.4: Installing STM32 MCU package patches.
Updated Load project description in Table 2: Home page shortcuts.
Updated Clear Pinouts function in Table 15: Pinout menu.
Updated Section 4.11.3: Advanced Settings tab to add Low Layer
driver.
Added No check and Decimal and hexadecimal check options in
Table 17: Peripheral and Middleware Configuration window buttons
and tooltips.
Updated Section : Tasks and Queues tab and Figure 99: FreeRTOS
23-Sep-2016 16 4.17 heap usage.
Updated Figure 84: GPIO configuration window - GPIO selection.
Replaced PCC by Power Consumption Calculator in the whole
document.
Added Section 6.2: STM32Cube code generation using Low Layer
drivers; updated Table 23: LL versus HAL: STM32CubeMX generated
source files and Table 24: LL versus HAL: STM32CubeMX generated
functions and function calls.
Updated Figure 561: Pinout view - Enabling the RTC.
Added Section 14: Tutorial 4 - Example of UART communications
with an STM32L053xx Nucleo board.
Added correspondence between STM32CubeMX release number
and document revision.
Removed Windows XP and added Windows 10 in Section 3.1.3:
Software requirements.
Updated Section 3.2.3: Uninstalling STM32CubeMX standalone
version.
Added setDriver command line in Table 1: Command line summary.
Added List pinout compatible MCUs feature:
– Updated Table 15: Pinout menu.
21-Nov-2016 17 4.18 – Added Section 15: Tutorial 5: Exporting current project
configuration to a compatible MCU
Added Firmware location selection option in Section 4.11.1: Project
tab and Figure 183: Project Settings window.
Added Restore Default feature:
– Updated Table 8: Peripheral and Middleware configuration window
buttons and tooltips
– Updated Figure 77: Using constants for peripheral parameter
settings.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Project import no more limited to microcontrollers belonging to the

same Series: updated Introduction, Figure 196: Automatic project
import, Figure 197: Manual project import, Figure 198: Import Project
12-Jan-2017 18 4.19 menu - Try Import with errors and Figure 199: Import Project menu -
Successful import after adjustments.
Modified Appendix B.3.4: FatFs, B.3.5: FreeRTOS and B.3.6: LwIP.
Added Appendix B.3.7: Libjpeg.
Table 17: STM32CubeMX Chip view - Icons and color scheme:
– Updated list of alternate function example.
– Updated example and description corresponding to function
mapping on a pin.
– Added example and description for analog signals sharing the
same pin.
Updated Figure 87: Peripheral Configuration window (STM32F4
02-Mar-2017 19 4.20 Series), Figure 75: User Constants tab, Figure 81: Consequence
when deleting a user constant for peripheral configuration, Figure 82:
Searching for a name in a user constant list and Figure 83: Searching
for a value in a user constant list.
Added Section 5.3.6: SMPS feature.
Added Section 6.4: Additional settings for C project generation.
Added STM32CubeF4 to the list of packages that include Libjpeg in
Appendix B.3.7: Libjpeg.
Minor modifications in Section 1: STM32Cube overview.
Updated Figure 41: New Project window - MCU selector and
Figure 183: Project Settings window.
Updated description of Project Settings in Section 4.11.1: Project tab.
05-May-2017 20 4.21 Updated Figure 194: Advanced Settings window.
In Appendix B.3.7: Libjpeg, added STM32CubeF2 and
STM32CubeH7 in the list of software packages in which Libjpeg is
embedded.
Modified Figure 644: STM32Cube Embedded Software package look-
and-feel.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Added STM32H7 to the list of supported STM32 Series.

Added MCU data and documentation refresh capability in Section 3.4:
Getting updates using STM32CubeMX and updated Figure 18:
Updater Settings window.
Added capability to identify close MCUs in Section 4.2: New Project
window, updated Figure 41: New Project window - MCU selector,
added Figure 29: New Project window - MCU list with close function
and Figure 30: New Project window - List showing close MCUs.,
updated Figure 482: MCU selection.
06-Jul-2017 21 4.22 Updated Figure 51: STM32CubeMX Main window upon MCU
selection.
Added Rotate clockwise/Counter clockwise and Top/Bottom view in
Table 15: Pinout menu.
Added Section 4.1.4: Social links.
Updated Figure 344: Configuring the SMPS mode for each step.
Updated Section 6.2: STM32Cube code generation using Low Layer
drivers.
Updated Figure 509: Project Settings and toolchain selection.
Added STM32L4+ Series in Introduction, Section 5.3: Power
Consumption Calculator view and Section 6.2: STM32Cube code
generation using Low Layer drivers.
Added guidelines to run STM32CubeMX on MacOS in Section 3.3.1:
05-Sep-2017 22 4.22.1 Running STM32CubeMX as a standalone application. Removed
MacOS from Section 3.4.3: Running STM32CubeMX plug-in from
Eclipse IDE.
Added Section 19.10: Ethernet configuration: why cannot I specify
DP83848 or LAN8742A in some cases?
Added Section 1: General information.
Renamed Display close button into Display similar items in
Section 4.2: New Project window.
Added Refresh Data and Docs & Resources menus in
Section 5.7.5: Help menu.
18-Oct-2017 23 4.23
Added STM32F2, STM32F4 and STM32F7 Series in Section 6.2:
STM32Cube code generation using Low Layer drivers.
Added Appendix B.3.8: Mbed TLS.
Updated STM32CubeMX release number corresponding to user
manual revision 22.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Replaced “STM32Cube firmware package” by “STM32Cube MCU

package”.
Updated Section 1: STM32Cube overview.
Updated MacOS in Section 3.1.1: Supported operating systems and
architectures. Updated Eclipse requirements in Section 3.1.3:
Software requirements.
Section 3.4: Getting updates using STM32CubeMX:
– updated section introduction
– updated Figure 13: Connection Parameters tab - No proxy
– Section 3.4.3 renamed into “Installing STM32 MCU packages” and
updated.
– renamed Section 3.4.4 into “Installing STM32 MCU package
patches”
– added Section 3.4.5: Installing embedded software packs
– updated Section 3.4.7: Checking for updates
Updated Figure 43: New Project window - Board selector.
Updated Figure 52: STM32CubeMX Main window upon board
selection (peripherals not initialized) and introductory sentence.
Updated Figure 53: STM32CubeMX Main window upon board
selection (peripherals initialized with default configuration) and
introductory sentence.
16-Jan-2018 24 4.24 Added “Select additional software components” menu in Table 14:
Project menu.
“Install new libraries” menu renamed “Manage embedded software
packages” and corresponding description updated in Table 17: Help
menu.
Updated Section 3.4.6: Removing already installed embedded
software packages.
Updated Section 4.14: Update Manager windows
Added Section 4.15: Software Packs component selection window.
Added pin stacking function in Table 17: STM32CubeMX Chip view -
Icons and color scheme.
Section 6.2: STM32Cube code generation using Low Layer drivers:
added STM32F0, STM32F3, STM32L0 in the list of product Series
supporting low-level drivers.
Section 12: Tutorial 2 - Example of FatFs on an SD card using
STM32429I-EVAL evaluation board: updated Figure 529: Board
selection and modified step 6 of the sequence for generating a project
and running tutorial 2.
Section 14: Tutorial 4 - Example of UART communications with an
STM32L053xx Nucleo board: updated Figure 548: Selecting
NUCLEO_L053R8 board.
Added Section 16: Tutorial 6 – Adding embedded software packs to
user projects.
Added Appendix B.3.9: TouchSensing and B.3.10: PDM2PCM.
24 Section 4.5.14: NVIC configuration window/Default initialization
16-Jan-2018 4.24
(cont’d) sequence of interrupts: changed color corresponding to interrupt
enabling code from green to black bold.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Introduction, Section 1: STM32Cube overview, Section 2.3:

Rules and limitations, Section 3.2.1: Installing STM32CubeMX
standalone version, Section 4: STM32CubeMX user interface,
Section 4.11.1: Project tab and Section 5.13.1: Peripheral and
Middleware tree panel.
Minor text edits across the whole document.
Updated Table 13: File menu functions and Table 12: Relations
between power over-drive and HCLK frequency.
Updated Figure 41: New Project window - MCU selector, Figure 27:
Enabling graphics choice in MCU selector, Figure 183: Project
07-Mar-2018 25 4.25 Settings window, Figure 188: Selecting a different firmware location,
Figure 77: Enabling STemWin framework, Figure 116: Configuration
view for Graphics, Figure 562: Pinout view - Enabling LSE and HSE
clocks and Figure 563: Pinout view - Setting LSE/HSE clock
frequency.
Added Export to Excel feature, Show favorite MCUs feature and
Section 4.4.16: Graphics frameworks and simulator.
Added Section 17: Tutorial 8 – Using STemWin Graphics framework,
Section 18: Tutorial 9: Using STM32CubeMX Graphics simulator and
their subsections.
Added Section B.3.11: Graphics.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated STM32Cube logo on cover page.

Replaced STMCube™ by STM32Cube™ in the whole document.
Updated Section 1: STM32Cube overview.
Updated Figure 1: Overview of STM32CubeMX C code generation
flow.
Updated Section 2.2: Key features to add new features: graphic
simulator feature, Support of embedded software packages in
CMSIS-Pack format and Contextual Help.
Changed Section 3.4 title into “Getting updates using
STM32CubeMX”. Suppressed figures Connection Parameters tab -
No proxy and Connection Parameters tab - Use System proxy
parameters. Updated Figure 22: Managing embedded software
packages - Help menu.
In Section 3.4.5: Installing embedded software packs, updated step 3f
of the embedded software pack installation sequence and added
Figure 27: License agreement acceptance.
05-Sep-2018 26 4.27
Section 4.2: New Project window: updated Figure 41: New Project
window - MCU selector, Figure 42: Marking a favorite and Figure 43:
New Project window - Board selector.
Section 5.7.1: File menu: added caution note for New Project in
Table 13: File menu functions. Updated Figure 107: Pinout menus
(Pinout tab selected) and Figure 108: Pinout menus (Pinout tab not
selected).
Section 4.11: Project Manager view:
– Added note related to project saving (step 3).
– Updated Figure 183: Project Settings window
– Updated Section 4.11.1: Project tab and Figure 188: Selecting a
different firmware location.
Added Section 4.15.4: Component dependencies panel, Contextual
help, Section 10: Support of additional software components using
CMSIS-Pack standard and Section 17: Tutorial 7 – Using the X-Cube-
BLE1 software pack.
Updated Section 3.4.3: Installing STM32 MCU packages,
Section 3.4.5: Installing embedded software packs, Section 3.4.6:
Removing already installed embedded software packages,
Section 3.4.7: Checking for updates and the figures in it.
Updated Section 4: STM32CubeMX user interface, its subsections
and the figures and the tables in them.
Updated Section 10: Support of additional software components
using CMSIS-Pack standard, sections 11.6.1 to 11.6.5,
12-Nov-2018 27 4.28 Section 11.7.1: Setting project options, Section 11.7.2: Downloading
firmware package and generating the C code, Section 11.8: Building
and updating the C code project, Section 11.9: Switching to another
MCU, Section 12: Tutorial 2 - Example of FatFs on an SD card using
STM32429I-EVAL evaluation board and the figures in it, Section 15:
Tutorial 5: Exporting current project configuration to a compatible
MCU and the figures in it, Section 16: Tutorial 6 – Adding embedded
software packs to user projects and Section 17: Tutorial 7 – Using the
X-Cube-BLE1 software pack.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Added Section 19: Tutorial 10: Using ST-TouchGFX framework and

its subsections.
Updated Table 24: LL versus HAL: STM32CubeMX generated
functions and function calls.
Removed former Figure 164: Enabling and configuring a CMSIS-
Pack software component, Figure 192: FatFs peripheral instances,
Figure 213: Project Import status, Figure 254: Saving software
component selection as user preferences and Figure 268:
Configuring X-Cube-BLE1.
Updated Figure 1: Overview of STM32CubeMX C code generation
flow, Figure 16: STM32Cube installation wizard, Figure 7: Closing
STM32CubeMX perspective, Figure 9: Opening Eclipse plug-in,
Figure 10: STM32CubeMX perspective, Figure 337: Overall
peripheral consumption, Figure 456: User constant generating define
statements, Figure 479: Selecting a CMSIS-Pack software
component, Figure 480: Enabling and configuring a CMSIS-Pack
software component, Figure 481: Project generated with CMSIS-
Pack software component, Figure 482: MCU selection, Figure 483:
Pinout view with MCUs selection, Figure 484: Pinout view without
MCUs selection window, Figure 486: Timer configuration, Figure 487:
Simple pinout configuration, Figure 488: Save Project As window,
Figure 489: Generate Project Report - New project creation,
Figure 490: Generate Project Report - Project successfully created,
Figure 491: Clock tree view, Figure 496: Pinout & Configuration view,
Figure 497: Case of Peripheral and Middleware without configuration
27 parameters, Figure 498: Timer 3 configuration window, Figure 499:
12-Nov-2018 5.0
(cont’d) Timer 3 configuration, Figure 500: Enabling Timer 3 interrupt,
Figure 501: GPIO configuration color scheme and tooltip, Figure 502:
GPIO mode configuration, Figure 503: DMA parameters configuration
window, Figure 504: Middleware tooltip, Figure 505: USB Host
configuration, Figure 505: USB Host configuration, Figure 506: FatFs
over USB mode enabled, Figure 507: System view with FatFs and
USB enabled, Figure 508: FatFs define statements, Figure 509:
Project Settings and toolchain selection, Figure 510: Project Manager
menu - Code Generator tab, Figure 511: Missing firmware package
warning message, Figure 513: Updater settings for download,
Figure 514: Updater settings with connection, Figure 515:
Downloading the firmware package, Figure 516: Unzipping the
firmware package, Figure 517: C code generation completion
message, Figure 527: Import Project menu, Figure 557: Project
Settings menu, Figure 567: Additional software components enabled
for the current project, Figure 568: Pack software components: no
configurable parameters, Figure 569: Pack tutorial: project settings,
Figure 572: Embedded software packages, Figure 574: Installing
Embedded software packages, Figure 575: Starting a new project -
selecting the NUCLEO-L053R8 board, Figure 576: Starting a new
project - initializing all peripherals, Figure 577: Selecting X-Cube-
BLE1 components, Figure 578: Configuring peripherals and GPIOs,
Figure 579: Configuring NVIC interrupts, Figure 580: Enabling X-
Cube-BLE1, Figure 580: Enabling X-Cube-BLE1, Figure 581:
Configuring the SensorDemo project and Figure 312: Graphics
simulator user interface.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Introduction, Section 1: STM32Cube overview, Section 2.2:

Key features, Section 3.1.3: Software requirements, Section 3.4.3:
Installing STM32 MCU packages, Section 4: STM32CubeMX user
interface, Resolving pin conflicts, Section 4.5.10: Component
configuration panel, Section 4.10: Clock Configuration view,
Section 4.11: Project Manager view, Section 4.11.1: Project tab,
Section 4.11.3: Advanced Settings tab, Using the transition checker,
Section 9.2: STM32CubeMX Device tree generation, Section 6.3.2:
Saving and selecting user templates, .extSettings file example and
generated outcomes and Section 11.6.4: Configuring the DMAs.
Added Section 4.6: Pinout & Configuration view for STM32MPUs,
Section 4.6.2: Boot stages configuration, Section 5: STM32CubeMX
tools, Section 9: Device tree generation (STM32MPUs only),
Section B.3.11: STM32WPAN BLE/Thread (STM32WB series only),
Section B.3.13: OpenAmp and RESMGR_UTILITY (STM32MPUs
19-Feb-2019 28 5.0 and STM32H7 dual-core products) and their subsections.
Removed former Section 1: General information.
Updated Table 2: Home page shortcuts, Table 5: Component list,
mode icons and color schemes, Table 6: Pinout menu and shortcuts
and title of Table 9: Clock configuration view widgets.
Updated Figure 183: Project Settings window, Figure 184: Project
folder, Figure 188: Selecting a different firmware location, Figure 196:
Automatic project import, Figure 197: Manual project import,
Figure 198: Import Project menu - Try Import with errors, Figure 199:
Import Project menu - Successful import after adjustments,
Figure 200: Set unused pins window, Figure 201: Reset used pins
window, Figure 310: About window, Figure 477: STM32CubeMX
generated DTS – Extract 3, Figure 479: Selecting a CMSIS-Pack
software component, Figure 480: Enabling and configuring a CMSIS-
Pack software component, Figure 534: FATFS tutorial - Project
settings and Figure 535: C code generation completion message.
Updated Introduction. Section 3.1.3: Software requirements,
Section 4.2: New Project window, MCU close selector feature,
External clock sources, Importing pinout, Selecting/deselecting all
peripherals, Section 4.6: Pinout & Configuration view for
STM32MPUs, Section 4.15: Software Packs component selection
window, Section 5.4.1: DDR configuration, Section 6.2: STM32Cube
code generation using Low Layer drivers, BLE configuration and
Section B.3.13: OpenAmp and RESMGR_UTILITY (STM32MPUs
and STM32H7 dual-core products).
16-Apr-2019 29 5.1
Added Section 4.2.1: MCU selector, Section 4.2.2: Board selector,
Section 4.2.4: Cross selector, Section 4.8: Pinout & Configuration
view for STM32H7 dual-core products, Section 5.3.9: Example
feature (STM32MPUs and STM32H7 dual-core only) and Section 7:
Code generation for dual-core MCUs (STM32H7 dual-core product
lines only).
Removed former Section 3.3: Installing STM32CubeMX plug-in
version and its subsections, and former Section 3.4.3: Running
STM32CubeMX plug-in from Eclipse IDE.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Table 3: Window menu.

Updated figures 27 to 43, Figure 194: Advanced Settings window,
figures 323 to 330, 332 to 335 and 337 to 346, Figure 509: Project
29 Settings and toolchain selection and figures 537 to 547,
16-Apr-2019 5.1
(cont’d) Added Figure 38: New Project window shortcuts, Figure 106:
STM32MPUs: assignment options for GPIOs, Figure 642: Resource
Manager: peripheral assignment view and Figure 644: STM32Cube
Embedded Software package.
Updated Introduction. Section 2.2: Key features, Section 3.3.2:
Running STM32CubeMX in command-line mode, Part number
selection, Section 4.15: Software Packs component selection
window, Section 4.15.1: Introduction on software components,
Section 4.15.2: Filter panel, Section 4.15.3: Packs panel,
Section 4.15.4: Component dependencies panel, Section 4.15.6:
Updating the tree view for additional software components,
Section 5.3: Power Consumption Calculator view and Section 6.2:
STM32Cube code generation using Low Layer drivers.
Updated Table 1: Command line summary, Table 6: Pinout menu and
01-Oct-2019 30 5.2 shortcuts, Table 16: Additional Software window – Packs panel icons
and Table 17: Component dependencies panel contextual help.
Updated Figure 34: STM32CubeMX Home page, Figure 207:
Selection of additional software components, Figure 208: Additional
software components - Updated tree view, Figure 479: Selecting a
CMSIS-Pack software component and Figure 577: Selecting X-Cube-
BLE1 components.
Added Section 4.5.8: Pinout for multi-bonding packages and
Section 4.15.5: Details and Warnings panel.
Added Table 15: Additional Software window – Packs panel columns

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Introduction, Section 1: STM32Cube overview, Section 4.2:

New Project window, MCU/MPU selection for a new project and
Section 11.7.1: Setting project options.
Added Section 4.9: Enabling security in Pinout & Configuration view
(STM32L5 and STM32U5 series only) with its subsections,
Section 4.10.2: Securing clock resources (STM32L5 series only) and
Section 8: Code generation with TrustZone® enabled (STM32L5
series only).
Removed former Section 4.4.16: Graphics frameworks and simulator,
Section 17: Tutorial 8 – Using STemWin Graphics framework,
Section 18: Tutorial 9: Using STM32CubeMX Graphics simulator,
Section 19: Tutorial 10: Using ST-TouchGFX framework and
Section B.3.11: Graphics.
Minor text edits across the whole document.
13-Dec-2019 31 5.4 Updated Table 1: Command line summary.
Updated Figure 69: Pinout view: MCUs with multi-bonding, Figure 70:
Pinout view: multi-bonding with extended mode, Figure 106:
STM32MPUs: assignment options for GPIOs, Figure 183: Project
Settings window, Figure 354: DDR Suite - Connection to target,
Figure 355: DDR Suite - Target connected, Figure 356: DDR activity
logs, Figure 357: DDR interactive logs, Figure 358: DDR register
loading, Figure 359: DDR test list from U-Boot SPL, Figure 360: DDR
test suite results, Figure 361: DDR tests history, Figure 175: DDR
tuning pre-requisites, Figure 176: DDR tuning process, Figure 177:
Bit deskew, Figure 178: Eye training (centering) panel, Figure 179:
DDR Tuning - saving to configuration, Figure 474: Project settings for
STM32CubeIDE toolchain and Figure 509: Project Settings and
toolchain selection.
Added Figure 39: Enabling TrustZone.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Section 2.2: Key features, Section 3.1.1: Supported

operating systems and architectures, Section 3.1.3: Software
requirements, Section 3.2.1: Installing STM32CubeMX standalone
version, Section 3.4: Getting updates using STM32CubeMX,
Section 3.4.5: Installing embedded software packs, Section 4.2: New
Project window, Export to Excel feature, Section 4.5: Pinout &
Configuration view, Section 4.11.3: Advanced Settings tab and
Section 18.6: Why do I get the error “Java 8 update 45” when
installing “Java 8 update 45” or a more recent version of the JRE?.
Added Section 4.2.3: Example selector, Section 5.1: External Tools,
Section 19.2: Since I changed my login to access the Internet, some
software packs appear not available. and Section 19.3: On dual-
context products, why some peripherals or middleware are not
10-Jul-2020 32 6.0 available for a given context?.
Removed former MCU selection based on graphics criteria.
Updated Table 4: Help menu shortcuts and Table 14: Additional
software window - Filter icons.
Updated Figure 34: STM32CubeMX Home page, Figure 38: New
Project window shortcuts, Figure 43: New Project window - Board
selector, Figure 46: Cross selector - Data refresh prerequisite,
Figure 194: Advanced Settings window, Figure 204: Additional
software window, Figure 200: Device tree generation for the Linux
kernel, Figure 201: STM32CubeMX Device tree generation for U-
boot, Figure 202: STM32CubeMX Device tree generation for TF-A,
Figure 577: Selecting X-Cube-BLE1 components and Figure 306:
Java Control Panel.
Updated Introduction, Section 3.1.3: Software requirements,
Section 3.4.7: Checking for updates, Section 4.15.3: Packs panel,
Section 5.1: External Tools, Section 12: Tutorial 2 - Example of FatFs
on an SD card using STM32429I-EVAL evaluation board and
Section 18.6: Why do I get the error “Java 8 update 45” when
installing “Java 8 update 45” or a more recent version of the JRE?.
10-Nov-2020 33 6.1 Added Choosing not to generate code for some peripherals or
middlewares.
Updated Table 1: Command line summary.
Updated Figure 33: Help menu: checking for updates, Figure 34:
STM32CubeMX Home page, Figure 194: Advanced Settings window,
Figure 204: Additional software window, Figure 311: ST Tools and
Figure 530: SDIO peripheral configuration.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Section 3.1.1: Supported operating systems and

architectures, Section 3.1.3: Software requirements, Section 3.2.1:
Installing STM32CubeMX standalone version, Section 3.2.2:
Installing STM32CubeMX from command line, Section 3.2.3:
Uninstalling STM32CubeMX standalone version, Section 3.3.2:
Running STM32CubeMX in command-line mode, Warning: in
Section 3.4.7: Checking for updates, Section 4.1: Home page,
Section 4.15: Software Packs component selection window,
Section 4.15.2: Filter panel, Section 4.15.3: Packs panel,
Section 4.15.4: Component dependencies panel, Section 4.15.5:
12-Feb-2021 34 6.2 Details and Warnings panel and Section 12: Tutorial 2 - Example of
FatFs on an SD card using STM32429I-EVAL evaluation board.
Updated Table 6: Pinout menu and shortcuts.
Added Figure 2: Full disk access for macOS and Figure 205:
Component dependency resolution.
Updated Figure 34: STM32CubeMX Home page, Figure 39: Enabling
TrustZone, Figure 204: Additional software window.
Removed former Figure 5: Auto-install command line and former
Section 18.6: Why do I get the error “Java 8 update 45” when
installing “Java 8 update 45” or a more recent version of the JRE?.
Updated Section 3.1.1: Supported operating systems and
architectures, Section 3.1.3: Software requirements, Section 4.2:
New Project window, Section 4.3: Project page, Section 4.5.5: Pinout
view advanced actions, Section 4.9: Enabling security in Pinout &
Configuration view (STM32L5 and STM32U5 series only) and code in
Section 12: Tutorial 2 - Example of FatFs on an SD card using
STM32429I-EVAL evaluation board.
22-Jun-2021 35 6.3 Added Figure 40: Adjusting selector results and Section 19.1: I
encountered a network connection error during a download from
STM32CubeMX.
Updated Table 1: Command line summary, Table 16: Additional
Software window – Packs panel icons and Table 17: Component
dependencies panel contextual help.
Updated Figure 479: Selecting a CMSIS-Pack software component
and Figure 577: Selecting X-Cube-BLE1 components.
Updated Section 2.2: Key features, Section 3.3.1: Running
STM32CubeMX as a standalone application, Section 3.4: Getting
updates using STM32CubeMX, Section 4.2: New Project window,
Enabling interruptions using the NVIC tab view, Section 4.9: Enabling
security in Pinout & Configuration view (STM32L5 and STM32U5
05-Nov-2021 36 6.4 series only), Section 4.11.1: Project tab and Section 5.3.7: Bluetooth
Low-Energy®/ZigBee® support (STM32WB series only).
Added Section 3.4.1: Running STM32CubeMX behind a proxy server
and Section 5.3.8: Sub-GHz support (STM32WL series only).
Updated Figure 90: NVIC configuration tab - FreeRTOS disabled.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Introduction and Section 3.1.1: Supported operating

systems and architectures.
Added Section 18: Creating LPBAM projects with its subsections, and
18-Feb-2022 37 6.5
Section 19.11: How to fix MX_DMA_Init call rank in STM32CubeMX
generated projects?.
Minor text edits across the whole document.
Updated Introduction, Section 2.2: Key features, Section 3.3.2:
Running STM32CubeMX in command-line mode, Boot loader (A7
FSBL) peripherals selection, Section 4.11.1: Project tab,
Section 4.16: LPBAM Scenario & Configuration view, Section 9.1:
Device tree overview, and Section 9.2: STM32CubeMX Device tree
generation.
Updated Table 1: Command line summary.
14-Jun-2022 38 6.6
Updated Figure 310: About window.
Added Section 4.17: CAD Resources view section and Section 18.6:
LPBAM application for TrustZone® activated projects.
Removed former Section 9.2.1: Device tree generation for Linux
kernel, Section 9.2.2: Device tree generation for U-boot, and
Section 9.2.3: Device tree generation for TF-A.
Minor text edits across the whole document.
Updated Section 2.2: Key features and Section 17: Tutorial 7 – Using
the X-Cube-BLE1 software pack.
Added Section 19.12: When is the PeriphCommonClock_Config()
function generated? and Section 19.13: How to handle thread-safe
solution in STM32CubeMX and STM32CubeIDE?.
17-Nov-2022 39 6.7
Updated Figure 41: New Project window - MCU selector, Figure 42:
Marking a favorite, Figure 29: New Project window - MCU list with
close function, Figure 30: New Project window - List showing close
MCUs, and Figure 310: About window.
Minor text edits across the whole document.
Updated Section 3.2.1: Installing STM32CubeMX standalone version,
Section 3.3.2: Running STM32CubeMX in command-line mode,
Section 3.4.1: Running STM32CubeMX behind a proxy server, and
Section 4.11.1: Project tab.
Added Section 4.18: Boot path and its subsections.
21-Feb-2023 40 6.8
Removed former Section 5.3.4: DDR tuning and DDR tuning tab
(read-only).
Updated Figure 41: New Project window - MCU selector, Figure 183:
Project Settings window, and Figure 605: Design check.
Minor text edits across the whole document.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Introduction, Section 3.1.1: Supported operating systems

and architectures, Java™ Runtime Environment, Section 4.15:
Software Packs component selection window, Section 4.18: Boot
path, Section 4.18.2: Creating a boot path project: an example,
Section 4.18.5: How to configure an ST-iRoT with a secure manager
NS application boot path, and note in Section 18.4: Checking the
LPBAM design.
Updated Table 1: Command line summary.
Added note to Section 9.2: STM32CubeMX Device tree generation.
Added figures 220 to 224 and Figure 272: Code generated with
secure manager API.
03-Jul-2023 41 6.9
Added Section 4.18.6: How to configure an assembled boot path,
Section 4.19: User authentication, Section 4.18: STM32CubeMX
Memory Management Tool and their subsections, and
Section B.3.12: CMSIS packs selection limitation.
Updated Figure 46: Cross selector - Data refresh prerequisite,
Figure 216: Boot paths for STM32H57x devices, Figure 226: Select
the STM32H5 device, Figure 228: Boot paths for STM32H56x
devices, figures 231 to 244, figures 167 to 255, figures 257 to 259,
figures 263 to 267, Figure 271: Secure manager API configuration,
and Figure 310: About window.
Minor text edits across the whole document.
Updated for the replacement of “boot path settings” with “boot path
and debug authentication” in
– Section 4.18.4: How to configure an ST-iRoT boot path
– Section 4.18.5: How to configure an ST-iRoT with a secure
manager NS application boot path
08-Sep-2023 42 6.9.2
– Figure 240, Figure 254, and Figure 266 titles
Updated Figure 266: Boot path and Debug Authentication tab.
Updated figures 216 to 224 in Section 4.18.1: Available boot paths.
Updated Section 1: STM32Cube overview.
Minor text edits across the whole document.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Section 4.11: Project Manager view, Section 4.18.5: How to

configure an ST-iRoT with a secure manager NS application boot
path, Step 3: OEMiROT (assembled) code generation, Step 6:
Authentication and encryption keys regeneration, option byte file
generation, and Section 4.18: STM32CubeMX Memory Management
Tool.
Added Section 4.19.3: Password restoration.
Removed former MCU close selector feature.
Updated Table 18: Boot paths without TrustZone® (TZEN = 0) and
Table 19: Boot paths with TrustZone® (TZEN = 1).
20-Nov-2023 43 6.10.0 Updated Figure 220: Application boot path (OEM-uRoT assembled),
Figure 221: Application boot path: ST-iRoT and uRoT
secure/nonsecure project, Figure 223: Application boot path: ST-iRoT
dual figure, Figure 238: Project provisioning, Figure 240: Boot path
and debug authentication panel, Figure 247: IDE post build
commands, Figure 258: IDE post build commands, Figure 270: IDE
post build commands, figures 352 to 355, Figure 358: DDR register
loading, and Figure 359: DDR test list from U-Boot SPL.
Removed former Figure 167: Selection of the OEMiRoT_Boot project
and Figure 195: Generated project.
Minor text edits across the whole document.
Updated Section 3.1.1: Supported operating systems and
architectures, Section 3.2.1: Installing STM32CubeMX standalone
version, Section 3.2.2: Installing STM32CubeMX from command line,
Uninstalling STM32CubeMX on Windows, Feature: MMT usage,
Pinout, and Configuration UI, and Section 4.18.6: How to configure
an assembled boot path.
Added footnote to Table 1: Command line summary.
Updated Table 10: Clock Configuration security settings, Table 18:
Boot paths without TrustZone® (TZEN = 0), and Table 19: Boot paths
with TrustZone® (TZEN = 1).
Added Section 4.18.7: How to configure OEM-uRoT (STiRot uROT)
boot path, When using H7Rx/H7Sx with MMT, When using
13-Mar-2024 44 6.11.0
H7Rx/H7Sx, and their subsections.
Added Figure 236: MMT view (H7Rx-H7Sx devices) and Figure 255:
Memory assignment for context Boot H7RS.
Updated Figure 9: Package installation, Figure 10: Installation script,
Figure 11: Installation path, Figure 221: Application boot path: ST-
iRoT and uRoT secure/nonsecure project, Figure 223: Application
boot path: ST-iRoT dual figure, Figure 233: Boot path selection,
Figure 240: Boot path and debug authentication panel, Figure 244:
Generate the code, Figure 254: Boot path and Debug Authentication
tab, Figure 266: Boot path and Debug Authentication tab, and
Figure 275: Boot path project.
Minor text edits across the whole document.

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Table 27. Document revision history (continued)

STM32CubeMX
Date Revision Changes
release number

Updated Section 2.2: Key features, Java™ Runtime Environment,

Section 3.4.7: Checking for updates, Step 5: Boot path selection,
Section 4.6: Pinout & Configuration view for STM32MPUs,
Section 4.18.7: How to configure OEM-uRoT (STiRot uROT) boot
path, Section 4.19: User authentication, Section 4.19.1: Login with an
existing my.st.com account, and Section 8: Code generation with
TrustZone® enabled (STM32L5 series only).
Added note to Section 3.4.2: Updater configuration.
Added Section 4.4: Boot chain (STM32MPUs), Section 4.7: RIF
configuration, Section 4.18.8: How to configure ST-iRoT boot path
with STM32H7RS devices, Section 5.5: STM32CubeMX Memory
26-Jun-2024 45 6.12.0 Management Tool, and their subsections.
Updated Table 1: Command line summary and Table 19: Boot paths
with TrustZone® (TZEN = 1).
Added Table 20: Boot paths for STM32H7RS devices.
Added Figure 20: Connection failure and Figure 32: Updates are
available.
Updated Figure 45: Popup window - Starting a project from an
example, Figure 280: Boot path project, Figure 509: Project Settings
and toolchain selection, and Figure 591: Available IPs.
Removed former Section 4.18: STM32CubeMX Memory
Management Tool, Section 19: FAQ, and their subsections.
Minor text edits across the whole document.
Updated Section 3.1.1: Supported operating systems and
architectures, Section 3.1.3: Software requirements, Section 4.7.2:
RIF global configurations, Section 4.7.4: Peripheral instance
protection, Section 4.7.7: Masters configuration, Section 4.7.9:
System peripherals (STM32MP2 and STM32N6 series),
Section 4.7.10: Memories protection for STM32MP2 series,
20-Nov-2024 46 6.13.0 Section 4.19: User authentication, and Section 5.5.1: STM32U5,
STM32H5, STM32WBA, and STM32WBAM with TrustZone activated
Added Section 4.7.10: Memories protection for STM32MP2 series,
Section 4.7.11: Memories protection for STM32N6 series,
Section 4.7.13: Implementation of illegal access controller (IAC)
feature on STM32N6 series, Section 5.2: Compare Projects, and
Section 5.5.5: STM32H7 Dual-core without Trust Zone activated

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