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HOME SCORE CARD TIME MANAGEMENT QUESTIONS REPORT SOLUTION

MY TEST

MY PROFILE Solution Report For Digital Circuits­ Part 1

Represent whole test solution with correct and incorrect answers.
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Q.1 Consider the circuit given below

Which of the following statements is true for Y.

a.

b.

c.

d.

Attempt Incorrect Your Ans. c Correct Ans. d

FAQ? Have any doubt? Solution

Q.2 Two half adders are connected in cascade as shown below.

The output ‘S’ and ‘C ’ is

a.

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b.

c.

d.

Attempt Correct Correct Ans. c

FAQ? Have any doubt? Solution

Q.3 Consider the circuit shown in figure below

If propagation delay of NOT gate is 10 nsec, AND gate is 20 nsec and X ­OR gate
is 10 nsec. If A is
connected to VCC at t = 0, then waveform for output Y is

a.

b.

c.

d.

Attempt Correct Correct Ans. b

FAQ? Have any doubt? Solution

Q.4 Which of the following statement is Incorrect for the range of n bits binary
numbers

a. Range of unsigned numbers is 0 to 2n – 1.

b. Range of signed numbers is –2n – 1 + 1 to 2n – 1 – 1

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c. Range of signed 1’s compliment numbers is –2n – 1 + 1 to 2n – 1

d. Range of signed 2’s compliment numbers is –2n – 1 to 2n – 1 – 1

Attempt Correct Correct Ans. c

FAQ? Have any doubt? Solution

Q.5 Consider the logical functions given below.

f1 (A, B, C) = Σ(2, 3, 4)
f2 (A, B, C) = π(0, 1, 3, 6, 7)

If f is logic zero, then maximum number of possible minterms in function f3 are

_____.

Attempt Incorrect Your Ans. 1 Correct Ans. 6

FAQ? Have any doubt? Solution

Q.6 A one bit full adder takes 75 nsec to produce sum and 50 nsec to produce carry.
A 4 bit parallel adder is designed using this type of full adder. The maximum rate

of additions per second can be provided by 4 bit parallel adder is A × 106

additions/sec. The value of A is _____

Not Attempt Correct Ans. 4.44 (4.20 ­ 4.60)

FAQ? Have any doubt? Solution

Q.7
If in a base ‘r ’ number system = 13, the base of the number system is

_________.

Attempt Correct Correct Ans. 8

FAQ? Have any doubt? Solution

Q.8 Consider the digital circuit shown below

It represents

a. Half adder followed by half subtractor

b. Half subtractor followed by half adder
c. Half adder followed by a half adder
d. A full adder

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Not Attempt Correct Ans. a

FAQ? Have any doubt? Solution

Q.9 Five soldiers A, B, C, D and E volunteer to perform an important military task if

their following conditions are satisfied
(i) either A or B or both must go
(ii) either C or E but both must not go
(iii) either both A and C go or neither goes
(iv) If ‘D’ goes, then ‘E ’ must also go
(v) If ‘B’ goes, then A and C must also go

The minimal combination of soldiers who can get the arrangement will be

a. ADE

b.

c.

d.

Attempt Incorrect Your Ans. c Correct Ans. b

FAQ? Have any doubt? Solution

Q.10 The logic function f(A, B, C, D) implemented by the circuit shown below is

a.

b.

c.

d.

Attempt Correct Correct Ans. b

FAQ? Have any doubt? Solution

Q.11 Consider a System S as shown in the figure below

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System S performs 1’s compliment of the input and then 2’s compliment to
produce output.
A new System H is designed in which 3 System S are cascaded

the applied input (I3 I2 I1 I0 ) is 1010, then the output (O3 O2 O1 O0 ) is

a. 1010
b. 0101
c. 1101
d. 1100

Attempt Correct Correct Ans. c

FAQ? Have any doubt? Solution

Q.12 Consider the logic circuit given below

The minimized expression for F is

a.

b. I0
c. C

d.

Attempt Incorrect Your Ans. d Correct Ans. a

FAQ? Have any doubt? Solution

Q.13 Consider the logic circuit given below:

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Input at line I13 in 16 × 1 Mux corresponds to output at line Ι'n of 1 × 16 De Mux.

The value of ‘n’ is ______.

Attempt Correct Correct Ans. 7

FAQ? Have any doubt? Solution

Q.14 A logical function is given as F(A, B, C, D) = Σm (0, 4, 5, 10, 11, 13, 15).
The number of Essential Prime Implicants in the minimized expression will be
_________.

Attempt Incorrect Your Ans. 4 Correct Ans. 2

FAQ? Have any doubt? Solution

Q.15 The minimum number of NOR gates required to realize the half adder circuit is
________.

Attempt Correct Correct Ans. 5

FAQ? Have any doubt? Solution

Q.16 The output Y of a 2 bit comparator is logic 1 whenever the 2 bit input A is greater
than the 2­bit input B. The
number of combinations for which the output is logic 1 is _________.

Attempt Correct Correct Ans. 6

FAQ? Have any doubt? Solution

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