Computer Architecture

Wednesday, December 11, 2024 11:12 PM

Some terms:
- PCI (Peripheral Component Interconnect): 32 and 64 bit versions, replaced by PCI express
- AGP (Accelerated Graphics Port): port for Video cards and 3d accelerators
- IDE (Integrated Drive Electronics): Standard E-interface between motherboard data path/bus and disk storage
- EIDE (Enhanced IDE): data rates from 4 - 16.6 MBps

CPU:
- Overview:
○ Does the processing, made of transistors, millions of transistors per chip organized into circuits in each chip, accommodates binary values
- Functions:
○ Four basic functions: Adding, Decoding, Shifting, Storing
○ Four corresponding transistor circuits:
▪ Adder: 4 arithmetic operations
□ Adds two binaries, output results
□ Inputs: two bits (x, y) for addition and a carry-in bit (ci)
□ Output: sum bit(s) and a carry-out bit (co)
▪ Decoder: react to specific bit patterns
□ Address memory, select I/O devices
□ Specific input pattern = output line selected
□ Circuit with n inputs can control 2 n lines
▪ Shifter: Move bits Left-Right
□ Support math operations like multiplication and division
□ Shifts input (bits) left to right and vice versa
▪ Flip-flop (latches): storage of bits
□ Special form of latch circuit
□ Holds value at output even if input change
□ Inputs: S (set), R (reset)
□ Outputs: Q and Q'
□ Used for high speed memory in CPU, Static RAM (SRAM) and cache
▪ Other Circuits:
□ Multiplexer, Parity Generator, Counter
□ Design process:
 Construct truth table for I/O
 Build Boolean expression for truth table
 Represent expression in circuit diagram
□ Integrated Circuits (ICs):
 Whole circuits etched onto single semiconductor chip
 VLSI - Millions of transistors making up CPU circuits

- Transistors:
○ Material: Silicon or Germanium
○ Parts (3): Emitter, Collector, Base
▪ Base turn currents on/off, translating to binary values
○ Size: ~130 nm side (Pentium IV)
- Digital Logic gates:
○ One level above transistors, performs operation on Boolean algebra
○ Boolean Algebra:
▪ Chief operators: AND, OR, NOT
□ AND: Both x and y input must be (1) for output to be one (x*y=z)
□ OR: One or both of x and y must be (1) for output to be 1 (x + y=z)
□ NOT: Output is the reverse of input (x' = z)
▪ Variables: 1 or 0
▪ Truth tables: Tabular representation of Boolean expressions (Leftmost columns represent possible combo of inputs, last column contain corresponding output (2n rows for n inputs)

- Gates:
○ Transistor circuits implement Boolean operators
○ Binary values maintained with constant voltage
○ 6 fundamental gates: AND, OR, NOT, NAND, XOR, NOR (last three are constructed from chief operators)
▪ NAND: Reverse output of AND
▪ NOR: Reverse output of OR
▪ XOR: Inputs with opposing values produce (1), but (0) when they are the same (0-0 or 1-1)
○ Output for any given combination of gates can be predicated on truth tables
○ Complex circuits can be constructed from gates, output of one can be input of another gate

Von Neumann Architecture:

- Subsystems:
○ Memory:
Architecture Page 1
 ○ Memory:
▪ RAM: made of many memory cells with addresses associated to each cell
□ All accesses to memory are to a specified address, cell is smallest unit of access, time to access/store same for all cells
□ Both data and programs are stored in memory
□ Memory width (W) and Address width (N) (address width = N-bits then address space = 2 N ie. 0,1,…,2N)
□ Typical capacity for PC: 64-256MB (1KB = 210 Bytes, 1MB = 220 Bytes, 1GB = 230 Bytes)
□ Access time: 50-75 ns (1*10-9s)
□ Volatile and relatively expensive
▪ Operations (2):
□ Fetch: copy of content in memory cell w/ specified address, non-destructive - copies value in memory cell
□ Store: Store Specified value into memory cell w/ specified address, destructive - overwrites previous value in cell
□ Memory system interfaced with:
 Memory Address Register (MAR)
 Memory Data Register (MDR)
 Fetch/Store signal
▪ Structure (2):
□ Fetch: Load address to MAR, decode address in MAR, copy content of memory cell with specified address into MDR
□ Store: Load address into MAR, Load value into MDR, Decode address in MAR, Copy content of MDR into cell w/ specified address

○ I/O:
▪ Handle devices that communicate with outside (keyboard, screen, …) and store info (Hard-drives, floppies, CDs, …)
▪ Mass storage device access methods:
□ Direct Access Storage Devices (DASDs): Hard-drives, floppies, CD-ROMs
□ Sequential Access Storage Devices (SASDs): Magnetic tapes
▪ Controllers:
□ Speed: Hard-drives: ~10ms
□ I/O controller:
 Small memory buffer, control logic for controlling the devices, sends interrupt signal to CPU when read/write complete
 Data transferred between RAM and memory buffer
 Processor free while I/O controller read/write data into buffer

○ ALU:
▪ Perform arithmetic and logic operations, integrated into today's CPUs
▪ Components (3):
□ Circuits (for operations): Array of circuits to do operations
□ Registers (for storage of computational data): Very fast memory cells, store operands and intermediate results, CCR (condition code register) stores "<,=,>" operations
□ Bus (connection path between first two): Data path interconnecting ALU registers and circuitry

○ Control Unit:
▪ Execute programs repeatedly:
□ Fetch next instruction from memory
□ Decode instruction
□ Execute instructions by issuing signals to ALU, memory and I/O controllers
□ Continue until HALT
▪ Machine Language Instructions:
□ Made of Operation code (which operation to perform) and Address Field(s) (memory addresses on which the operation works)
▪ Instruction Set Design (two approaches):
□ Reduced Instruction Set Computers (RISC): small & simple as possible, minimizes circuitry = faster computer
□ Complex instruction Set Computers (CISC): more and many complex instructions, can do more work but require more circuitry
▪ Typical instructions:
□ Notations: X, Y, Z for RAM cells, R for registry
□ Transfer: LOAD X, STORE X, MOVE X, Y
□ Arithmetic: ADD X, Y, Z (output = Z), ADD X, Y (output overwrites Y), ADD X (Sum of R and X), SUBTR, OR, …
□ Compare: COMPARE X, Y (Compare contents of X and Y cells and set condition codes)
□ Branch: JUMP X (load next instruction from memory), JUMPGT X (load next instruction from location X if GT flag in CCR set, otherwise load from same location)
□ Control: HALT - stops execution
▪ Structure of Control Unit:
□ PC (Program counter): Stores address of next instruction to fetch
□ IR (Instruction Register): Store instruction fetched from memory
□ Instruction Decoder: Decode instruction and activate circuitry
▪ Overview of operation:
□ PC is set to address of first instruction in memory
□ Repeat till HALT or fatal error:
 Fetch Instruction:
◊ PC put address in MAR
◊ Signal to fetch memory into MDR
◊ Add more value to IR
◊ Increase address to program counter
 Decode:
◊ Decode instruction in IR
◊ Decoder generate signal to circuitry to carry out instruction
 Execute:
◊ Differs between instruction

Buses:
- Set of wires and rules for data transfer, connecting system components
- 3 signal groups: Control, Address, Data
- Modern Standard: PCI

Peripheral Buses:
- Connect different I/O devices to computer
- Allow CPU to pass control to other devices

Storage:
- Primary and secondary storage

Memory:
- ROM: Etched in chip, can't be modified, BIOS is an example
- RAM: Allows direct memory reference, reading and writing, volatile memory, CPU fetch instructions from RAM
○ Types:
▪ DRAM: Circuits using one transistor per bit, needs constant refreshing to maintain data, 10-70ns in speed

Architecture Page 2
 ▪ DRAM: Circuits using one transistor per bit, needs constant refreshing to maintain data, 10-70ns in speed
▪ SRAM: Flip-flop circuits, fastest memory type, mainly use in registers and cache

Mass storage:
- Greater capacity and cheaper than ROM or RAM (per megabyte)
- Non-volatile but slower than Ram or ROM
- Hard-disks: most common, store data in magnetic platters than spin at 7200 RPM, low cost-unit storage compared to RAM, RAID (Redundant Array of Independent Discs)
- Optical storage: Examples: CDs, DVDs; stores data using optical tech - pits burned into disc represent binary data and is read while spun like a hard drive
- Flash drives: Portable, plug into USB port, replacement of floppy drives, non-volatile

I/O devices:
- Keyboards: keystrokes converted to binary signals transported through USB and then to CPU
- Mouse: Senses movement translated in to binary code
- Monitors:
○ CRTs: Use raster scanning techniques, Quality based on resolution and refresh rate
○ LCD: thinner, cooler than CRTs, use transistors instead of electron beams
- Printers: types: inkjet and laser; quality measured in Dots per Inch and Pages per Minute
- Sound cards: Fit into PCI expansion slot, Digitize sound for storage, Converts binary sound files to analogue

Interrupts and Polling:

Architecture Page 3