Operating System Exercises - Chapter 13-Sol
Operating System Exercises - Chapter 13-Sol
CHAPTER
I/O Systems
Practice Exercises
13.3 Why might a system use interrupt-driven I/O to manage a single serial
port, but polling I/O to manage a front-end processor, such as a terminal
concentrator?
Answer: Polling can be more efficient than interrupt-driven I/O. This
is the case when the I/O is frequent and of short duration. Even though
a single serial port will perform I/O relatively infrequently and should
thus use interrupts, a collection of serial ports such as those in a terminal
concentrator can produce a lot of short I/O operations, and interrupting
for each one could create a heavy load on the system. A well-timed
polling loop could alleviate that load without wasting many resources
through looping with no I/O needed.
13.4 Polling for an I/O completion can waste a large number of CPU cycles
if the processor iterates a busy-waiting loop many times before the I/O
completes. But if the I/O device is ready for service, polling can be much
more efficient than is catching and dispatching an interrupt. Describe
a hybrid strategy that combines polling, sleeping, and interrupts for
I/O device service. For each of these three strategies (pure polling, pure
interrupts, hybrid), describe a computing environment in which that
strategy is more efficient than is either of the others.
Answer: A hybrid approach could switch between polling and inter-
rupts depending on the length of the I/O operation wait. For example,
we could poll and loop N times, and if the device is still busy at N+1,
we could set an interrupt and sleep. This approach would avoid long
busy-waiting cycles. This method would be best for very long or very
short busy times. It would be inefficient it the I/O completes at N+T
(where T is a small number of cycles) due to the overhead of polling
plus setting up and catching interrupts.
Pure polling is best with very short wait times. Interrupts are best with
known long wait times.
13.5 How does DMA increase system concurrency? How does it complicate
hardware design?
Answer: DMA increases system concurrency by allowing the CPU
to perform tasks while the DMA system transfers data via the system
and memory buses. Hardware design is complicated because the DMA
controller must be integrated into the system, and the system must
allow the DMA controller to be a bus master. Cycle stealing may also
be necessary to allow the CPU and DMA controller to share use of the
memory bus.
13.6 Why is it important to scale up system bus and device speeds as the
CPU speed increases?
Answer: Consider a system which performs 50% I/O and 50% com-
putes. Doubling the CPU performance on this system would increase
total system performance by only 50%. Doubling both system aspects
would increase performance by 100%. Generally, it is important to re-
move the current system bottleneck, and to increase overall system
performance, rather than blindly increasing the performance of indi-
vidual system components.
13.7 Distinguish between a STREAMS driver and a STREAMS module.
Practice Exercises 53