Operating Systems | Set 5 March 12, 2012 Following questions have been asked in GATE 2012 exam. 1.

A process executes the code fork (); fork (); fork (); The total number of child processes created is (A) 3 (B) 4 (C) 7 (D) 8 Answer (C) Let us put some label names for the three lines fork (); // Line 1 fork (); // Line 2 fork (); // Line 3 L1 // There will be 1 child process created by line 1 / \ L2 L2 // There will be 2 child processes created by line 2 / \ / \ L3 L3 L3 L3 // There will be 4 child processes created by line 3 We can also use direct formula to get the number of child processes. With n fork statements, there are always 2^n 1 child processes. Also see this post for more details.

2. consider the 3 processes, P1, P2 and P3 shown in the table Process P1 P2 P3 Arrival time 0 1 3 Time unit required 5 7 4

The completion order of the 3 processes under the policies FCFS and RRS (round robin scheduling with CPU quantum of 2 time units) are (A) FCFS: P1, P2, P3 RR2: P1, P2, P3 (B) FCFS: P1, P3, P2 RR2: P1, P3, P2

(C) FCFS: P1, P2, P3 RR2: P1, P3, P2 (D) FCFS: P1, P3, P2 RR2: P1, P2, P3 Answer (C)

3. Consider the virtual page reference string 1, 2, 3, 2, 4, 1, 3, 2, 4, 1 On a demand paged virtual memory system running on a computer system that main memory size of 3 pages frames which are initially empty. Let LRU, FIFO and OPTIMAL denote the number of page faults under the corresponding page replacements policy. Then (A) OPTIMAL < LRU < FIFO (B) OPTIMAL < FIFO < LRU (C) OPTIMAL = LRU (D) OPTIMAL = FIFO Answer (B) The OPTIMAL will be 5, FIFO 6 and LRU 9.

4. A file system with 300 GByte uses a file descriptor with 8 direct block address. 1 indirect block address and 1 doubly indirect block address. The size of each disk block is 128 Bytes and the size of each disk block address is 8 Bytes. The maximum possible file size in this file system is (A) 3 Kbytes (B) 35 Kbytes (C) 280 Bytes (D) Dependent on the size of the disk Answer (B) Total number of possible addresses stored in a disk block = 128/8 = 16 Maximum number of addressable bytes due to direct address block = 8*128 Maximum number of addressable bytes due to 1 single indirect address block = 16*128 Maximum number of addressable bytes due to 1 double indirect address block = 16*16*128 The maximum possible file size = 8*128 + 16*128 + 16*16*128 = 35KB 1. Using a larger block size in a fixed block size file system leads to (GATE CS 2003) a) better disk throughput but poorer disk space utilization b) better disk throughput and better disk space utilization c) poorer disk throughput but better disk space utilization d) poorer disk throughput and poorer disk space utilization Answer (a) If block size is large then seek time is less (fewer blocks to seek) and disk performance is improved, but remember larger block size also causes waste of disk space.

2. Consider the following statements with respect to user-level threads and kernel supported threads i. context switch is faster with kernel-supported threads ii. for user-level threads, a system call can block the entire process iii. Kernel supported threads can be scheduled independently iv. User level threads are transparent to the kernel Which of the above statements are true? (GATE CS 2004) a) (ii), (iii) and (iv) only b) (ii) and (iii) only c) (i) and (iii) only d) (i) and (ii) only Answer(a) http://en.wikipedia.org/wiki/Thread_%28computer_science%29 3. The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined by (GATE CS 2004) a) the instruction set architecture b) page size c) physical memory size d) number of processes in memory Answer (a) Each process needs minimum number of pages based on instruction set architecture. Example IBM 370: 6 pages to handle MVC (storage to storage move) instruction Instruction is 6 bytes, might span 2 pages. 2 pages to handle from. 2 pages to handle to. 4. In a system with 32 bit virtual addresses and 1 KB page size, use of one-level page tables for virtual to physical address translation is not practical because of (GATE CS 2003) a) the large amount of internal fragmentation b) the large amount of external fragmentation c) the large memory overhead in maintaining page tables d) the large computation overhead in the translation process Answer (c) Since page size is too small it will make size of page tables huge. Size of page table = (total number of page table entries) *(size of a page table entry) Let us see how many entries are there in page table Number of entries in page table = (virtual address space size)/(page size) = (2^32)/(2^10)

= 2^22 Now, let us see how big each entry is. If size of physical memory is 512 MB then number of bits required to address a byte in 512 MB is 29. So, there will be (512MB)/(1KB) = (2^29)/(2^10) page frames in physical memory. To address a page frame 19 bits are required. Therefore, each entry in page table is required to have 19 bits. Note that page table entry also holds auxiliary information about the page such as a present bit, a dirty or modified bit, address space or process ID information, amongst others. So size of page table > (total number of page table entries) *(size of a page table entry) > (2^22 *19) bytes > 9.5 MB And this much memory is required for each process because each process maintains its own page table. Also, size of page table will be more for physical memory more than 512MB. Therefore, it is advised to use multilevel page table for such scenarios. 1. Suppose the time to service a page fault is on the average 10 milliseconds, while a memory access takes 1 microsecond. Then a 99.99% hit ratio results in average memory access time of (GATE CS 2000) (a) 1.9999 milliseconds (b) 1 millisecond (c) 9.999 microseconds (d) 1.9999 microseconds Answer: (d) Explanation: Average memory access time = [(% of page miss)*(time to service a page fault) + (% of page hit)*(memory access time)]/100 So, average memory access time in microseconds is. (99.99*1 + 0.01*10*1000)/100 = (99.99+100)/1000 = 199.99/1000 =1.9999 s 2. Which of the following need not necessarily be saved on a context switch between processes? (GATE CS 2000) (a) General purpose registers (b) Translation look-aside buffer (c) Program counter (d) All of the above Answer: (d) Explanation: In a process context switch, the state of the first process must be saved somehow, so that, when the scheduler gets back to the execution of the first process, it can restore this state and continue.

The state of the process includes all the registers that the process may be using, especially the program counter, plus any other operating system specific data that may be necessary. A Translation lookaside buffer (TLB) is a CPU cache that memory management hardware uses to improve virtual address translation speed. A TLB has a fixed number of slots that contain page table entries, which map virtual addresses to physical addresses. On a context switch, some TLB entries can become invalid, since for example the previously running process had access to a page, but the process to run does not. References: http://en.wikipedia.org/wiki/Context_switch http://en.wikipedia.org/wiki/Translation_lookaside_buffer#Context_switch 3. Where does the swap space reside ? (GATE 2001) (a) RAM (b) Disk (c) ROM (d) On-chip cache Answer: (b) Explanation: Swap space is an area on disk that temporarily holds a process memory image. When physical memory demand is sufficiently low, process memory images are brought back into physical memory from the swap area. Having sufficient swap space enables the system to keep some physical memory free at all times. References: http://docs.hp.com/en/B2355-90672/ch06s02.html 4. Which of the following does not interrupt a running process? (GATE CS 2001) (a) A device (b) Timer (c) Scheduler process (d) Power failure Answer: (c) Explanation: Scheduler process doesnt interrupt any process, its Job is to select the processes for following three purposes. Long-term scheduler(or job scheduler) selects which processes should be brought into the ready queue Short-term scheduler(or CPU scheduler) selects which process should be executed next and allocates CPU. Mid-term Scheduler (Swapper)- present in all systems with virtual memory, temporarily removes processes from main memory and places them on secondary memory (such as a disk drive) or vice versa. The mid-term scheduler may decide to swap out a process which has not been active for some time, or a process which has a low priority, or a process which is page faulting frequently, or a process which is taking up a large amount of memory in order to free up main memory for other processes, swapping the process back in later when more memory is available, or when the process has been unblocked and is no longer waiting for a resource.

5. Which of the following scheduling algorithms is non-preemptive? (GATE CS 2002) a) Round Robin b) First-In First-Out c) Multilevel Queue Scheduling d) Multilevel Queue Scheduling with Feedback Answer: (b) 1. Which of the following is NOT a valid deadlock prevention scheme? (GATE CS 2000) (a) Release all resources before requesting a new resource (b) Number the resources uniquely and never request a lower numbered resource than the last one requested. (c) Never request a resource after releasing any resource (d) Request and all required resources be allocated before execution. Answer: (c) References: http://www.cs.jhu.edu/~yairamir/cs418/os4/sld013.htm http://en.wikipedia.org/wiki/Deadlock 2. Let m[0]m[4] be mutexes (binary semaphores) and P[0] . P[4] be processes. Suppose each process P[i] executes the following: wait (m[i]); wait(m[(i+1) mode 4]); -----release (m[i]); release (m[(i+1)mod 4]); This could cause (GATE CS 2000) (a) Thrashing (b) Deadlock (c) Starvation, but not deadlock (d) None of the above Answer: (b) Explanation: You can easily see a deadlock in a situation where.. P[0] has acquired m[0] and waiting for m[1] P[1] has acquired m[1] and waiting for m[2] P[2] has acquired m[2] and waiting for m[3] P[3] has acquired m[3] and waiting for m[0] 3. A graphics card has on board memory of 1 MB. Which of the following modes can the card not support? (GATE CS 2000) (a) 1600 x 400 resolution with 256 colours on a 17 inch monitor

(b) 1600 x 400 resolution with 16 million colours on a 14 inch monitor (c) 800 x 400 resolution with 16 million colours on a 17 inch monitor (d) 800 x 800 resolution with 256 colours on a 14 inch monitor Answer: (b) Explanation: Monitor size doesnt matter here. So, we can easily deduct that answer should be (b) as this has the highest memory requirements. Let us verify it. Number of bits required to store a 16M colors pixel = ceil(log2(16*1000000)) = 24 Number of bytes required for 1600 x 400 resolution with 16M colors = (1600 * 400 * 24)/8 which is 192000000 (greater than 1MB). 4 Consider a virtual memory system with FIFO page replacement policy. For an arbitrary page access pattern, increasing the number of page frames in main memory will (GATE CS 2001) a) Always decrease the number of page faults b) Always increase the number of page faults c) Some times increase the number of page faults d) Never affect the number of page faults Answer: (c) Explanation: Incrementing the number of page frames doesnt always decrease the page faults (Beladys Anomaly). For details see http://en.wikipedia.org/wiki/Belady%27s_anomaly 5. Which of the following requires a device driver? (GATE CS 2001) a) Register b) Cache c) Main memory d) Disk Answer: (d) 1. Which of the following is NOT a valid deadlock prevention scheme? (GATE CS 2000) (a) Release all resources before requesting a new resource (b) Number the resources uniquely and never request a lower numbered resource than the last one requested. (c) Never request a resource after releasing any resource (d) Request and all required resources be allocated before execution. Answer: (c) References: http://www.cs.jhu.edu/~yairamir/cs418/os4/sld013.htm http://en.wikipedia.org/wiki/Deadlock 2. Let m[0]m[4] be mutexes (binary semaphores) and P[0] . P[4] be processes. Suppose each process P[i] executes the following:

wait (m[i]); wait(m[(i+1) mode 4]); -----release (m[i]); release (m[(i+1)mod 4]); This could cause (GATE CS 2000) (a) Thrashing (b) Deadlock (c) Starvation, but not deadlock (d) None of the above Answer: (b) Explanation: You can easily see a deadlock in a situation where.. P[0] has acquired m[0] and waiting for m[1] P[1] has acquired m[1] and waiting for m[2] P[2] has acquired m[2] and waiting for m[3] P[3] has acquired m[3] and waiting for m[0] 3. A graphics card has on board memory of 1 MB. Which of the following modes can the card not support? (GATE CS 2000) (a) 1600 x 400 resolution with 256 colours on a 17 inch monitor (b) 1600 x 400 resolution with 16 million colours on a 14 inch monitor (c) 800 x 400 resolution with 16 million colours on a 17 inch monitor (d) 800 x 800 resolution with 256 colours on a 14 inch monitor Answer: (b) Explanation: Monitor size doesnt matter here. So, we can easily deduct that answer should be (b) as this has the highest memory requirements. Let us verify it. Number of bits required to store a 16M colors pixel = ceil(log2(16*1000000)) = 24 Number of bytes required for 1600 x 400 resolution with 16M colors = (1600 * 400 * 24)/8 which is 192000000 (greater than 1MB). 4 Consider a virtual memory system with FIFO page replacement policy. For an arbitrary page access pattern, increasing the number of page frames in main memory will (GATE CS 2001) a) Always decrease the number of page faults b) Always increase the number of page faults c) Some times increase the number of page faults d) Never affect the number of page faults Answer: (c) Explanation:

5. Which of the following requires a device driver? (GATE CS 2001)

a) Register b) Cache c) Main memory d) Disk Answer: (d) Data structures 1) The recurrence relation capturing the optimal time of the Tower of Hanoi problem with n discs is (A) T(n) = 2T(n 2) + 2 (B) T(n) = 2T(n 1) + n (C) T(n) = 2T(n/2) + 1 (D) T(n) = 2T(n 1) + 1 Answer (D) 2) Consider the directed graph shown in the figure below. There are multiple shortest paths between vertices S and T. Which one will be reported by Dijstra?s shortest path algorithm? Assume that, in any iteration, the shortest path to a vertex v is updated only when a strictly shorter path to v is discovered.

(A) SDT (B) SBDT (C) SACDT (D) SACET Answer (D) 3) Suppose a circular queue of capacity (n 1) elements is implemented with an array of n elements. Assume that the insertion and deletion operation are carried out using REAR and FRONT as array index variables, respectively. Initially, REAR = FRONT = 0. The conditions to

detect queue full and queue empty are (A) Full: (REAR+1) mod n == FRONT, empty: REAR == FRONT (B) Full: (REAR+1) mod n == FRONT, empty: (FRONT+1) mod n == REAR (C) Full: REAR == FRONT, empty: (REAR+1) mod n == FRONT (D) Full: (FRONT+1) mod n == REAR, empty: REAR == FRONT Answer (A) 2. Consider the label sequences obtained by the following pairs of traversals on a labeled binary tree. Which of these pairs identify a tree uniquely (GATE CS 2004)? i) preorder and postorder ii) inorder and postorder iii) preorder and inorder iv) level order and postorder a) (i) only b) (ii), (iii) c) (iii) only d) (iv) only Answer (b) 3. The following numbers are inserted into an empty binary search tree in the given order: 10, 1, 3, 5, 15, 12, 16. What is the height of the binary search tree (the height is the maximum distance of a leaf node from the root)? (GATE CS 2004) a) 2 b) 3 c) 4 d) 6 Answer(b) 4. A data structure is required for storing a set of integers such that each of the following operations can be done in (log n) time, where n is the number of elements in the set. o o Delection of the smallest element Insertion of an element if it is not already present in the set

Which of the following data structures can be used for this purpose? (a) A heap can be used but not a balanced binary search tree (b) A balanced binary search tree can be used but not a heap (c) Both balanced binary search tree and heap can be used (d) Neither balanced binary search tree nor heap can be used Answer(b) A self-balancing balancing binary search tree containing n items allows the lookup, insertion, and removal of an item in O(log n) worst-case time. Since its a BST, we can easily find out minimum element in O(nlogn). See our post http://geeksforgeeks.org/?p=1333 for details.

Since Heap is a balanced binary tree (or almost complete binary tree), insertion complexity for heap is O(logn). Also complexity to get minimum in a min heap is O(logn) because removal of root node causes a call to heapify (after removing the first element from the array) to maintain the heap tree property. But a heap cannot be used for the above purpose as the question says insert an element if it is not already present. For a heap, we cannot find out in O(logn) if an element is present or not. Thanks to game for providing the correct solution. 5. A circularly linked list is used to represent a Queue. A single variable p is used to access the Queue. To which node should p point such that both the operations enQueue and deQueue can be performed in constant time? (GATE 2004)

a) rear node b) front node c) not possible with a single pointer d) node next to front Answer(a) Answer is not (b) front node, as we can not get rear from front in O(1), but if p is rear we can implement both enQueue and deQueue in O(1) because from rear we can get front in O(1). Below are sample functions. Note that these functions are just sample are not working. Code to handle base cases is missing. 2. Consider the Quicksort algorithm. Suppose there is a procedure for finding a pivot element which splits the list into two sub-lists each of which contains at least one-fifth of the elements. Let T(n) be the number of comparisons required to sort n elements. Then (A) T(n) <= 2T(n/5) + n (B) T(n) <= T(n/5) + T(4n/5) + n (C) T(n) <= 2T(4n/5) + n (D) T(n) <= 2T(n/2) + n Answer (C) For the case where n/5 elements are in one subset, T(n/5) comparisons are needed for the first subset with n/5 elements, T(4n/5) is for the rest 4n/5 elements, and n is for finding the pivot. If there are more than n/5 elements in one set then other set will have less than 4n/5 elements and time complexity will be less than T(n/5) + T(4n/5) + n because recursion tree will be more balanced.

3 Dijkstras single source shortest path algorithm when run from vertex a in the below graph, computes the correct shortest path distance to

(A) only vertex a (B) only vertices a, e, f, g, h (C) only vertices a, b, c, d (D) all the vertices Answer (D) http://www.geeksforgeeks.org/archives/4545