AN02-001 High Side Driver for Buck Converter with an LDO

Hawk Chen

Introduction
Most boost converters have been applied to step-up voltage applications, such as the PDA, N/B PC, cellular phone, palmtop computer, GPS, camcorder, portable DVD, toy, and DSC, to elevate a low voltage to a high voltage to provide low quiescent current and high efficiency regulator in the recent years. Yet, technically, the boost converter does not supply applications of high loading current today. Also, the LDO usually can not transform to a relatively high energy. AIC1630A is not only a boost converter but also an application of step-down and a low-dropout function. The circuit, shown as Fig. 1, can step down from 5V or 12V to as low as 2.5V, 1.8V and 1.25V with 80% efficiencies. A linear controller can be implemented by using the pin 6 and 7 of AIC1630A, as shown Fig. 1.

And it works well at low input voltages. For example, a 2.5V input, which comes from the output of AIC1630A, can be converted into an output of 1.8V. Due to the ultra-low dropout voltage, the power dissipation is much lower than the general LDOs.

Principle of operation
The principle of energy storage in the inductor L can be applied to the buck converter. And the inductor energy then is to be transferred to the output via the schootky diode D. When the switch is on, the diode is used as a reverse biased and the inductor current will ramp up. When the switch is off, the inductor reverses its polarity with a switch current to maintain output voltage.

1. AIC1630A driving P-MOSFET

U4 5V--12 C1 820m F D3 5.1V + R1 1.8K R2 270 D1 D2 U3 CEB4435 1N5820 L1 47m H + C3 1500m F 2.5V R9 1M

2N2222 1N4148 1 U2 2N2222 C5 0.1m F C4 680P 36K R3 2 3 4

U1 SD VIN EX GND

VOUT 8 LBI 7 LBO 6 FB 5

R8 2.2

U5 D45H2A 1.8V + C2 470m F

R4 C6 R6 62K 820PF 9.1K R5 20K R7 20K

AIC1630A

February, 2002

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Fig. 1. AIC1630A+LDO for P-MOSFET circuit A boost-switching regulator with the addition of two external switching transistors is considered as a buck converter, shown in Fig. 1. Via EXT (pin3), the internal switch of AIC1630A, drives the transistor (U2). When U2 is set on, the gate polarity of U4 (P-MOS) will be low and U4 will be turned on. When U2 is off, the U4 gate polarity will be high and U4 will be turned off, due to the input voltage delivered to gate polarity via U3 transistor. The rising time of gate signal is much longer when U3 and D1 are not considered. See Fig. 2 and 3 for the difference.

.
Fig. 2: Gate Signal of P-MOS Fig. 3: Gate Signal of P-MOS

CISS capacitor of MOSFET results in the gate signal in Fig. 3. The use of U3 and D1 can reduce the influence of CISS on the boost-switching regulator.

2. AIC1630A Driving N-MOSFET

5V--12V 470m F C1 D4 5.1V + D1 R11 1.8K 1N5819 CEB6030 C7 1m F D3 1N5819 + C5 100m F Q4 L1 D2 40m H 1N5820 + C3 1000m F 2.5V R9 1M U5 D45H2A

1 C6 0.1m F 2 3

U1 SD VIN EXT VOUT LBI LBO FB

8 7 6 5

R8 2.2 C4 R4 62K 820P R5 20K R6 9.1K R7 20K +

1.8V C2 470m F

Q1 2N2222

R1 2K Q

R12 9.1K 2N2222

R2 2K Q3 R13 2K R10 2K

4 GND

AIC1630A

2N2907

Q5

2N2222 R3 2K

Fig. 4 AIC1630A+LDO for N-MOSFET circuit

February, 2002

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AIC1630A with the addition of four external switching transistors is considered as a buck converter, shown in Fig. 4. Via EXT (pin3), the internal switching of IC drives fast driving N-channel circuit, which is composed of Q1, Q2, Q3, and Q5. Bootstrapping circuit (composed of D1, D3, C5 and C7) can provide Nchannel circuit with twice as much as the input voltage. When Q4 is on, the diode is used as a reverse biased. Current flows via Q4 as well as the inductor L1 to output polarity. When Q4 is off, the inductor L1 reverses its polarity with its energy transferred to the output loading, and the diode turns forward biased. Functions of the bootstrapped driver circuit and driven

N-channel circuit play important roles in the application of AIC1630A and LDO with N-MOSFET circuit.

3. Bootstrapped Function
As shown in Fig. 5 and 6, the peak rectifier circuit comprises two diodes (D1 and D3) and two filter capacitors (C7 and C5). And the voltage filtered by peak rectifier may provide control voltage with two times of VIN dc voltage as shown in Fig. 6 (the lower waveform). Because the output voltage is boosted up by a square waveform of amplitude VIN to two times of the input voltage, the circuit is considered as a bootstrapped circuit.

1N5819 C1 470mF D1 V1 +5V

D3 1N5819 C7 1mF V2 5V VPULSE

10V DC C5 100mF

Fig. 6: bootstrapped voltage

Fig. 5: Bootstrapped circuit Upper: D1 cathode polarity signal Lower: 10VDC

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l Driven N-channel function

Vc +10V

C5 100mF

R2 2K

R12 9.1K Q2

R1 2K Q1 2N2222 Q5 R3 2K 2N2907

R13 2K R10 2K V1 5V

Q3 2N2222

2N2222

10V 0V

Fig. 7: Fast driven N-MOSFET circuit

Fig. 8: Driven N-channel signal Upper: 5V-driving signal Lower: 10V-driving signal

Such as Fig. 7, this driven N-channel function is composed of three NPN transistors, one PNP transistor and six resistors. The configuration of the function block consists of two inverters and one pushpull. The output from the driven circuit, which has an input of 1MHZ, can produce a perfect square signal of 1MHZ. As Fig. 8, the 5V-driving signal will push to 10V-driving signal, which drives N-MOSFET Q4 working properly.

quiescent current.

Component selection
The section is divided into two parts. The first part talks about the calculation and selection of the circuit components on buck converter. And the second part introduces an LDO application. All of the following calculations are effective when switch converter is operated in a continuousconduction mode. (1) Switch converter application The duty cycle is calculated as:
DUTY(MAX ) = TON (MAX ) T = VOUT + VF VIN(MIN) - VQ + VF

3. AIC1630A for LDO application

1. Input voltage of LDO is provided by the output voltage of buck converter. It can resolve some LDO problems, such as: high dropout voltage and high power consumption. Therefore, the advantage of LDO is to provide a fast transient response, which is what switch converter can not offer. Fig. 4 illustrates that the base current of U5 is controlled by R8 and R9 turns U5 off when LBO floats. Note that, at a light load, R8 and R9 have an effect on efficiency as well as the maximum available output current. And lower R8 and R9 may drive higher output current, but cause AIC1630A N-MOSFET circuit to draw higher level of

Where VF: sckottky diode forward voltage VQ: series pass element (MOSFET) switch on voltage (VQ= IQ RDS(ON) )

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For example 1: Min VIN VOUT IOUT VRIPPLE 0.1 50 5 2.5 3 typ max 12 unit V V A mV value and the RMS current rating, in order to support high current on an instant at input polarity. Low ESR capacitors may decrease input ripple and avoid the disturbance to other circuits in the system. In addition, a LC filter circuit can improve EMI in the power system. II. Output capacitor: and ESR value are two major

Assumed that the frequency of operation is 100KHZ, the forward voltage of sckottky diode is 0.2V and the switch on voltage of MOSFET is 0.5V. The sequence, when the switch is on, is calculated as below: l Selection of inductor There are many different ways to calculate the inductance of the required inductor. We can get easily it from the inductor ripple current DIP. When the minimum loading current is 100mA, the regulator will operate in continuousconduction mode. Thus, the inductor ripple current is calculated as:
TON(MAX ) = DUTY(MAX ) T = 2 .5 + 0 .2 1 = 4.7ms 5 - 0.5 + 0.2 120K

Capacitance

considerations for output capacitor. Capacitance must be able to deliver high loading current when the switch turns on. And ESR value is a main parameter in determining the output ripple, transient voltage and load impedance. Thus the ESR of output capacitor is calculated as:
ESR = DVRIPPLE 50 10 -3 = = 250mW DIP 200 10 -3

DVRIPPLE: desired output ripple voltage The maximum output peak switch current:
IP(MAX ) = IO(MAX ) +

DIP = 2I OUT(MIN) = 200mA

DIP 200mA =3+ = 3.1A 2 2

Required inductance:
V - VOUT - VQ DVL L(MIN) = DT = IN TON DIP DIP 200 10 -3 = 47mH = 5 - 2.5 - 0.5 4.7 10 -6

The minimum capacitor value for a desired output ripple and load current:
C OUT(MIN) = IP(MAX ) 8DVRIPPLE F 3 .1
-3

8 50 10 = 65mF

120 10 3

In order to avoid inductor saturation and achieve the best power efficiency, the material of the inductor core is recommended to be either in MPP or in iron powder and also inductance over 47mH should be applied. l Selection of capacitor I. Input capacitor: The input capacitor is selected mainly on its ESR

l Selection of efficiency As shown in Fig. 9 and 10 for AIC1630A-2.5V application, the efficiency of N-MOS circuit is better than that of P-MOS circuit. Yet, some problems like MOSFET I2R loss, inductor loss, feedback resistor loss, output capacitor ESR loss, sckottky diode loss, and switch loss, which have influence on MOSFET efficiency, need to be concerned.

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90 85 80

VIN =5V

90 85 80

VIN=5V

Efficiency(%)

Efficiency(%)

75 70 65 60 55 50 1 2 3 4 5 6 7

75 70 65 60 55 50 1 2 3 4 5 6 7

VIN =12V

VIN=12V

Load Current(A)
Fig. 9: Efficiency of N-MOS circuit (2) LDO application The selecting of bipolar transistor or MOSFET depends on output current, power efficiency, and dropout voltage. However, a 100uF(or great) capacitor is required between the LDO output and ground for stability. Otherwise, the output polarity will oscillate. Most types of capacitors may work. Yet, when aluminum electrolytic type of capacitor is used its equivalent series resistor (ESR) should be 5W or less.

Load Current (A)

Fig. 10: Efficiency of P-MOS circuit placed as close as to the EXT pin of AIC1630A, too. A good layout practice is always the use of a separation between power ground and signal ground. However, a small trace is connecting between power ground and signal ground to avoid power ground noise to affect signals of AIC1630A.

At higher load current (>1A), the size of metal traces and the placement of components have to be cautiously concerned. Note that high switch currents may cause voltage drops in long metal traces. In addition, short component leads may avoid unwanted parasitic inductance, which is a serious problem to EMI. When low ESR capacitors fail to avoid the spikes at input/output polarities, application of input/output LC filters are recommended.

5. PCB Layout Guidelines

A recommended printed circuit board (PCB) layout for AIC1630A N-MOS application circuit is shown in Fig. 10, 11, and12. It is very important to place the bootstrapped circuit as close as possible to input line and source polarity of N-MOS. In order to achieve the best performance, the driven N-MOS circuit has to be layer of AIC1630A

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N-MOS N-MOS

Fig. 10: Top layer of AIC1630A

Fig. 11: Bottom layer of AIC1630A

Fig. 11: silk screen of AIC1630A N-MOS

Conclusion
Most low voltage microprocessors, DSPs, and PLDs use two power supplies of different voltages, such as VCORE voltage and I/O voltage of graphic card. The use of dual voltage architecture often requires management of both voltages to avoid potential problems with device and system reliability. Users must consider the timing sequence between core and I/O during power switching operations. Timing sequence for dual low voltage applications has grown rapidly. Also power ICs of two output voltages have been in great demand recently. AIC1630A+LDO provide VCORE voltage and I/O voltage with power and solve the problems with different potentials. AIC1630A+LDO of high efficiency and heavy load current can support a larger range of application fields. In addition, not only AIC1630A can be applied to stepup converter for high efficiency, but also it can be used as a step-down solution for different applications and requirements.