Memory Locations and

Addresses
Memory consists of many millions of
storage elements
One storage element can store one bit
of information
Memory is organized so that a group of
n bits (referred as word ) can be stored
or retrieved
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n
bits
b30 b0 b1 b31
Sign bit: b31 = 0 for positive numbers
b31 = 1 for negative numbers
8 bits 8 bits 8 bits 8 bits
ASCII
Character
ASCII
Character
ASCII
Character
ASCII
Character
(a) A signed integer
(b) Four characters
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0
1
2^k - 1
k no. of address
bits

24 address bits
generates an
address space of
2^24 (16 M)
locations

2^10 1K (1 Kilo =
1024)
2^20 1M (1 Mega)
2^30 1G (1 Giga)
2^40 1T (1 Tera)
Byte Addressability
a byte is 8 bits
the word length typically ranges from
16 to 64 bits
successive addresses refer to
successive byte locations in the
memory (generally used in computers)
Byte locations have addresses
0,1,2,.....
If the word length is 32 bits, successive
words are located at addresses
0,4,8,...... with each word consisting of
four bytes.
0 1 2 3
4 5 6 7
3 2 1 0
7 6 5 4
2^k-
4
2^k-
3
2^k-
2
2^k-
1
2^k-
1
2^k-
2
2^k-
3
2^k-
4
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2^k-4
0
4
0
4
2^k-4
Word
Addres
s
Byte Address Byte Address
(a) Little-endian assignment (b) Big-endian assignment
Instructions and Instruction
Sequencing
A computer must have instructions to
perform four types of operations:
Data transfers between the the memory and the
processor registers
Arithmetic and Logical operations on data
Program sequencing and control
I/O transfers
Two notations of instructions
Register transfer notation
Assembly language notation
Register Transfer Notation

R1 [LOC]
The contents of memory location LOC are transferred
into processor register R1

R3 [R1] + [R2]

PLACE [R2]

Assembly Language Notation

Move LOC, R1

Add R1,R2,R3

Move R2, PLACE
Basic Instruction Types
C = A+B -------- HLL statement

C [A] + [B] -------- RTN

assuming this is done in single machine
instruction
Add A,B,C ---------ALN

general instruction of this type has the format
(three address instruction)
Operation Source1, Source2, Destination

Basic Instruction Types
Use of a sequence of simpler instructions (two
address instructions)

Add A,B
Move B, C

in RTN
B [A]+[B]
C [B]
general instruction of this type has the format
Operation Source, Destination

Some machine instructions specify only
one operand.
When the second operand is needed, it
is understood implicitly to be in a
unique location, generally accumulator
(a processor register) is used
they become one address instructions
Add LOC
Load PLACE
Store PLACE
Basic Instruction Types
C= A+B

Load A
Add B
Store C
Basic Instruction Types
Use of processor registers allows faster
accessing and results in shorter
instructions
Load A, Ri or Move A, Ri
Store Ri, LOC or Move Ri,LOC
and
Add LOC, Ri
Basic Instruction Types
C= A+B

Move A,Ri
Add B, Ri
Store Ri, C
Basic Instruction Types
Move A,Ri
Move B,Rj
Add Ri,Rj
Store Rj, C
Transfers that involve the memory are much slower
than transfers within the processor.
A substantial increase in speed is achieved when
processor registers are utilized effectively.
C = A+B -------- HLL statement

C [A] + [B] -------- RTN

Assumptions we make
Compiler allows one memory operand per instruction

Word length is 32 bits and the memory is byte addressable

Single word instruction can include a full memory address

The three instructions are in successive word locations,
starting at location i
Instruction Execution and Straight-Line
Sequencing
Move A,R0
Add B,R0
Move R0,C
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Contents Address
i
i+4
i+8
A
B
C
Begin execution
here
3-Instruction
program
segment
Data for the
program
A program for C =[A]+[B]
Execution of the program
To begin execution of the program, the address
of its first instruction (i in this case) is placed into
the PC.

Processor fetches and executes the first
instruction using the information available in PC.

During the execution first instruction, PC is
incremented by 4 to point next instruction.

Instructions are executed one at a time in the
order of increasing addresses. This is called
Straight-Line Sequencing
Execution of the program
Executing an instruction is a two-phase procedure
First Phase Instruction Fetch
Instruction is fetched from the memory location whose address
is in the PC
And placed in Instruction Register (IR)
Second Phase Instruction Execute
Instruction is decoded to determine the operations to be
performed.
The specified operations are performed by the processor. This
involves
Fetching operands from memory or from processor registers
Arithmetic and logical operations
Storing results into memory or registers
At some point during this two-phase procedure, the PC
is incremented to point the next instruction to be
exexcuted

Move NUM1,R0
Add NUM2,R0
Add NUM3,R0
Add NUMn,R0
Move R0,SUM
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i+4
i+8
i
i+4n-4
i+4n
SUM
NUM2
NUMn
NUM1
Branching
The program sequence is changed form
straight-line sequencing by a branching
instruction

Previous example can be done using LOOP

Loop is repeated as many times as the numbers
to be added

To check whether all numbers added a counter
variable is used and it is imitated with the count
of numbers to be added

Each time the loop executed next number is
added and the count is decremented by 1.

The loop is repeated until the count becomes 0.
to do this a conditional branch instruction is used

Move N,R1
Clear R0
Determine address
of Next number
and add Next
number to R0
Decrement R1
Branch>0 LOOP
Move R0,SUM
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n
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LOOP
Program
Loop
SUM
N
NUM1
NUM2
NUMn
Condition Codes
Processor keeps track of the
information about the results of
operations for use by subsequent
conditional branch instruction.
Those information bits are called
condition code flags and they are
saved as a group in a register called
condition code register or status
register.
Individual condition code flags are set
to 1 or cleared to 0 depending on the
outcome of the operation
Four commonly used flags are
N (Negative) -Set to 1 if the result is
negative; otherwise cleared to 0

Z (Zero) -Set to 1 if the result is 0;
otherwise cleared to 0

V (Overflow) - Set to 1 if arithmetic
overflow occurs; otherwise cleared to 0

C (Carry) - Set to 1 if a carry results
from the operation; otherwise cleared to 0


Addressing Modes
Addressing means the way to specify
the address of an operand.
The different ways (flexible) of
addressing are called addressing
modes.
The details differ from one computer
to other, but the concepts are the
same.

Name
Assembler Syntax Addressing Function
Immediate #value Operand=value
Register Ri EA=Ri
Absolute(Direct) LOC EA=LOC
Indirect (Ri)
(LOC)
EA=[Ri]
EA=[LOC]
Index X(Ri) EA=[Ri]+X
Base with index (Ri,Rj) EA=[Ri]+[Rj]
Base with index
and offset
X(Ri,Rj) EA=[Ri]+[Rj]+X
Relative X(PC) EA=[PC]+X
Auto increment (Ri)+ EA=[Ri];
Increment Ri;
Auto decrement -(Ri) Decrement Ri;
EA=[Ri]
EA=Effective address Value= a signed number
Variables and Constants
They are simplest data types
In assembly language, a variable is
represented by allocating a register or a
memory location to hold its value
Constants are represented in the
instruction itself
Immediate addressing
The operand is given explicitly in the
instruction
Constants are represented using
Immediate addressing
For example,
Move #200,R0
Add #6, R1


Register Addressing
The operand is the content of a
processor register; the
name(address) of the register is
specified in the instruction
For example,
Add R1,R0
Absolute Addressing (Direct
Addressing)
The operand is in a memory location;
the address of this location is given
explicitly in the instruction
For example,
Move LOC,PLACE

In the following example,
Move LOC,R1
Both register and absolute addressing
mode are used.
Example: A = B+6 --- C statement
In assembly language
Move B, R0
Add #6,R0
Move R0,A

Indirect Addressing
The instruction does not give the operand or its
address explicitly
Information about the memory address of the
operand is given in the instruction
This address is called effective address (EA) of
the operand
Effective address of the operand is the content of
register or memory location whose address is
given in the instruction
EA=[Ri]
EA=[LOC]
For Example,
Add (A), R0
Move (R1),R2
Add (R1),R0
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Operand
B
Add (A),R0
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B
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Operand
Main
memor
y
Register
B
R1
A
B
(b) Through a memory location (a) Through a general-purpose
register
Address Contents
Move N,R1
Move #NUM1,R2
Clear R0
Add (R2),R0
Add #4,R2
Decrement R1
Branch>0 LOOP
Move R0,SUM
Initialization
LOOP
Use of indirect addressing in the program
discussed before
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SUM
N
NUM1
NUM2
NUMn
Data in memory
The register or the memory location that
contains the address of operand is called
pointer
Indirect Addressing through registers are
used extensively.
But Indirect Addressing through memory
location is seldom used, because it
involves accessing memory twice to get
an operand

Index Addressing
It is useful in dealing with lists and arrays
The Effective Address of the operand is
generated by adding a constant value to the
contents of register
For example,
Add X(Ri), Rj
The EA of first operand is [Ri]+X


Add 20(R1),R2
Operand
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1000
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Add 1000(R1),R2
Operand
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20
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1000
1020
1000
1020
20=Offset
R1
R1
(a) Offset is given as a constant
(b) Offset is in the index register
INDEXED
ADDRESSING
20=Offset
n
Student ID
Test 1
Test 2
Test3
Student ID
Test 1
Test 2
Test3
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N
LIST
LIST + 4
LIST + 8
LIST + 16
LIST + 12
Student 1
Student 2
A LIST OF STUDENTS MARKS.
Move #LIST,R0
Clear R1
Clear R2
Clear R3
Move N,R4
Add 4(R0),R1
Add 8(R0),R2
Add 12(R0),R3
Add #16,R0
Decrement R4
Branch>0 LOOP
Move R1,SUM1
Move R2,SUM2
Move R3,SUM3
LOOP
INDEXED ADDRESSING USED IN ACCESSING TEST SCORES
IN THE LIST IN THE PREVIOUS FIGURE
Relative Addressing
The Effective Address is determined by the Index
mode using the Program Counter in place of the
general purpose register
For Example,
Branch>0 -16(PC)
Auto increment Addressing
The Effective Address of the operand is the
contents of a register specified in the instruction.
After accessing the operand, the contents of this
register are automatically incremented to point
the next item in the list
For Example,
Add (R1)+, R0
Address Contents
Move N,R1
Move #NUM1,R2
Clear R0
Add (R2)+, R0
Decrement R1
Branch>0 LOOP
Move R0,SUM
Initialization
LOOP
n
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SUM
N
NUM1
NUM2
NUMn
Data in memory
Auto decrement Addressing
The contents of a register specified in the
instruction are first automatically decremented
and are then used as the effective address of the
operand
For Example,
Add -(R1), R0