Slot29 CH18 MultiCoreComputers 18 Slides

+
Multicore
Chapter 18 Computers
+Objectives
 A multicore computer, also known as a chip multiprocessor, combines two or
more processors (called cores) on a single piece of silicon (called a die- khuôn mẫu).
Typically, each core consists of all of the components of an independent
processor, such as registers, ALU, pipeline hardware, and control unit, plus L1
instruction and data caches. In addition to the multiple cores, contemporary
multicore chips also include L2 cache and, increasingly, L3 cache.
 Your computer is a multicore computer. Do you want to know about it?
 After studying this chapter, you should be able to:

 Understand the hardware performance issues that have driven the move to
multicore computers.
 Understand the software performance issues posed by the use of multithreaded
multicore computers.
 Have an appreciation of the use of multicore organization on embedded systems,
PCs and servers, and mainframes.
+Contents
18.1 Hardware Performance Issues

18.2 Software Performance Issues
18.3 Multicore Organization
18.4-Introduction to Intel x86 Multicore
Organization
+
18.1- Hardware Performance Issues
Increase in Parallelism and Complexity
These changes include, in chronological order
 Pipelining: Individual instructions are executed through a pipeline of

stages so that while one instruction is executing in one stage of the
pipeline, another instruction is executing in another stage of the pipeline.
•
 Superscalar: Multiple pipelines are constructed by replicating execution

resources. This enables parallel execution of instructions in parallel
pipelines, so long as hazards are avoided.
 Simultaneous multithreading (SMT): Register banks are replicated so

that multiple threads can share the use of pipeline resources.
For each of these innovations, designers have over the years attempted to
increase the performance of the system by adding complexity
+
Alternative Chip
Organization
There is a practical limit to how

far this trend can be taken,
because with more stages, there
is the need for more logic, more
interconnections, and more
control signals
SMT: Simultaneous multithreading

+
Intel Hardware
Trends
Beginning about
2000, a new flat
region of the curve
appears, as the limits
of effective
exploitation of
instruction-level
parallelism are
reached.
+ Processor Trends
Power
Memory
+
+ Power Consumption
 By2015 we can expect to see microprocessor chips with
about 100 billion transistors on a 300 mm2 die (base)
 Assuming that about 50-60% of the chip area is devoted to
memory, the chip will support cache memory of about 100
MB and leave over 1 billion transistors available for logic
 How to use all those logic transistors is a key design issue
 Pollack’s Rule
 States that performance increase is roughly proportional to square
root of increase in complexity
+ f
18.2- Software
Performance
Issues
Performance
Effect of
Multiple Cores
f
Amdahl’s law
f: frequency, N: number of CPU
Scaling of Database Workloads on Multiple-Processor hardware
Database management
systems and database
applications are one area in
which multicore systems can
be used effectively. Many
kinds of servers can also
effectively use the parallel
multicore organization,
because servers typically
handle numerous relatively
independent transactions in
parallel.
+ Effective Applications for Multicore Processors
 Multi-threaded native applications

 Characterized by having a small number of highly threaded processes
 Lotus Domino, Siebel CRM (Customer Relationship Manager)
 Multi-process applications
 Characterized by the presence of many single-threaded processes
 Oracle, SAP, PeopleSoft
 Java applications
 Java Virtual Machine is a multi-threaded process that provides scheduling and
memory management for Java applications
 Sun’s Java Application Server, BEA’s Weblogic, IBM Websphere, Tomcat
 Multi-instance applications
 One application running multiple times
 If multiple application instances require some degree of isolation, virtualization
technology can be used to provide each of them with its own separate and secure
environment
+
18.3- Multicore Organization
At a top level of description, the main variables in a

multicore organization are as follows:
 The number of core processors on the chip
 The number of levels of cache memory
 The amount of cache memory that is shared
+
Multicore
Organization
…
D-cache: cache
storing data
I-cache: cache
storing
instructions
Intel Intel
Core Core
Duo i7
+
13.4- Intel x86
Multicore
Organization
APIC: Advanced
Programmable Interrupt
Controller
Thermal Control: Power
Management Logic Intel Core Duo
Arch.: Architecture
+
Intel Core I7-990X Organization
+ Exercises
 18.1 Summarize the differences among simple instruction pipelining,
superscalar, and simultaneous multithreading.
 18.2 Give several reasons for the choice by designers to move to a

multicore organization rather than increase parallelism within a single
processor.
 18.3 Why is there a trend toward giving an increasing fraction of chip

area to cache memory?
 18.5 At a top level, what are the main design variables in a multicore
organization?
 18.6 List some advantages of a shared L2 cache among cores

compared to separate dedicated L2 caches for each core.
+ Summary Multicore
Computers
Chapter 18
 Hardware performance issues  Multicore organization

 Increase in parallelism and
complexity  Intel x86 multicore organization
 Power consumption  Intel Core Duo
 Intel Core i7-990X
 Software performance issues
 Software on multicore

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 Your computer is a multicore computer. Do you want to know about it?

 After studying this chapter, you should be able to:

18.1 Hardware Performance Issues

 Pipelining: Individual instructions are executed through a pipeline of

 Superscalar: Multiple pipelines are constructed by replicating execution

 Simultaneous multithreading (SMT): Register banks are replicated so

There is a practical limit to how

SMT: Simultaneous multithreading

 Multi-threaded native applications

At a top level of description, the main variables in a

 18.2 Give several reasons for the choice by designers to move to a

 18.3 Why is there a trend toward giving an increasing fraction of chip

 18.6 List some advantages of a shared L2 cache among cores

 Hardware performance issues  Multicore organization

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