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Combinational Logic Ckts by JYOTHI

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Combinational Logic Circuits

By
P. Jyothi
Dept. of Instrumentation
Sri Krishnadevaraya University
Anantapur
Why Digital Circuits???

 Computer components are made from


both combinational and sequential logic
circuits
 We will apply the knowledge of Boolean
Algebra to realize these circuits
 First we will look at Combinational
Logic Circuit
Types of Digital Circuits
Block Diagram of
Combinational Circuit
 Outputs are functions of (present) inputs
 No memory
 Can be described using Boolean expressions
Examples of Combinational
Logic Circuits
 Adders
 Subtractors
 Decoders
 Encoders
 Multiplexers
Example
Design Concepts

Hierarchical design
 Used to solve large design problems
 Break problem into smaller (sub)
problems
 Solve each sub-problem (i.e. realize
design)
 Combine individual solutions
Design Concepts


Specification
 Describes the problem to be solved.
 Describes what needs to be done,
not how to do it.

Implementation
 Describes how the problem is solved.
Design Concepts

Issues
 Most solutions are not unique.

More than one solution may meet the
specifications
 Cannot always satisfy all of the requirements.
 Must identify (and study) design tradeoffs.

Cost

Speed

Power consumption

etc.
Design Process
 Identify requirements (i.e. circuit specifications)
 Determine the inputs and outputs.
 Derive the Truth Table
 Determine simplified Boolean expression(s)
 Implement solution
 Verifying the Solution
Logic Circuit Design
 Example:

 Design a combinational logic circuit to


convert between Binary Coded Decimal
(input) and Excess-3 Code (output)
To implement the design, follow the 5 steps
specified in the Design Process.
Logic Circuit Design
 1. Circuit Specification

 The combinational logic circuit must convert


a code value in Binary Coded Decimal to its
corresponding code value in Excess-3 Code.
Logic Circuit Design
 2. Determine Inputs and Outputs

 Input: Binary Coded Decimal value


Binary Coded Decimal

Assign a 4-bit code to each decimal digit.
 A 4-bit code can represent 16 values.
 There are only 10 digits in the decimal number
system.

Unassigned codes are not used.
 How do we interpret these unused codes?

Hint: think about K-maps.

Remember “don't cares”?
Binary Coded Decimal
Decimal Digit BCD Code
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
Logic Circuit Design
 2. Determine Inputs and Outputs

 Output: Excess-3 Code value


Excess-3 Code
Decimal Digit Excess-3 Code
0 0011
1 0100
2 0101
3 0110
4 0111
5 1000
6 1001
7 1010
8 1011
9 1100
Logic Circuit Design
 3. Derive Truth Table
Code Conversion
Logic Circuit Design
 4. Determine simplified Boolean
expression(s)
Code Conversion
Code Conversion
Code Conversion
Code Conversion
Logic Circuit Design
 5. Implement Solution
Code Converter
Logic Circuit Design
 6. Verify Solution

 (Analyze, Simulate, or Test the Logic Circuit)


Logic Circuit Design
 Exercise:

 Design a combinational logic circuit that


compares two 2-bit numbers, A (a1a0) and B
(b1b0), and outputs a 1 when A > B.
Multiple-Output Logic Circuits
Example:

Given two functions, F1 and F2, of the same input


variables x1.. x4, design the minimum-cost
implementation.
Multiple-output Logic Circuit
x1 x2 x1 x 2
x 3 x4 x3 x4
00 01 11 10 00 01 11 10
00 1 1 00 1 1

01 1 1 1 01 1 1

11 1 1 11 1 1 1

10 1 1 10 1 1

(a) Function f 1 (b) Function f 2

F1 = X1'.X3 + X1.X3' + X2.X3'.X4 F2 = X1'.X3 + X1.X3' + X2.X3.X4


Multiple-output Logic Circuit
x2
x3
x4
f1
x1
x3

x1
x3
f2
x2
x3
x4

(c) Combined circuit for f 1 and f 2


Example:

Given two functions, F3 and F4, of the same input


variables x1.. x4, design the minimum-cost
implementation for the combined circuit.

Note: the minimum-cost implementation for the combined circuit may not
be the same as the minimum-cost implementations for the individual circuits.
Multiple-output Logic Circuit
x1 x 2 x1 x 2
x 3 x4 x3 x 4
00 01 11 10 00 01 11 10
00 00

01 1 1 1 01 1 1 1

11 1 1 1 11 1 1 1

10 1 10 1

(a) Optimal realization of f 3 (b) Optimal realization of f 4

F3 = X1'.X4 + X2.X4 + X1'.X2.X3 F4 = X2'.X4 + X1.X4 + X1'.X2.X3.X4'

Logic Gates required: Logic Gates required:


2 2-input AND 2 2-input AND
1 3-input AND 1 4-input AND
1 3-input OR 1 3-input OR

Total Gates and Inputs required:


8 Logic Gates
21 Inputs
Multiple-output Logic Circuit
x1 x 2 x1 x 2
x 3 x4 x3 x 4
00 01 11 10 00 01 11 10
00 00

01 1 1 1 01 1 1 1

11 1 1 1 11 1 1 1

10 1 10 1

(c) Optimal realization of f 3 and f 4 together

F3 = X1'.X4 + X1.X2.X4 + X1'.X2.X3.X4' F4 = X2'.X4 + X1.X2.X4 + X1'.X2.X3.X4'

Logic Gates required: Logic Gates required:


1 2-input AND 1 2-input AND
1 3-input AND 1 3-input AND
1 4-input AND shared logic gates 1 4-input AND
1 3-input OR 1 3-input OR

Total Gates and Inputs required:


6 Logic Gates
17 Inputs
Multiple-output Logic Circuit
x1
x4
x1 f3
x2
x4
x1
x2
x3
x4 f4
x2
x4

(d) Combined circuit for f 3 and f4

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