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Memory Hierarchy & Cache Memory

This document discusses computer memory hierarchy and cache memory. It begins by describing the key characteristics of memory like location, capacity, and unit of transfer. It then discusses memory hierarchy, noting that the fastest memory is processor registers, followed by main memory and cache memory which improves performance. Cache memory uses principles of locality of reference and can result in cache hits or misses. The document contains diagrams illustrating direct mapping between main memory and cache.

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34 views

Memory Hierarchy & Cache Memory

This document discusses computer memory hierarchy and cache memory. It begins by describing the key characteristics of memory like location, capacity, and unit of transfer. It then discusses memory hierarchy, noting that the fastest memory is processor registers, followed by main memory and cache memory which improves performance. Cache memory uses principles of locality of reference and can result in cache hits or misses. The document contains diagrams illustrating direct mapping between main memory and cache.

Uploaded by

bili
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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MEMORY

HIERARCHY &
CACHE MEMORY
WEEK 08
COMPUTER MEMORY
KEY CHARACTERISTIC OF MEMORY
LOCATION
CAPACITY
UNIT OF TRANSFER

• A related concept is the unit of transfer. For internal memory, the unit of transfer is equal to the number
of electrical lines into and out of the memory module.
• This may be equal to the word length, but is often larger, such as 64, 128, or 256 bits.
• For external memory, data are often transferred in much larger units than a word, and these are referred to
as blocks.
ACCESS METHOD
PERFORMANCE
PHYSICAL TYPE
PHYSICAL CHARACTERISTIC
ORGANIZATION
MEMORY HIERARCHY
MEMORY HIERARCHY
MEMORY HIERARCHY
MEMORY HIERARCHY

• The fastest, smallest, and most expensive type of memory consists of the registers internal to the
processor. Typically, a processor will contain a few dozen such registers, although some machines contain
• hundreds of registers.
• Skipping down two levels, main memory is the principal internal memory system of the computer. Each
location in main memory has a unique address.
• Main memory is usually extended with a higher-speed, smaller cache. The cache is not usually visible to
the programmer or, indeed, to the processor. It is a device for staging the movement of data between main
memory and processor registers to improve performance.
MEMORY

• The three forms of memory just described are, typically, volatile and employ semiconductor technology.
• The use of three levels exploits the fact that semiconductor memory comes in a variety of types, which
differ in speed and cost. Data are stored more permanently on external mass storage devices, of which the
most common are hard disk and removable media, such as removable magnetic disk, tape, and optical
storage.
• External, nonvolatile memory is also referred to as secondary memory or auxiliary memory. These are
used to store program and data files and are usually visible to the programmer only in terms of files and
records, as opposed to individual bytes or words.
BIG PICTURE OF MEMORIES
BIG PICTURE OF MEMORIES
BIG PICTURE OF MEMORIES
BIG PICTURE OF MEMORIES
CACHE MEMORY PRINCIPLES (CACHE
HIT & MISS,LOCALITY OF REFERENCE)
FIGURE 4.6 EXPLANATION

• .In this organization, the cache connects to the processor via data, control, and address lines.
• The data and address lines also attach to data and address buffers, which attach to a system bus from
which main memory is reached.
• When a cache hit occurs, the data and address buffers are disabled and communication is only between
processor and cache, with no system bus traffic.
• When a cache miss occurs, the desired address is loaded onto the system bus and the data are returned
through the data buffer to both the cache and the processor.
• In other organizations, the cache is physically interposed between the processor and the main memory for
all data, address, and control lines. In this latter case, for a cache miss, the desired word is first read into
the cache and then transferred from cache to processor.
FIGURE 4.4 EXPLANATION
FIGURE 4.4 EXPLANATION
MAPPING

• There are three types of mapping


– Direct
– Associative
– Set Associative

• Only Direct mapping will be discussed in detail in next slides.


MAPPING EXAMPLE
(MAIN MEMORY)
MAPPING EXAMPLE (MAIN MEMORY)
MAPPING EXAMPLE (CACHE MEMORY)
MAPPING EXAMPLE (RAM TO CACHE)
MAPPING EXAMPLE (RAM TO CACHE)
THRASHING

• The direct mapping technique is simple and inexpensive to implement.


• Its main disadvantage is that there is a fixed cache location for any given block.
• Thus, if a program happens to reference words repeatedly from two different blocks that map
into the same line, then the blocks will be continually swapped in the cache, and the hit ratio
will be low (a phenomenon known as thrashing).
ASSOCIATIVE MAPPING/SET
ASSOCIATIE MAPPING
• Associative mapping overcomes the disadvantage of direct mapping by permitting each main
memory block to be loaded into any line ofthe cache.
CACHE REPLACEMENT POLICY

• Replacement policy is required to increse cache hit and to reduce miss penalty.
– FIFO (First In First Out)
– LRU (Least Recently Used)
– MRU (Most Recently Used)
– Random

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