Chapter 2

Programming with 8085 microprocessors

Class taken by: Er. Hasina Shakya

Assistant lecturer, Himalaya college of
Engineering
August, 2020
Internal Architecture of 8085 microprocessor
Internal Architecture of 8085 microprocessor

• ALU
– Performs arithmetic logic operations
– Includes accumulator (A) , temporary register and
flags(flipflop).
• Accumulator
– 8- bit register
– 8085 is accumulator based microprocessor.
– When data is read from input port, it first moved to
accumulator and when data is sent to output port, it
must be first placed in accumulator.
 Internal Architecture of 8085
• Flags
•

• Contains 5 flipflops each known as flag

• Sign-
– If the most significant bit (MSB) of the result of the last operation is
1 (negative), then its status will be 1 otherwise 0.
• Zero -
– If the result of last operation is zero, its status will be 1 otherwise o.
Flags (continue..)
• Auxillary carry-
– If the last operation generates a carry from the lower
half word (lower nibble), its status will be 1 otherwise
0.
• Parity –
– If the result of the last operation has even number of
1’s (even parity), its status will be 1 otherwise 0.
• Carry-
– If the last operation generates a carry its status will 1
otherwise 0.
8085 architecture( continue..)
• Instruction Register
– 8 bit register not accessible to programmers
– Receives op-codes from internal data bus and
sends to instruction decoder
• Register array-
• Namely B,C,D,E accessible to programmers
– Each is 8 bit registers.
– Can be used as 16 bit registers in pair i.e BC, DE
Register Array ( continue..)
• Stack Pointer (SP)-
– 16 bit register used as pointer
– Points to specified memory location called stack.
– Stack pointer points to beginning to stack.
• Program Counter(PC)-
– Contains the address of next intruction to be
fetched
Register Array ( continue..)
• Registers H and L
– Each 8 bit registers.
– Can be used in pair HL as 16 bit registers.
– The memory location pointed by HL is also the
immediate memory termed as M
– Can be used as scratch pad registers
 8085 architecture (continue..)
• Timing and control Unit:
– Generates control signals necessary for communication
beween microprocessor and peripherals.
• Interrupt Control:
– The various interrupt controls signals (INTR, RST 5.5,
RST 6.5, RST 7.5 and TRAP) are used to interrupt a
microprocessor.
• Serial I/O control:
– SID , SOD controls serial data transmission.
Characteristics features of 8085
• 8-bit general purpose microprocessor capable
of addressing 64K of memory.
• Has 40 pins.
• Requires power supply of +5V
• Operates on a frequency of 3 Mhz
Characteristics features of 8085(continue..)

• 8085 Bus
• Address Bus-
– It has 16 signal lines.
– these lines are split into two segments A15-A8 and
AD7- AD0
– The eight signals A15-A8 are unidirectional and
used as high order bus.
8085 Bus (continue..)
• Data Bus
– It has 8 signal lines
– AD0-AD7
– They are bidirectional
– They also serve the purpose of low order address
bus.
8085 Bus (continue..)
• Control and Status signals:
• ALE ( Address Latch Enable)-
– This signal is used primarily to latch the low-order address from the
multiplexed bus and generate a separate set of eight address lines A7 –A0
.
• RD (active low)
• WR( active low)
• IO/M-
– indicates if its an IO operation or memory operation.
• S1 and S0 –
– Status signals
Characteristics features of 8085(continue..)
• Externally initiated signals
• INTR – interrupt request
• INTA- interrupt acknowledge
• RST 7.5, RST6.5, RST 5.5 – vectored interrupt
• TRAP – NMI interrupt
• HOLD – DMA request for bus access
• HLDA- HOLD acknowledge
• READY ( input)- delay read or write cycle to match the speed with slow
peripherals.
• RESET IN – Reset MPU, PC sets to 0
• RESET out- MPU is being reset. Can be used to reset other devices
• SID and SOD – used for serial data transmission
Instruction Cycle
Instruction Format and Description
• Each instruction has two fields
• Op-code field
• Operand field
– It may include 8-bit (or 16-bit) data, an internal
register, a memory location, or an 8-bit (or 16-bit)
address.
Instruction Format
• Depending upon number of address specified, there are 3
types of instruction.
• One address format-
– It has 1 byte opcode and the operand is default. Eg; MOV A,B ,
ADD B
• Two address format-
– It has one byte opcode and 1 byte operand.
– Eg; MVI A, 80H , OUT 20H
• Three address format-
– It has one byte opcode and 2 bytes operand.
– Eg; LXI B, 2050H , LDA 4560H
Instruction format ( continue..)
Classification of instructions

• Data transfer group: The instructions which are used to transfer

data from one register to another register or register to memory.
• Arithmetic group: The instructions which perform arithmetic
operations such as addition, subtraction, increment, decrement etc.
• Logical group: The instructions which perform logical operations
such as AND, OR, XOR, COMPARE etc.
• Branching group: The instructions which are used for looping and
branching are called branching instructions like jump, call etc.
• Miscellaneous group: The instructions relating to stack operation,
controlling purposes such as interrupt operations are fall under
miscellaneous group including machine control like HLT, NOP.
Data Transfer Instructions
• MOV Rd, Rs Rd Rs (move register
instruction)
– 1 byte instruction
– Copies data from source register to destination
register.
– Rd & Rs may be A, B, C, D, E, H &L
– E.g. MOV A, B
Data Transfer Instructions
MVI R, 8 bit data (move immediate instruction)
– 2 byte instruction
– Loads the second byte ( 8 bit immediate data)
into the register specified.
– R may be A, B, C, D, E, H & L
– E.g. MVI C, 53H C=53H
Data Transfer Instructions

• MOV M, R (Move to memory from register)

• – Copy the contents of the specified register to
memory. Here memory is the location specified by
contents of the HL register pair.
• – E.g. MOV M, B
• H=20H
• L=30H
• [HL]=[2030H]
Data Transfer Instructions

• MOV R, M (move to register from memory)

• – Copy the contents of memory location
specified by HL pair to specified register.
• – E. g. MOV B, M
Data Transfer Instructions

• LXI RP, 2 bytes data (load register pair)

• – 3-byte instruction
• – Load immediate data to register pair
• – Register pair may be BC, DE, HL & SP(Stack pointer)
• – 1st byte- Op-code
• – 2nd byte – lower order data
• – 3rd byte- higher order data
• – E.g. L X I B, 4532H; B= 45, C =32H
Data Transfer Instructions

• MVI M, data (load memory immediate)

• – 2 byte instruction.
• – Loads the 8-bit data to the memory location
whose address is specified by the contents of
HL pair. E.g. MVI M , 35H; [HL]= 35H
Example
• WAP to store 32H ,8-bit data in a memory
address, 4000H
LXI H, 4000H
MVI M, 32H
HLT
 Data Transfer Instructions

• LDA 4035H (Load accumulator direct)

• – 3-byte instruction
• – Loads the accumulator with the contents of
memory location whose address is specified
by 16 bit address.
• –A [4035H]
 Data Transfer Instructions
• LDAX RP (Load accumulator indirect)
• – 1 byte instruction.
• – Loads the contents of memory location pointed
by the contents of register pair to accumulator.
• – E. g. LDAX B [A] [[BC]]
• LXI B, 9000H B= 90, C= 00
• LDAX B A= [9000]
Data Transfer Instructions

• STA 16-bit address (store accumulator

contents direct)
• – 3-byte instruction.
• – Stores the contents of accumulator to
specified address
• – E.g. STA FA00H [FA00] [A]
Data Transfer Instructions

• STAX RP [RP] A
• – Store s the contents of accumulator to memory location
specified by the contents of register pair. 1 byte instruction
• E. g. STAX B
• LXI B, 9500H Output
• LXI D, 9501H
[9500]=32H
• MVI A, 32H
• STAX B
[9501]=7AH
• MVI A, 7AH
• STAX D
Practice
• The memory location 2050H holds the data byte F7H.
Write instructions to transfer the data byte to
accumulator using different op-codes: LXI,MOV, LDAX
and LDA.

LXI H, 2050H LXI B, 2050H

MOV A, M
LDA 2050H
LDAX B
Practice
• Register B contains 32H, Use MOV and STAX to
copy the contents of register B in memory
location 8000H.

LXI H, 8000H LXI D, 8000H

MOV M,B MOV A, B
STAX D
Practice
• WAP to store 32H in [9500H] and 7AH in
[9501H] using LXI H and MVI M
LXI H, 9500H
MVI M, 32H
MVI L, 01H
MVI M, 7AH
HLT
Practice
• Exchange the contents of memory locations
2000H and 4000H using instructions like STA
and LDA.
LDA 2000H : "Get the contents of memory location 2000H into
accumulator"
MOV B, A : "Save the contents into B register"
LDA 4000H : "Get the contents of memory location 4000Hinto
accumulator"
STA 2000H : "Store the contents of accumulator at address 2000H"
MOV A, B : "Get the saved contents back into A register"
STA 4000H : "Store the contents of accumulator at address 4000H“
HLT
Practice

• Exchange the contents of

memory locations 2000H
and 4000H using instructions
like LXI, LDAX and STAX.
Solution
LXI H 2000H : "Initialize HL register pair as a pointer to memory location
2000H."
LXI D 4000H : "Initialize DE register pair as a pointer to memory location
4000H."
MOV B, M : "Get the contents of memory location 2000H into B register."
LDAX D : "Get the contents of memory location 4000H into A register."
MOV M, A : "Store the contents of A register into memory location 2000H."
MOV A, B : "Copy the contents of B register into accumulator."
STAX D : "Store the contents of A register into memory location 4000H."
HLT : "Terminate program execution."
Practice
• Write a program to load memory locations
7090 H and 7080 H with data 40H and 50H
and then swap these data.
Data Transfer instruction
IN 8-bit address
• – 2-byte instruction
• – Read data from the input port address
specified in the second byte and loads data
into the accumulator i. e. input port content to
accumulator:
• – E. g. IN 40H A = [40H]
Data Transfer instruction
OUT 8-bit address
• – 2-byte instruction
• – Copies the contents of the accumulator to
the output port address specified in the 2nd
byte.
• – E. g. OUT 40H [40] =A
Data Transfer instruction
Data Transfer instruction
Data Transfer instruction
 Addressing modes
• The various format (way) of specifying the
operands are called addressing mode
• The 8085 has 5 addressing mode:
• Direct addressing mode
• Register Direct Addressing mode
• Register Indirect Addressing mode
• Immediate Addressing mode
• Implied Addressing mode
Direct Addressing mode
 Register Direct Addressing mode

• Register Direct addressing mode:

• This mode specifies the register or register
pair that contains the data. E g. MOV A, B Here
register B contains data rather than address of
the data. Other examples are: ADD, XCHG etc.
Register Indirect Addressing mode

• Register Indirect addressing mode:

• In this mode the address part of the instruction
specifies the memory whose contents are the
address of the operand. So in this type of
addressing mode, it is the address of the
address rather than address itself. (One
operand is register) e. g. MOV R, M MOV M, R
STAX, LDAX etc.
 Immediate Addressing Mode

• Immediate addressing mode:

• In this mode, the operand position is the
immediate data. For 8-bit data, instruction size
is 2 bytes and for 16 bit data, instruction size is
3 bytes. E.g. MVI A, 32H
 Implied Addressing mode

• Implied or Inherent addressing mode:

• The instructions of this mode donot have
operands. E.g. NOP: No operation HLT: Halt EI:
Enable interrupt DI: Disable interrupt
Arithmetic Group Instruction
• ADD R/M
– 1 byte add instruction.
– Adds the contents of register/memory to the
contents of the accumulator and stores the
result in accumulator.
– E. g. ADD B; A= A+B
Arithmetic Instructions

• ADI 8 bit data

• – 2 byte add immediate instruction.
• – Adds the 8 bit data with the contents of
accumulator and stores result in accumulator.
• – E g. ADI 9BH ; A=A+9BH
Arithmetic instructions

• ADC R/M and ACI 8-bit data ( addition with carry

(1 byte))
• – ACI 8-bit data= immediate (2 byte).
• – Adds the contents of register or 8 bit data
whatever used suitably with the Previous carry.
• – E.g. ADC B ; A =A+B+CY

• ACI 70H ; A =A + 70+CY

 Practice

• Write an assembly language program to add

two 8 bit numbers stored at address 2050 and
address 2051 in 8085 microprocessor and
store the result in 3050H and carry in 3051H if
any.
Algorithm
• Load the first number from memory location 2050
to accumualtor.
• Move the content of accumulator to register H.
• Load the second number from memory location
2051 to accumaltor.
• Then add the content of register H and accumulator
using “ADD” instruction and storing result at 3050
• The carry generated is recovered using “ADC”
command and is stored at memory location 3051
Solution
 Practice

• Write a program to add two 16 bit numbers

stored at memory location 2050H, 2051H and
2052H, 2053H using 8 bit operation and store
the result at 3050H and 3051H.
Hint
Solution
Arithmetic Instructions
• SUB R/M
• – 1 byte subtract instruction.
• – Subtracts the contents of specified register /
m with the contents of accumulator and
stores the result in accumulator.
• – E. g. SUB D ; A= A-D
Arithmetic Instructions

• SUI 8 bit data

• – 2 byte subtract immediate instruction.
• – Subtracts the 8 bit data from the contents of
accumulator stores result in accumulator.
• – E. g. SUI D3H; A= A-D3H
Arithmetic Instructions
• INR R/M, DCR R/M
• – 1 byte increment and decrement
instructions.
• – Increase and decrease the contents of
R(register) or M(memory) by 1 respectively.
• – E. g. DCR B ; B=B-1
Arithmetic instructions

• INX Rp, DCX RP

• – Increase and decrease the register pair by 1.
• – Acts as 16 bit counter made from the
contents of 2 registers (1 byte instruction)
• – E.g. INX B ;BC=BC+1
• DCX D ;DE=DE+1
Arithmetic Instructions
• SBB R/M
• – 1 byte instruction.
• – Subtracts the contents of register or
memory from the contents of accumulator
and stores the result in accumulator.
• – e. g. SBB D ; A= A-D-Borrow
Arithmetic Instructions
• SBI 8 bit data
• – 2 byte instruction.
• – Subtracts the 8-bit immediate data from the
content of the accumulator and stores the
result in accumulator.
• – E.g. SBI 70H ; A= A-70-Borrow
Arithmetic Instructions
DAD Rp(double addition)
• – 1 byte instruction.
• – Adds register pair with HL pair and store the
16 bit result in HL pair.
• – E. g. LXI H, 7320H
• LXI B, 4220H
• DAD B; HL=HL+BC
• 7320+4220=B540
Arithmetic Instructions
• DAA (Decimal adjustment accumulator)
• – Used only after addition.
• – 1 byte instruction.
• – The content of accumulator is changed from binary to
two 4-bit BCD digits.
• – E. g MVI A, 78H ; A=78
• MVI B, 42H ; B=42
• ADD B ; A=A+B = BA
• DAA ; A=20, CY=1
DAA operation
DAA operation
• If the LS hex digit in A is <= 9 and AC flag is 0, the LS
hex digit value will not be altered.
• If the LS hex digit is >9, or if AC flag is set to 1, it
adds 6 to the LS hex digit of A.
• If the MS hex digit is <= 9 and Cy flag is 0, the MS
hex digit will not be altered, and Cy flag is reset to 0.
• If the MS hex digit is > 9, or if Cy flag is set to 1, it
adds 6 to the MS hex digit of A and sets Cy flag to 1.
Example
Example
Example
Example
 WAP to add two 4 digit BCD numbers equals
7342 and 1989 and store result in BC register.
Register BC contains 8538H and register DE contain
62A5H. Write instructions to subtract the contents of
DE from the contents of BC and Place the result in BC.
Logical Instructions
ANA R/M (the contents of register/memory)
• – Logically AND the contents of
register/memory with the contents of
accumulator.
• – 1 byte instruction.
Logical Instructions
ANI 8 bit data
• – Logically AND 8 bit immediate data with the
contents of accumulator.
• – 2 byte instruction.
Logical Instructions

• ORA R/M
• – Logically OR the contents of
register/memory with the contents of
accumulator.
• – 1 byte instruction.
ORI 8 bit data
• – Logically OR 8 bit immediate data with the
contents of the accumulator.
• – 2 byte instruction.
•
XRA R/M
• – Logically exclusive OR the contents of
register memory with the contents of
accumulator.
• – 1 byte instruction.
• – CY and AC is reset and other as per result.
XRI 8 bit data
• – Logically Exclusive OR 8 bit data immediate
with the content of accumulator.
• – 2 byte instruction.
• – CY and AC is reset and other as per result.
CMA (Complement accumulator)
• – 1 byte instruction.
• – Complements the contents of the
accumulator.
• CMP R/M (1 byte instruction) CPI 8 bit data
( 2 byte instruction)
• – Compare the contents of register/ memory
and 8 bit data with the contents of
accumulator.
• – Status is shown by flags & all flags are
modified.
CMP instruction
 Write a program to find 1’s and 2’s complement of 8-
bit number stored at 3000 memory address and store
result into 3001 and 3002 memory address.
Write a program to find 1’s and 2’s complement of 16-
bit number stored at 3000 memory address and store
result into 3002 and 3004 memory address.
Logical Rotate instructions
Branching instructions
• The branching instructions instruct the microprocessor to go
to a different memory location and the microprocessor
continues executing machine codes from that new location.
• The branching instructions are the most powerful instructions
because they allow the microprocessor to change the
sequence of a program, either unconditionally or under
certain test conditions

• Jump instructions
• Call and return instruction
• Restart instruction
Jump Instruction
• They are 3 byte instructions, one byte for the
operation code followed by a 16 bit (2 byte)
memory address.
• Unconditional jump:
• JMP 16-bit address
• Eg: JMP 4000H
• The jump location can also be specified using
a label or name.
Example
Conditional Jump
Write an assembly language program to count
the number of ones in contents of register B and
store the result at memory location 3050.
• Example:
• If register B contains 75H , then 3050H
memory location must contain 5.
Solution
Write an assembly language program in 8085 microprocessor to
check whether the 8 bit number which is stored at memory
location 2050 is even or odd. If even, store 22 at memory
location 3050 otherwise store 11 at memory location 3050.
WAP to move 10 bytes of data from starting
address 9500 H to 9600H
Solution
• MVI B, 0AH
• LXI H, 9500H
• LXI D, 9600H
• L1:MOV A, M
• STAX D
• INX H
• INX D
• DCR B
• JNZ L1
• HLT
Write to transfer 30 data starting from 8500 to
9500H if data is odd else store 00H.
Call and return instructions: (Subroutine)

• Subroutine
• A subroutine is a group of instructions that
perform a subtask. A subroutine is written as a
separate unit apart from the main program
and the microprocessor transfers the program
execution sequence from main program to
subroutine whenever it is called to perform a
task. After the completion of subroutine task
microprocessor returns to main program.
CALL and RET

• 1. CALL 16 bit memory

• – Call subroutine unconditionally.
• – 3 byte instruction.
• – Saves the contents of program counter on the stack pointer.
Loads the PC by jump address (16 bit memory) and executes the
subroutine.
• 2. RET
• – Returns from the subroutine unconditionally.
• – 1 byte instruction
• – Inserts the contents of stack pointer to program counter.
Example
• 3. CC, CNC, CZ, CNZ, CP, CM, CPE, CPO
• – Call subroutine conditionally.
• – Same as CALL except that it executes on the basis
of flag conditions.
• 4. RC, RNC, RZ, RNZ, RP, RM, RPE, RPO
• – Return subroutine conditionally.
• – Same as RET except that if executes on the basis
of flag conditions.
Restart Instruction:
Miscellaneous Group Instructions:
• Stack
• The stack is defined as a set of memory location in R/W memory,
specified by a programmer in a main memory .
• These memory locations are used to store binary information
temporarily during the execution of a program.
• The beginning of the stack is defined in the program by using the
instruction LXI SP, 16 bit address. Once the stack location is
defined, it loads 16 bit address in the stack pointer register. Storing
of data bytes for this operation takes place at the memory location
that is one less than the address .
• e.g. LXI SP, 2099H Here the storing of data bytes begins at 2098H
and continuous in reverse order i.e 2097H.
PUSH AND POP

• 1. PUSH Rp/PSW (Store register pair on stack)

• – 1 byte instruction.
• – Copies the contents of specified register pair or
program status word (accumulator and flag) on the
stack.
• – Stack pointer is decremented and content of high
order register is copied. Then it is again decremented
and content of low order register is copied.
• POP Rp/PSW (retrieve register pair from stack)
• – 1 byte instruction.
• – Copies the contents of the top two memory locations
of the stack into specified register pair or program
status word.
• A content of memory location indicated by SP is copied
into low order register and SP is incremented by 1. Then
the content of next memory location is copied into high
order register and SP is incremented by 1.
Multiply two 8 bit numbers stored at address 2050 and
2051. Result is stored at address 3050 and 3051.
Starting address of program is taken as 2000.
Write an assembly language program in 8085
microprocessor to sort a given list of n numbers
using Bubble Sort.

Size of list is stored at 2040H and list of numbers from 2041H onwards.