Cited By
View all- Pomeranz I(2019)Incomplete Tests for Undetectable Faults to Improve Test Set QualityACM Transactions on Design Automation of Electronic Systems10.1145/330649324:2(1-13)Online publication date: 13-Feb-2019
Test cost reduction for multiple-voltage designs with bridge defects through gate-sizing
Abstract
Multiple-voltage is an effective dynamic power reduction design technique. Recent research has shown that testing for resistive bridging faults in such designs requires more than one voltage setting for 100% defect coverage; however switching between several supply voltage settings has a detrimental impact on the overall cost of test. This paper proposes an effective Gate Sizing technique for reducing test cost of multi-Vdd designs with bridge defects. Using synthesized ISCAS benchmarks and a parametric fault model, experimental results show that for all the circuits, the proposed technique achieves 100% defect coverage at a single Vdd setting; in addition it has a lower overhead than the recently proposed Test Point Insertion technique in terms of timing, area and power.
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- Test cost reduction for multiple-voltage designs with bridge defects through gate-sizing
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Information & Contributors
Information
Published In
April 2009
1776 pages
ISBN:9783981080155
- General Chairs:
- Luca Benini,
- Giovanni De Micheli,
- Program Chairs:
- Bashir Al-Hashimi,
- Wolfgang Mueller
Sponsors
- EDAA: European Design Automation Association
- ECSI
- EDAC: Electronic Design Automation Consortium
- SIGDA: ACM Special Interest Group on Design Automation
- The IEEE Computer Society TTTC
- The IEEE Computer Society DATC
- The Russian Academy of Sciences: The Russian Academy of Sciences
Publisher
European Design and Automation Association
Leuven, Belgium
Publication History
Published: 20 April 2009
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DATE '09
Sponsor:
- EDAA
- EDAC
- SIGDA
- The Russian Academy of Sciences
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Overall Acceptance Rate 518 of 1,794 submissions, 29%
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Cited By
View all- Pomeranz I(2019)Incomplete Tests for Undetectable Faults to Improve Test Set QualityACM Transactions on Design Automation of Electronic Systems10.1145/330649324:2(1-13)Online publication date: 13-Feb-2019
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