research-article

An energy-efficient virtual channel power-gating mechanism for on-chip networks

Authors:

Amirhossein Mirhosseini,

Mohammad Sadrosadati,

Ali Fakhrzadehgan,

Mehdi Modarressi,

Hamid Sarbazi-AzadAuthors Info & Claims

DATE '15: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition

Pages 1527 - 1532

Published: 09 March 2015 Publication History

Abstract

Power-gating is a promising method for reducing the leakage power of digital systems. In this paper, we propose a novel power-gating scheme for virtual channels in on-chip networks that uses an adaptive method to dynamically adjust the number of active VCs based on the on-chip traffic characteristics. Since virtual channels are used to provide higher throughput under high traffic loads, our method sets the number of virtual channel at each port selectively based on the workload demand, thereby do not negatively affect performance. Evaluation results show that by using this scheme, about 40% average reduction in static power consumption can be achieved with negligible performance overhead.

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Cited By

Mirhosseini ASadrosadati MAghamohammadi FModarressi MSarbazi-Azad H(2019)BARANACM Transactions on Parallel Computing10.1145/32940495:3(1-29)Online publication date: 22-Jan-2019
https://dl.acm.org/doi/10.1145/3294049
Sadrosadati MEhsani SFalahati HAusavarungnirun RTavakkol AAbaee MOrosa LWang YSarbazi-Azad HMutlu O(2019)ITAPACM Transactions on Architecture and Code Optimization10.1145/329160616:1(1-26)Online publication date: 27-Feb-2019
https://dl.acm.org/doi/10.1145/3291606
Kislal OKotra JTang XKandemir MJung M(2018)Enhancing computation-to-core assignment with physical location informationACM SIGPLAN Notices10.1145/3296979.319238653:4(312-327)Online publication date: 11-Jun-2018
https://dl.acm.org/doi/10.1145/3296979.3192386
Show More Cited By

Index Terms

An energy-efficient virtual channel power-gating mechanism for on-chip networks
1. Hardware

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Information & Contributors

Information

Published In

cover image ACM Conferences

DATE '15: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition

March 2015

1827 pages

ISBN:9783981537048

General Chair:
Wolfgang Nebel
OFFIS & University of Oldenburg, DE
,
Program Chair:
David Atienza
EPFL, CH

Sponsors

EDAA: European Design Automation Association
ECSI
EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
Russian Acadamy of Sciences: Russian Acadamy of Sciences
IEEE Council on Electronic Design Automation (CEDA)

Publisher

EDA Consortium

San Jose, CA, United States

Publication History

Published: 09 March 2015

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Research-article

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DATE '15

Sponsor:

EDAA
EDAC
SIGDA
Russian Acadamy of Sciences

DATE '15: Design, Automation and Test in Europe

March 9 - 13, 2015

Grenoble, France

Acceptance Rates

DATE '15 Paper Acceptance Rate 206 of 915 submissions, 23%;

Overall Acceptance Rate 518 of 1,794 submissions, 29%

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DATE '25

Sponsor:
sigda

Design, Automation and Test in Europe

March 31 - April 2, 2025

Lyon , France

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Cited By

Mirhosseini ASadrosadati MAghamohammadi FModarressi MSarbazi-Azad H(2019)BARANACM Transactions on Parallel Computing10.1145/32940495:3(1-29)Online publication date: 22-Jan-2019
https://dl.acm.org/doi/10.1145/3294049
Sadrosadati MEhsani SFalahati HAusavarungnirun RTavakkol AAbaee MOrosa LWang YSarbazi-Azad HMutlu O(2019)ITAPACM Transactions on Architecture and Code Optimization10.1145/329160616:1(1-26)Online publication date: 27-Feb-2019
https://dl.acm.org/doi/10.1145/3291606
Kislal OKotra JTang XKandemir MJung M(2018)Enhancing computation-to-core assignment with physical location informationACM SIGPLAN Notices10.1145/3296979.319238653:4(312-327)Online publication date: 11-Jun-2018
https://dl.acm.org/doi/10.1145/3296979.3192386
Farrokhbakht HKamali HJerger NHessabi S(2018)SPONGEProceedings of the International Symposium on Low Power Electronics and Design10.1145/3218603.3218635(1-6)Online publication date: 23-Jul-2018
https://dl.acm.org/doi/10.1145/3218603.3218635
Kislal OKotra JTang XKandemir MJung MFoster JGrossman D(2018)Enhancing computation-to-core assignment with physical location informationProceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/3192366.3192386(312-327)Online publication date: 11-Jun-2018
https://dl.acm.org/doi/10.1145/3192366.3192386
Mirhosseini ASadrosadati MSoltani BSarbazi-Azad HWenisch T(2017)BiNoCHSProceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip10.1145/3130218.3130222(1-8)Online publication date: 19-Oct-2017
https://dl.acm.org/doi/10.1145/3130218.3130222
Mondal HGade SKishore RDeb SFanucci LTeich J(2016)Adaptive multi-voltage scaling in wireless NoC for high performance low power applicationsProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972115(1315-1320)Online publication date: 14-Mar-2016
https://dl.acm.org/doi/10.5555/2971808.2972115
Aghilinasab HSadrosadati MSamavatian MSarbazi-Azad H(2016)Reducing Power Consumption of GPGPUs Through Instruction ReorderingProceedings of the 2016 International Symposium on Low Power Electronics and Design10.1145/2934583.2934606(356-361)Online publication date: 8-Aug-2016
https://dl.acm.org/doi/10.1145/2934583.2934606

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