ABSTRACT form only given. Plasma immersion ion implantation (PIII) has been utilized as a low cos... more ABSTRACT form only given. Plasma immersion ion implantation (PIII) has been utilized as a low cost, low energy doping method for large area targets with applications to semiconductor manufacturing. They include doping, shallow junction formation, hydrogenation for poly-Si thin film transistors, and SIMOX (Separated by IMplant of OXygen) structure formation. The characteristics of the dynamic sheath expansion during PIII process is very important for the optimum PIII configuration design and process control in order to obtain more accurate doping results such as the implant dose and impurity profile. For example, the sheath thickness is critical to chamber design and monoenergic ion implant for a more accurate control of as-implanted impurity profile of shallow junction and SIMOX structures. A PDP2 simulation code has been used to simulate PIII processes which aid in the understanding of the physics of PIII processes and obtain the optimum process parameters. PDP2 code is a two-dimensional planar bounded plasma simulator. The Particle-in-Cell method is implemented to solve for the particles and field parameters self-consistently. The code also uses a Monte Carlo scheme to model charged and neutral particle collisions. In order to minimize the simulation time, a pseudo two-dimensional analytical dynamic sheath model has also been developed. It is simple and has an acceptable accuracy but in a very small fraction of the computing time by PDP2 simulations. This model was verified by comparing with the PDP2 computer simulations and the experimental results of the PIII doping processes.
An investigation of different forward-bias and reverse-bias on-resistance in diodes is presented.... more An investigation of different forward-bias and reverse-bias on-resistance in diodes is presented. The impact of this often neglected effect on ESD protection design is demonstrated. A macro-model of a diode has been developed to account for the bias dependent resistance. This has been used in SPICE-type circuit level ESD simulation.
Compliance to system-level ESD robustness at the product level is increasingly becoming a competi... more Compliance to system-level ESD robustness at the product level is increasingly becoming a competitive advantage. Predicting the classification test level of a design prior to fabrication is critical in achieving first pass success and also addressing key concerns in this regards. Compact models and a simulation platform have been developed to predict system-level ESD robustness.
2019 IEEE International Reliability Physics Symposium (IRPS), 2019
The boundaries that determine the LDMOS transient safe operating area are presented. It includes ... more The boundaries that determine the LDMOS transient safe operating area are presented. It includes the time-independent electrical SOA (eSOA) and short-pulse transient SOA post device snapback. A compact modeling methodology is introduced for high voltage LDMOS with minimal circuit simulation convergence shortcomings. By adding a failure monitor, the model proposed can be used to determine both the boundaries of eSOA and short-pulse transient SOA.
2018 18th International Workshop on Junction Technology (IWJT), 2018
Diodes are simple but effective solution for Electrostatic Discharge (ESD) protection. In order t... more Diodes are simple but effective solution for Electrostatic Discharge (ESD) protection. In order to evaluate and simulate ESD robustness of diode protection schemes at circuit-level for integrated circuits, models of diode thermal failure and voltage overshoot for ESD simulation are proposed in this paper. These models are based on physical mechanisms of ESD events and device failure. According to simulation results, the models are shown to predict thermal failure and reproduce voltage overshoot phenomena under ESD stresses, respectively.
A leading cause of device failure under electrostatic discharge stress conditions is thermal fail... more A leading cause of device failure under electrostatic discharge stress conditions is thermal failure. This failure occurs as a result of excessive energy dissipation which raises the temperature of the device to a critical breaking level. To predict such a physical failure at circuit level, a compact model compatible with circuit simulators is proposed. The model is derived from the fundamental heat transfer equations and is shown to accurately predict thermal failure for arbitrary electrical stress waveforms.
2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2018
The present state of compact device modelling for circuit level ESD simulation with SPICE has bee... more The present state of compact device modelling for circuit level ESD simulation with SPICE has been reviewed. An industry perspective on the key factors that are important for successful ESD event simulation is provided. The main challenges for the future ESD model developments are also discussed.
Thermal runaway is one of the main causes of semiconductor device failure under electrostatic dis... more Thermal runaway is one of the main causes of semiconductor device failure under electrostatic discharge (ESD) stresses. An experimental method to investigate the failure temperature under such electrical stresses is proposed. By extrapolating the power-to-failure under different stress time versus ambient temperature curves to the temperature axis, an effective failure temperature is extracted which represents the real failure temperature. This temperature is observed to be higher than the temperature at which the semiconductor becomes intrinsic. The latter is conventionally regarded as the critical temperature for thermal failure. These findings suggest that a different thermal-related mechanism is responsible for the ESD-induced damage in semiconductor devices.
The use of plasma immersion ion implantation (PIII) as a novel method for the treatment of polyme... more The use of plasma immersion ion implantation (PIII) as a novel method for the treatment of polymer surfaces is investigated. The effect of PIII treatment on the coefficient of friction, contact angle modification, and surface energy of silicone and EPDM (ethylene-propylene-diene monomer) rubber are investigated as a function of pulse voltage, treatment time, and gas species. Low energy (0 - 8 keV) and high dose (∼1017 - 1018 ions/cm2) implantation of N2, Ar, and CF4 is performed using an inductively coupled plasma source (ICP) at low pressure (0.2 mTorr). PIII treatment reduces the coefficient of friction (μ) of silicone rubber from μ = 0.464 to the range μ = 0.176 – 0.274, and μ of EPDM rubber decreases from 0.9 to the range μ = 0.27 – 0.416 depending on processing conditions. The contact angle of water and diiodomethylene decreases after implantation and increases at higher doses for both silicone and EPDM rubber.
Carbon nitride (CNX) films were prepared by nitrogen ion implantation into carbon films (a-C) dep... more Carbon nitride (CNX) films were prepared by nitrogen ion implantation into carbon films (a-C) deposited on Si substrates by the anodic vacuum arc. Plasma Immersion Ion Implantation (PIII) and Ion Beam (IB) implantation methods were used. X-ray Photoelectron Spectroscopy (XPS) C Is and N Is spectra of all CNX films indicate the formation of carbon-nitrogen bonds. The bonds are associated with the C 1s peaks at 286.6 eV and 285.6 eV , and the N 1s peaks at 399.1 eV and 400.6 eV. Raman spectra show that the structure of the implanted films (CNX) becomes more amorphous as the two broad peaks at 1577 cm-1 (G line) and 1350 cm-1 (D line) observed in the a-C films disappear and a broad asymmetric peak around 1500 cm-1 is formed. The interfacial tension between the a-C films and the substrate , obtained from the contact angle measurements, decreased by more than half after nitrogen implantation.
Graduate School of Engineering, Dept. of Electrical and Computer Engineering. Thesis (Ph. D.)--No... more Graduate School of Engineering, Dept. of Electrical and Computer Engineering. Thesis (Ph. D.)--Northeastern University, 1998. Includes bibliographical references (leaves 118-128).
IEEE Conference Record - Abstracts. 1996 IEEE International Conference on Plasma Science, 2000
ABSTRACT Summary form only given, as follows. The anodic vacuum are was used to deposit thin carb... more ABSTRACT Summary form only given, as follows. The anodic vacuum are was used to deposit thin carbon films (a-C) on Si substrates. The arc produces a partially ionized carbon vapor plasma (less than 20% ionized) and is sustained by a consumable anode. Films with thickness around 0.8-1.7 μm were deposited with a deposition rate of 0.5 μm/min. The a-C films were modified by nitrogen plasma immersion ion implantation (PIII). The effects of nitrogen implantation on the structure and characteristics of the a-C films were investigated by X-ray photoelectron spectroscopy (XPS), Raman spectroscopy, and surface energy calculations from the contact angle measurements. XPS C 1s and N 1s spectra suggest a possible formation of covalent carbon-nitrogen bonds. The a-C films Raman spectra have a G band at 1577 cm-1 and a D band at 1350 cm-l, while the implanted films show a broad asymmetric peak around 1500 cm-1. Surface energy analysis indicates that the nitrogen implanted films have lower interfacial tension with the silicon substrate
ABSTRACT form only given. Plasma immersion ion implantation (PIII) has been utilized as a low cos... more ABSTRACT form only given. Plasma immersion ion implantation (PIII) has been utilized as a low cost, low energy doping method for large area targets with applications to semiconductor manufacturing. They include doping, shallow junction formation, hydrogenation for poly-Si thin film transistors, and SIMOX (Separated by IMplant of OXygen) structure formation. The characteristics of the dynamic sheath expansion during PIII process is very important for the optimum PIII configuration design and process control in order to obtain more accurate doping results such as the implant dose and impurity profile. For example, the sheath thickness is critical to chamber design and monoenergic ion implant for a more accurate control of as-implanted impurity profile of shallow junction and SIMOX structures. A PDP2 simulation code has been used to simulate PIII processes which aid in the understanding of the physics of PIII processes and obtain the optimum process parameters. PDP2 code is a two-dimensional planar bounded plasma simulator. The Particle-in-Cell method is implemented to solve for the particles and field parameters self-consistently. The code also uses a Monte Carlo scheme to model charged and neutral particle collisions. In order to minimize the simulation time, a pseudo two-dimensional analytical dynamic sheath model has also been developed. It is simple and has an acceptable accuracy but in a very small fraction of the computing time by PDP2 simulations. This model was verified by comparing with the PDP2 computer simulations and the experimental results of the PIII doping processes.
An investigation of different forward-bias and reverse-bias on-resistance in diodes is presented.... more An investigation of different forward-bias and reverse-bias on-resistance in diodes is presented. The impact of this often neglected effect on ESD protection design is demonstrated. A macro-model of a diode has been developed to account for the bias dependent resistance. This has been used in SPICE-type circuit level ESD simulation.
Compliance to system-level ESD robustness at the product level is increasingly becoming a competi... more Compliance to system-level ESD robustness at the product level is increasingly becoming a competitive advantage. Predicting the classification test level of a design prior to fabrication is critical in achieving first pass success and also addressing key concerns in this regards. Compact models and a simulation platform have been developed to predict system-level ESD robustness.
2019 IEEE International Reliability Physics Symposium (IRPS), 2019
The boundaries that determine the LDMOS transient safe operating area are presented. It includes ... more The boundaries that determine the LDMOS transient safe operating area are presented. It includes the time-independent electrical SOA (eSOA) and short-pulse transient SOA post device snapback. A compact modeling methodology is introduced for high voltage LDMOS with minimal circuit simulation convergence shortcomings. By adding a failure monitor, the model proposed can be used to determine both the boundaries of eSOA and short-pulse transient SOA.
2018 18th International Workshop on Junction Technology (IWJT), 2018
Diodes are simple but effective solution for Electrostatic Discharge (ESD) protection. In order t... more Diodes are simple but effective solution for Electrostatic Discharge (ESD) protection. In order to evaluate and simulate ESD robustness of diode protection schemes at circuit-level for integrated circuits, models of diode thermal failure and voltage overshoot for ESD simulation are proposed in this paper. These models are based on physical mechanisms of ESD events and device failure. According to simulation results, the models are shown to predict thermal failure and reproduce voltage overshoot phenomena under ESD stresses, respectively.
A leading cause of device failure under electrostatic discharge stress conditions is thermal fail... more A leading cause of device failure under electrostatic discharge stress conditions is thermal failure. This failure occurs as a result of excessive energy dissipation which raises the temperature of the device to a critical breaking level. To predict such a physical failure at circuit level, a compact model compatible with circuit simulators is proposed. The model is derived from the fundamental heat transfer equations and is shown to accurately predict thermal failure for arbitrary electrical stress waveforms.
2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2018
The present state of compact device modelling for circuit level ESD simulation with SPICE has bee... more The present state of compact device modelling for circuit level ESD simulation with SPICE has been reviewed. An industry perspective on the key factors that are important for successful ESD event simulation is provided. The main challenges for the future ESD model developments are also discussed.
Thermal runaway is one of the main causes of semiconductor device failure under electrostatic dis... more Thermal runaway is one of the main causes of semiconductor device failure under electrostatic discharge (ESD) stresses. An experimental method to investigate the failure temperature under such electrical stresses is proposed. By extrapolating the power-to-failure under different stress time versus ambient temperature curves to the temperature axis, an effective failure temperature is extracted which represents the real failure temperature. This temperature is observed to be higher than the temperature at which the semiconductor becomes intrinsic. The latter is conventionally regarded as the critical temperature for thermal failure. These findings suggest that a different thermal-related mechanism is responsible for the ESD-induced damage in semiconductor devices.
The use of plasma immersion ion implantation (PIII) as a novel method for the treatment of polyme... more The use of plasma immersion ion implantation (PIII) as a novel method for the treatment of polymer surfaces is investigated. The effect of PIII treatment on the coefficient of friction, contact angle modification, and surface energy of silicone and EPDM (ethylene-propylene-diene monomer) rubber are investigated as a function of pulse voltage, treatment time, and gas species. Low energy (0 - 8 keV) and high dose (∼1017 - 1018 ions/cm2) implantation of N2, Ar, and CF4 is performed using an inductively coupled plasma source (ICP) at low pressure (0.2 mTorr). PIII treatment reduces the coefficient of friction (μ) of silicone rubber from μ = 0.464 to the range μ = 0.176 – 0.274, and μ of EPDM rubber decreases from 0.9 to the range μ = 0.27 – 0.416 depending on processing conditions. The contact angle of water and diiodomethylene decreases after implantation and increases at higher doses for both silicone and EPDM rubber.
Carbon nitride (CNX) films were prepared by nitrogen ion implantation into carbon films (a-C) dep... more Carbon nitride (CNX) films were prepared by nitrogen ion implantation into carbon films (a-C) deposited on Si substrates by the anodic vacuum arc. Plasma Immersion Ion Implantation (PIII) and Ion Beam (IB) implantation methods were used. X-ray Photoelectron Spectroscopy (XPS) C Is and N Is spectra of all CNX films indicate the formation of carbon-nitrogen bonds. The bonds are associated with the C 1s peaks at 286.6 eV and 285.6 eV , and the N 1s peaks at 399.1 eV and 400.6 eV. Raman spectra show that the structure of the implanted films (CNX) becomes more amorphous as the two broad peaks at 1577 cm-1 (G line) and 1350 cm-1 (D line) observed in the a-C films disappear and a broad asymmetric peak around 1500 cm-1 is formed. The interfacial tension between the a-C films and the substrate , obtained from the contact angle measurements, decreased by more than half after nitrogen implantation.
Graduate School of Engineering, Dept. of Electrical and Computer Engineering. Thesis (Ph. D.)--No... more Graduate School of Engineering, Dept. of Electrical and Computer Engineering. Thesis (Ph. D.)--Northeastern University, 1998. Includes bibliographical references (leaves 118-128).
IEEE Conference Record - Abstracts. 1996 IEEE International Conference on Plasma Science, 2000
ABSTRACT Summary form only given, as follows. The anodic vacuum are was used to deposit thin carb... more ABSTRACT Summary form only given, as follows. The anodic vacuum are was used to deposit thin carbon films (a-C) on Si substrates. The arc produces a partially ionized carbon vapor plasma (less than 20% ionized) and is sustained by a consumable anode. Films with thickness around 0.8-1.7 μm were deposited with a deposition rate of 0.5 μm/min. The a-C films were modified by nitrogen plasma immersion ion implantation (PIII). The effects of nitrogen implantation on the structure and characteristics of the a-C films were investigated by X-ray photoelectron spectroscopy (XPS), Raman spectroscopy, and surface energy calculations from the contact angle measurements. XPS C 1s and N 1s spectra suggest a possible formation of covalent carbon-nitrogen bonds. The a-C films Raman spectra have a G band at 1577 cm-1 and a D band at 1350 cm-l, while the implanted films show a broad asymmetric peak around 1500 cm-1. Surface energy analysis indicates that the nitrogen implanted films have lower interfacial tension with the silicon substrate
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