This paper presents a systematic methodology for the optimal design of wireless power transfer (W... more This paper presents a systematic methodology for the optimal design of wireless power transfer (WPT) systems. To design a WPT for a specific application, the values of coil geometric parameters and the number of resonators should be chosen such that an objective function is maximized while satisfying all the design constraints. The conventional methodologies, which are based on cyclic coordinate optimization, are not comprehensive and efficient methods. This paper presents a design methodology based on the genetic algorithm (GA). The optimization method has been applied to designing different WPTs with series and parallel connections of load and different design constraints. Moreover, the number of resonators is considered as the design parameters. In addition, WPTs with parallel and series connections of load are compared from different aspects. The results of calculation, simulation and measurements demonstrate that the 2-coil WPT can be optimized to achieve maximum efficiency com...
PurposeThis paper aims to propose a novel integrated control method (ICM) for high-power-density ... more PurposeThis paper aims to propose a novel integrated control method (ICM) for high-power-density non-inverting interleaved buck-boost DC-DC converter. To achieve high power conversion by conventional single phase DC-DC converter, inductor value must be increased. This converter is not suitable for industrial and high-power applications as large inductor value will increase the inductor current ripple. Thus, two-phase non-inverting interleaved buck-boost DC-DC converter is proposed.Design/methodology/approachThe proposed ICM approach is based on the theory of integrated dynamic modeling of continuous conduction mode (CCM), discontinuous conduction mode and synchronizing parallel operation mode. In addition, it involves the output voltage controller with inner current loop (inductor current controller) to make a fair balancing between two stages. To ensure fast transient performance, proposed digital ICM is implemented based on a TMS320F28335 digital signal microprocessor.FindingsThe ...
Regarding the spin field effect transistor (spin FET) challenges such as mismatch effect in spin ... more Regarding the spin field effect transistor (spin FET) challenges such as mismatch effect in spin injection and insufficient spin life time, we propose a silicene based device which can be a promising candidate to overcome some of those problems. Using non-equilibrium Green's function method, we investigate the spin-dependent conductance in a zigzag silicene nanoribbon connected to two magnetized leads which are supposed to be either in parallel or anti-parallel configurations. For both configurations, a controllable spin current can be obtained when the Rashba effect is present; thus, we can have a spin filter device. In addition, for anti-parallel configuration, in the absence of Rashba effect, there is an intrinsic energy gap in the system (OFF-state); while, in the presence of Rashba effect, electrons with flipped spin can pass through the channel and make the ON-state. The current voltage (I-V) characteristics which can be tuned by changing the gate voltage or Rashba strength, are studied. More importantly, reducing the mismatch conductivity as well as energy consumption make the silicene based spin FET more efficient relative to the spin FET based on two-dimensional electron gas proposed by Datta and Das. Also, we show that, at the same conditions, the current and [Formula: see text] ratio of silicene based spin FET are significantly greater than that of the graphene based one.
2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, 2010
ABSTRACT In this paper a low swing driver-receiver pair (lhos-lp) for driving signals is proposed... more ABSTRACT In this paper a low swing driver-receiver pair (lhos-lp) for driving signals is proposed to optimize the energy dissipation and delay of global interconnect lines. The simulation, performed based on 1V 0.13μm CMOS technology with HSPICE, for signal transmission along a wire- length of 10 mm. The simulation results show lhos-lp is 18% and 14% better than other similar signaling schemes (lhos-db and lhos-lhos) and consumes 17% lower energy than lhos-lhos and it has similar energy consumption respect to lhos-lp. Also this circuit performs 28% and 20% better than lhos-lhos and lhos-db in a point of energy delay product.
In this paper a new high-linear CMOS mixer is proposed. A well-known low voltage CMOS multiplier ... more In this paper a new high-linear CMOS mixer is proposed. A well-known low voltage CMOS multiplier structure is used for mixer application in this paper and its linearity is provided by adjusting the value of a resistor, sizing the aspect ratio of a PMOS transistor and adding a proper value of inductor at the input stage. In simulation, a supply voltage as low as 1 V is applied to the circuit. Simulation results of improved mixer in a 0.18-μm CMOS technology illustrate 14 dB increases in IIP3 and also an increase around 1.4 dB is obtained in conversion gain. Furthermore, additional components which are used for improving linearity would not increase the power consumption and area significantly.
This paper presents a systematic methodology for the optimal design of wireless power transfer (W... more This paper presents a systematic methodology for the optimal design of wireless power transfer (WPT) systems. To design a WPT for a specific application, the values of coil geometric parameters and the number of resonators should be chosen such that an objective function is maximized while satisfying all the design constraints. The conventional methodologies, which are based on cyclic coordinate optimization, are not comprehensive and efficient methods. This paper presents a design methodology based on the genetic algorithm (GA). The optimization method has been applied to designing different WPTs with series and parallel connections of load and different design constraints. Moreover, the number of resonators is considered as the design parameters. In addition, WPTs with parallel and series connections of load are compared from different aspects. The results of calculation, simulation and measurements demonstrate that the 2-coil WPT can be optimized to achieve maximum efficiency com...
PurposeThis paper aims to propose a novel integrated control method (ICM) for high-power-density ... more PurposeThis paper aims to propose a novel integrated control method (ICM) for high-power-density non-inverting interleaved buck-boost DC-DC converter. To achieve high power conversion by conventional single phase DC-DC converter, inductor value must be increased. This converter is not suitable for industrial and high-power applications as large inductor value will increase the inductor current ripple. Thus, two-phase non-inverting interleaved buck-boost DC-DC converter is proposed.Design/methodology/approachThe proposed ICM approach is based on the theory of integrated dynamic modeling of continuous conduction mode (CCM), discontinuous conduction mode and synchronizing parallel operation mode. In addition, it involves the output voltage controller with inner current loop (inductor current controller) to make a fair balancing between two stages. To ensure fast transient performance, proposed digital ICM is implemented based on a TMS320F28335 digital signal microprocessor.FindingsThe ...
Regarding the spin field effect transistor (spin FET) challenges such as mismatch effect in spin ... more Regarding the spin field effect transistor (spin FET) challenges such as mismatch effect in spin injection and insufficient spin life time, we propose a silicene based device which can be a promising candidate to overcome some of those problems. Using non-equilibrium Green's function method, we investigate the spin-dependent conductance in a zigzag silicene nanoribbon connected to two magnetized leads which are supposed to be either in parallel or anti-parallel configurations. For both configurations, a controllable spin current can be obtained when the Rashba effect is present; thus, we can have a spin filter device. In addition, for anti-parallel configuration, in the absence of Rashba effect, there is an intrinsic energy gap in the system (OFF-state); while, in the presence of Rashba effect, electrons with flipped spin can pass through the channel and make the ON-state. The current voltage (I-V) characteristics which can be tuned by changing the gate voltage or Rashba strength, are studied. More importantly, reducing the mismatch conductivity as well as energy consumption make the silicene based spin FET more efficient relative to the spin FET based on two-dimensional electron gas proposed by Datta and Das. Also, we show that, at the same conditions, the current and [Formula: see text] ratio of silicene based spin FET are significantly greater than that of the graphene based one.
2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, 2010
ABSTRACT In this paper a low swing driver-receiver pair (lhos-lp) for driving signals is proposed... more ABSTRACT In this paper a low swing driver-receiver pair (lhos-lp) for driving signals is proposed to optimize the energy dissipation and delay of global interconnect lines. The simulation, performed based on 1V 0.13μm CMOS technology with HSPICE, for signal transmission along a wire- length of 10 mm. The simulation results show lhos-lp is 18% and 14% better than other similar signaling schemes (lhos-db and lhos-lhos) and consumes 17% lower energy than lhos-lhos and it has similar energy consumption respect to lhos-lp. Also this circuit performs 28% and 20% better than lhos-lhos and lhos-db in a point of energy delay product.
In this paper a new high-linear CMOS mixer is proposed. A well-known low voltage CMOS multiplier ... more In this paper a new high-linear CMOS mixer is proposed. A well-known low voltage CMOS multiplier structure is used for mixer application in this paper and its linearity is provided by adjusting the value of a resistor, sizing the aspect ratio of a PMOS transistor and adding a proper value of inductor at the input stage. In simulation, a supply voltage as low as 1 V is applied to the circuit. Simulation results of improved mixer in a 0.18-μm CMOS technology illustrate 14 dB increases in IIP3 and also an increase around 1.4 dB is obtained in conversion gain. Furthermore, additional components which are used for improving linearity would not increase the power consumption and area significantly.
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Papers by A. Abrishamifar