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ORCID31st Asian Test Symposium 2022: Taichung City, Taiwan
- IEEE 31st Asian Test Symposium, ATS 2022, Taichung City, Taiwan, November 21-24, 2022. IEEE 2022, ISBN 978-1-6654-7227-2
- Jin-Fu Li, Jing-Jia Liou:
Foreword: ATS 2022. x - Aibin Yan, Liang Ding, Zhen Zhou, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen:
A Radiation-Hardened Non-Volatile Magnetic Latch with High Reliability and Persistent Storage. 1-6 - Weidong Zhu, Jianhui Jiang, Zhanhui Shi
:
Locating Critical-Reliability Gates for Sequential Circuits based on the Time Window Graph Model. 7-12 - Shyue-Kung Lu, Zhi-Jia Liu, Masaki Hashizume:
Fault Securing Techniques for Yield and Reliability Enhancement of RRAM. 13-18 - Huixian Huang, Xiaole Cui, Shuming Zhang, Ge Li, Xiaoxin Cui:
An obfuscation scheme of scan chain to protect the cryptographic chips. 19-24 - Shih-Chun Yeh, Kuen-Jong Lee, Dong-Yi Chen:
An Authentication-Based Secure IJTAG Network. 25-30 - Gaurav Kumar, Anjum Riaz, Yamuna Prasad, Satyadev Ahlawat:
A New Access Protocol for Elevating the Security of IJTAG Network. 31-36 - Keno Sato, Takayuki Nakatani, Shogo Katayama, Daisuke Iimori, Gaku Ogihara, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Yujie Zhao, Kentaroh Katoh, Anna Kuwana, Kazumi Hatayama, Haruo Kobayashi:
High Precision Voltage Measurement System Utilizing Low-End ATE Resource and BOST. 37-42 - Ankush Mamgain, Salvador Mir, Jai Narayan Tripathi, Manuel J. Barragán:
On-chip calibration for high-speed harmonic cancellation-based sinusoidal signal generators. 43-48 - Masao Ohmatsu, Yuto Ohtera, Yuki Ikiri, Hiroyuki Yotsuyanagi, Shyue-Kung Lu, Masaki Hashizume:
Enhanced Interconnect Test Method for Resistive Open Defects in Final Tests with Relaxation Oscillators. 49-53 - Kuan-Hsun Duh, Cheng-Wen Wu, Ming-Der Shieh, Chao-Hsun Chen, Ming-Yan Fan:
Aging Impact of Power MOSFETs in Charger with Different Operation Frequency. 54-59 - Takaaki Kato, Yousuke Miyake, Seiji Kajihara:
On Correction of A Delay Value Using Ring-Oscillators for Aging Detection and Prediction. 60-65 - Yu-You Chou, Cheng-Wen Wu, Ming-Der Shieh, Chao-Hsun Chen:
Battery Pack Reliability and Endurance Enhancement for Electric Vehicles by Dynamic Reconfiguration. 66-71 - Utsav Jana, Sourav Banerjee, Binod Kumar, Madhu B, Shankar Umapathi, Masahiro Fujita:
Deep Learning-assisted Scan Chain Diagnosis with Different Fault Models during Manufacturing Test. 72-77 - Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich:
Online Periodic Test of Reconfigurable Scan Networks. 78-83 - Nikolaos Ioannis Deligiannis, Tobias Faller, Josie E. Rodriguez Condia, Riccardo Cantoro, Bernd Becker, Matteo Sonza Reorda:
Using Formal Methods to Support the Development of STLs for GPUs. 84-89 - Sying-Jyan Wang, Katherine Shu-Min Li, Chen-Yeh Lin, Song-Kong Chong:
Intrusion Detection and Obfuscation Mechanism for PUF-Based Authentication. 90-95 - Xiaofan Nie, Liwei Chen, Gang Shi:
PointerChecker: Tag-Based and Hardware-Assisted Memory Safety against Memory Corruption. 96-101 - Troya Çagil Köylü, Moritz Fieback, Said Hamdioui, Mottaqiallah Taouil:
Using Hopfield Networks to Correct Instruction Faults. 102-107 - Irith Pomeranz:
Two-Dimensional Test Generation Objective. 108-113 - Irith Pomeranz:
Selecting Path Delay Faults Through the Largest Subcircuits of Uncovered Lines. 114-119 - Hari Addepalli, Irith Pomeranz, M. Enamul Amyeen, Suriyaprakash Natarajan, Arani Sinha, Srikanth Venkataraman:
Using Fault Detection Tests to Produce Diagnostic Tests Targeting Large Sets of Candidate Faults. 120-125 - Aditi, Michael S. Hsiao:
Hybrid Rule-based and Machine Learning System for Assertion Generation from Natural Language Specifications. 126-131 - Wan Ju Huang, Hsiao-Wen Fu, Tsung-Chu Huang:
AN-HRNS: AN-Coded Hierarchical Residue Number System for Reliable Neural Network Accelerators. 132-137 - Hao Huang, Haihua Shen, Shan Li, Huawei Li:
A Hardware Trojan Trigger Localization Method in RTL based on Control Flow Features. 138-143 - Zih-Ming Huang, Dun-An Yang, Jing-Jia Liou, Harry H. Chen:
FPGA-Based Emulation for Accelerating Transient Fault Reduction Analysis. 144-149 - Tong-Yu Hsieh, Pao-Wei Tsui, Jun-Tsung Wu:
On No-Reference Error Detection of an Image Stitching System Based on Error-Tolerance. 150-155 - Irith Pomeranz:
Usable Circuits with Imperfect Scan Logic. 156-161
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