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2020 – today
- 2024
[j7]Pengbo Yu
, Flavio Ponzina, Alexandre Levisse, Mohit Gupta, Dwaipayan Biswas, Giovanni Ansaloni, David Atienza, Francky Catthoor:
An Energy Efficient Soft SIMD Microarchitecture and Its Application on Quantized CNNs. IEEE Trans. Very Large Scale Integr. Syst. 32(6): 1018-1031 (2024)- [c8]Matilda Gaddi, Flavio Ponzina, Fatemeh Asgarinejad, Baris Aksanli, Tajana Rosing:
HyperECG: ECG Signal Inference From Radar With Hyperdimensional Computing. BIBE 2024: 1-5 - [c7]Amirhossein Shahbazinia, Flavio Ponzina, Jose Angel Miranda, Jonathan Dan, Giovanni Ansaloni, David Atienza:
Resource-Efficient Continual Learning for Personalized Online Seizure Detection. EMBC 2024: 1-7 - [c6]Flavio Ponzina, Rishikanth Chandrasekaran, Anya Wang, Seiji Minowada, Siddharth Sharma, Tajana Rosing:
Multi-Model Inference Composition of Hyperdimensional Computing Ensembles. ICCD 2024: 691-698 - [c5]Pengbo Yu, Flavio Ponzina, Alexandre Levisse, Dwaipayan Biswas, Giovanni Ansaloni, David Atienza, Francky Catthoor:
DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD. ISVLSI 2024: 204-209 - [i5]Corey Lammie, Flavio Ponzina, Yuxuan Wang, Joshua Alexander Harrison Klein, Marina Zapater, Irem Boybat, Abu Sebastian, Giovanni Ansaloni, David Atienza:
LionHeart: A Layer-based Mapping Framework for Heterogeneous Systems with Analog In-Memory Computing Tiles. CoRR abs/2401.09420 (2024) - [i4]Flavio Ponzina, Tajana Rosing:
MicroHD: An Accuracy-Driven Optimization of Hyperdimensional Computing Algorithms for TinyML systems. CoRR abs/2404.00039 (2024) - [i3]Le Zhang, Onat Güngör, Flavio Ponzina, Tajana Rosing:
E-QUARTIC: Energy Efficient Edge Ensemble of Convolutional Neural Networks for Resource-Optimized Learning. CoRR abs/2409.08369 (2024) - [i2]Keming Fan, Ashkan Moradifirouzabadi, Xiangjin Wu, Zheyu Li, Flavio Ponzina, Anton Persson, Eric Pop, Tajana Rosing, Mingu Kang:
SpecPCM: A Low-power PCM-based In-Memory Computing Accelerator for Full-stack Mass Spectrometry Analysis. CoRR abs/2411.09760 (2024) - 2023
- [j6]Silvio Zanoli, Flavio Ponzina, Tomás Teijeiro, Alexandre Levisse, David Atienza:
An Error-Based Approximation Sensing Circuit for Event-Triggered Low-Power Wearable Sensors. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(2): 489-501 (2023) - [j5]Flavio Ponzina, Marco Rios, Alexandre Levisse, Giovanni Ansaloni, David Atienza:
Overflow-free Compute Memories for Edge AI Acceleration. ACM Trans. Embed. Comput. Syst. 22(5s): 121:1-121:23 (2023) - [j4]Marco Rios, Flavio Ponzina, Alexandre Levisse, Giovanni Ansaloni, David Atienza:
Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference. IEEE Trans. Emerg. Top. Comput. 11(2): 358-372 (2023) - 2022
- [j3]Flavio Ponzina, Simone Machetti, Marco Rios, Benoît Walter Denkinger, Alexandre Levisse, Giovanni Ansaloni, Miguel Peón Quirós, David Atienza:
A Hardware/Software Co-Design Vision for Deep Learning at the Edge. IEEE Micro 42(6): 48-54 (2022) - [c4]Flavio Ponzina, Miguel Peón Quirós, Giovanni Ansaloni, David Atienza:
An Accuracy-Driven Compression Methodology to Derive Efficient Codebook-Based CNNs. COINS 2022: 1-6 - [c3]Marco Rios, Flavio Ponzina, Giovanni Ansaloni, Alexandre Levisse, David Atienza:
Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge. ACM Great Lakes Symposium on VLSI 2022: 249-254 - [i1]Marco Rios, Flavio Ponzina, Alexandre Levisse, Giovanni Ansaloni, David Atienza:
Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference. CoRR abs/2209.06108 (2022) - 2021
- [j2]Flavio Ponzina, Miguel Peón Quirós, Andreas Burg, David Atienza:
E2CNNs: Ensembles of Convolutional Neural Networks to Improve Robustness Against Memory Errors in Edge-Computing Devices. IEEE Trans. Computers 70(8): 1199-1212 (2021) - [c2]Marco Rios, Flavio Ponzina, Giovanni Ansaloni, Alexandre Levisse, David Atienza:
Running Efficiently CNNs on the Edge Thanks to Hybrid SRAM-RRAM In-Memory Computing. DATE 2021: 1881-1886 - [c1]Flavio Ponzina, Marco Rios, Giovanni Ansaloni, Alexandre Levisse, David Atienza:
A Flexible In-Memory Computing Architecture for Heterogeneously Quantized CNNs. ISVLSI 2021: 164-169 - 2020
- [j1]Benoît W. Denkinger, Flavio Ponzina, Soumya Basu, Andrea Bonetti, Szabolcs Balási, Martino Ruggiero, Miguel Peón Quirós, Davide Rossi, Andreas Burg, David Atienza:
Impact of Memory Voltage Scaling on Accuracy and Resilience of Deep Learning Based Edge Devices. IEEE Des. Test 37(2): 84-92 (2020)
Coauthor Index
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