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2020 – today
- 2024
[j12]Jonghyun Kim
, Hyungil Chae:
A 10-Gb/s True Random Number Generator Using ML-Resistant Middle Square Method. IEEE J. Solid State Circuits 59(7): 2321-2329 (2024)- [j11]Dongsik Lee, Seungjun Lee, Hyungil Chae:
A 150-MS/s, 65-dB SNDR Fully Passive Bandpass Noise-Shaping SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1067-1071 (2024) - [c5]Seungjun Song, Dongsik Lee, Hyungil Chae:
A 50MHz-BW 168.8dB-FoM 2x Time-Interleaved Bandpass Noise Shaping SAR ADC Using Passive Filter. CICC 2024: 1-2 - 2023
- [j10]Sujin Park, Hyungil Chae, SeongHwan Cho:
A 3.68 aFrms Resolution Continuous-Time Bandpass Δ Σ Capacitance-to-Digital Converter for Full-CMOS Sensors in 0.18 μm CMOS. IEEE J. Solid State Circuits 58(6): 1657-1666 (2023) - [j9]Jihyun Baek, Hyungil Chae:
A 600-MS/s, 65-dB SNDR, 75-MHz BW Time-Interleaved Noise-Shaping SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs 70(7): 2315-2319 (2023) - 2021
- [j8]Jae Sik Yoon, Jiyoon Hong, Hyungil Chae, Jintae Kim:
A 74-dB Dynamic-Range 625-kHz Bandwidth Second-Order Noise-Shaping SAR ADC Utilizing a Temperature-Compensated Dynamic Amplifier and a Digital Mismatch Calibration. IEEE Access 9: 39597-39607 (2021) - [j7]Sein Oh, Younggyun Oh, Juyong Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, Hyungil Chae:
An 85 dB DR 4 MHz BW Pipelined Noise-Shaping SAR ADC With 1-2 MASH Structure. IEEE J. Solid State Circuits 56(11): 3424-3433 (2021) - [j6]Seungjun Lee, Joohwan Jin, Jihyun Baek, Juyong Lee, Hyungil Chae:
Readout Integrated Circuit for Small-Sized and Low-Power Gas Sensor Based on HEMT Device. Sensors 21(16): 5637 (2021) - [c4]Sujin Park, Hyungil Chae, SeongHwan Cho:
A 3.68aFrms Resolution 183dB FoMs 4th-order Continuous-Time Bandpass ∆Σ Capacitance-to-Digital Converter in 0.18µm CMOS. VLSI Circuits 2021: 1-2 - 2020
- [j5]Juyoung Lee, Younggyun Oh, Sein Oh, Hyungil Chae:
Low Power CMOS-Based Hall Sensor with Simple Structure Using Double-Sampling Delta-Sigma ADC. Sensors 20(18): 5285 (2020) - [c3]Michael P. Flynn, Jaehun Jeong, Sunmin Jang, Hyungil Chae, Daniel Weyer, Rundao Lu, John Bell:
Continuous-Time Bandpass Delta-Sigma Modulators and Bitstream Processing: (Invited). CICC 2020: 1-8 - [c2]Sein Oh, Younggyun Oh, Juyoung Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, Hyungil Chae:
A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1-2 MASH structure. CICC 2020: 1-4
2010 – 2019
- 2019
- [j4]Sein Oh, Dong-young Hwang, Hyungil Chae:
4-Contact structure of vertical-type CMOS Hall device for 3-D magnetic sensor. IEICE Electron. Express 16(4): 20180854 (2019) - 2017
- [j3]Hyungil Chae:
Double-sampling highpass delta-sigma modulator with inherent frequency translation. IEICE Electron. Express 14(20): 20170862 (2017) - 2016
- [j2]Hyungil Chae, Michael P. Flynn:
A 69 dB SNDR, 25 MHz BW, 800 MS/s Continuous-Time Bandpass ΔΣ Modulator Using a Duty-Cycle-Controlled DAC for Low Power and Reconfigurability. IEEE J. Solid State Circuits 51(3): 649-659 (2016) - 2014
- [j1]Hyungil Chae, Jaehun Jeong, Gabriele Manganaro, Michael P. Flynn:
A 12 mW Low Power Continuous-Time Bandpass ΔΣ Modulator With 58 dB SNDR and 24 MHz Bandwidth at 200 MHz IF. IEEE J. Solid State Circuits 49(2): 405-415 (2014) - 2012
- [c1]Hyungil Chae, Jaehun Jeong, Gabriele Manganaro, Michael P. Flynn:
A 12mW low-power continuous-time bandpass ΔΣ modulator with 58dB SNDR and 24MHz bandwidth at 200MHz IF. ISSCC 2012: 148-150
Coauthor Index
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last updated on 2024-07-20 20:31 CEST by the dblp team
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