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2020 – today
- 2023
[j11]Zhiqiang Que
, Hiroki Nakahara, Hongxiang Fan, He Li, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Eriko Nurvitadhi, Wayne Luk:
Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 16(1): 4:1-4:26 (2023)- 2022
- [j10]Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Andrew Boutros, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk:
Recurrent Neural Networks With Column-Wise Matrix-Vector Multiplication on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 227-237 (2022) - 2020
- [c34]Zhiqiang Que, Hiroki Nakahara, Hongxiang Fan, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Eriko Nurvitadhi, Wayne Luk:
A Reconfigurable Multithreaded Accelerator for Recurrent Neural Networks. FPT 2020: 20-28 - [c33]Ruizhe Zhao, Wayne Luk, Chao Xiong, Xinyu Niu, Kuen Hung Tsoi:
On the challenges in programming mixed-precision deep neural networks. MAPL@PLDI 2020: 20-28
2010 – 2019
- 2018
- [c32]Di Wu, Zhanrui Sun, Yongxin Zhu, Li Tian, Hanlin Zhu, Peng Xiong, Zihao Cao, Menglin Wang, Yu Zheng, Chao Xiong, Hao Jiang, Kuen Hung Tsoi, Xinyu Niu, Wei Mao, Can Feng, Xiaowen Zha, Guobao Deng, Wayne Luk:
Custom machine learning architectures: towards realtime anomaly detection for flight testing. IPDPS Workshops 2018: 1323-1330 - [c31]Jiajun Gao, Yongxin Zhu, Meikang Qiu, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk, Ruizhe Zhao, Zhiqiang Que, Wei Mao, Can Feng, Xiaowen Zha, Guobao Deng, Jiayi Chen, Tao Liu:
Reconfigurable Hardware Generation for Tensor Flow Models of CNN Algorithms on a Heterogeneous Acceleration Platform. SmartCom 2018: 87-96 - [c30]Hanlin Zhu, Yongxin Zhu, Di Wu, Hui Wang, Li Tian, Wei Mao, Can Feng, Xiaowen Zha, Guobao Deng, Jiayi Chen, Tao Liu, Xinyu Niu, Kuen Hung Tsoi, Wayne Luk:
Correlation Coefficient Based Cluster Data Preprocessing and LSTM Prediction Model for Time Series Data in Large Aircraft Test Flights. SmartCom 2018: 376-385 - 2016
- [j9]Assem A. M. Bsoul, Steven J. E. Wilton, Kuen Hung Tsoi, Wayne Luk:
An FPGA Architecture and CAD Flow Supporting Dynamically Controlled Power Gating. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 178-191 (2016) - 2013
- [j8]Yuet Ming Lam, Kuen Hung Tsoi, Wayne Luk:
Parallel neighbourhood search on many-core platforms. Int. J. Comput. Sci. Eng. 8(3): 281-293 (2013) - [j7]Ka-Wai Kwok, Kuen Hung Tsoi, Valentina Vitiello, James Clark, Gary C. T. Chow, Wayne Luk, Guang-Zhong Yang:
Dimensionality Reduction in Controlling Articulated Snake Robot for Endoscopy Under Dynamic Active Constraints. IEEE Trans. Robotics 29(1): 15-31 (2013) - [c29]James Arram, Kuen Hung Tsoi, Wayne Luk, Peiyong Jiang:
Hardware Acceleration of Genetic Sequence Alignment. ARC 2013: 13-24 - [c28]James Arram, Kuen Hung Tsoi, Wayne Luk, Peiyong Jiang:
Reconfigurable Acceleration of Short Read Mapping. FCCM 2013: 210-217 - [c27]Thomas C. P. Chau, Ka-Wai Kwok, Gary C. T. Chow, Kuen Hung Tsoi, Kit-Hang Lee, Zion Tse, Peter Y. K. Cheung, Wayne Luk:
Acceleration of real-time Proximity Query for dynamic active constraints. FPT 2013: 206-213 - 2012
- [j6]Nicholas Ng, Nobuko Yoshida, Xinyu Niu, Kuen Hung Tsoi:
Session types: towards safe and fast reconfigurable programming. SIGARCH Comput. Archit. News 40(5): 22-27 (2012) - [j5]Kuen Hung Tsoi, Tobias Becker, Wayne Luk:
Modelling reconfigurable systems in event driven simulation. SIGARCH Comput. Archit. News 40(5): 34-39 (2012) - [c26]Stewart Denholm, Kuen Hung Tsoi, Peter R. Pietzuch, Wayne Luk:
Efficient Communication for FPGA Clusters. ARC 2012: 335-341 - [c25]Yi Shan, Zilong Wang, Wenqiang Wang, Yuchen Hao, Yu Wang, Kuen Hung Tsoi, Wayne Luk, Huazhong Yang:
FPGA based memory efficient high resolution stereo vision system for video tolling. FPT 2012: 29-32 - [c24]Xinyu Niu, Kuen Hung Tsoi, Wayne Luk:
Self-Adaptive Heterogeneous Cluster with Wireless Network. IPDPS Workshops 2012: 306-311 - 2011
- [j4]Kuen Hung Tsoi, Wayne Luk:
Power profiling and optimization for heterogeneous multi-core systems. SIGARCH Comput. Archit. News 39(4): 8-13 (2011) - [c23]Yoshiki Yamaguchi, Kuen Hung Tsoi, Wayne Luk:
FPGA-Based Smith-Waterman Algorithm: Analysis and Novel Design. ARC 2011: 181-192 - [c22]Stewart Denholm, Kuen Hung Tsoi, Peter R. Pietzuch, Wayne Luk:
CusComNet: A customisable network for reconfigurable heterogeneous clusters. ASAP 2011: 9-16 - [c21]Yoshiki Yamaguchi, Kuen Hung Tsoi, Wayne Luk:
A comparison of FPGAs, GPUS and CPUS for Smith-Waterman algorithm (abstract only). FPGA 2011: 281 - [c20]Xinyu Niu, Kuen Hung Tsoi, Wayne Luk:
Reconfiguring Distributed Applications in FPGA Accelerated Cluster with Wireless Networking. FPL 2011: 545-550 - 2010
- [j3]Anson H. T. Tse, David B. Thomas, Kuen Hung Tsoi, Wayne Luk:
Efficient reconfigurable design for pricing asian options. SIGARCH Comput. Archit. News 38(4): 14-20 (2010) - [j2]Kuen Hung Tsoi, Anson H. T. Tse, Peter R. Pietzuch, Wayne Luk:
Programming framework for clusters with heterogeneous accelerators. SIGARCH Comput. Archit. News 38(4): 53-59 (2010) - [c19]Kuen Hung Tsoi, Wayne Luk:
Axel: a heterogeneous cluster with FPGAs and GPUs. FPGA 2010: 115-124 - [c18]Anson H. T. Tse, David B. Thomas, Kuen Hung Tsoi, Wayne Luk:
Reconfigurable Control Variate Monte-Carlo Designs for Pricing Exotic Options. FPL 2010: 364-367 - [c17]Anson H. T. Tse, David B. Thomas, Kuen Hung Tsoi, Wayne Luk:
Dynamic scheduling Monte-Carlo framework for multi-accelerator heterogeneous clusters. FPT 2010: 233-240 - [c16]Vinay Sriram, David D. Cox, Kuen Hung Tsoi, Wayne Luk:
Towards an embedded biologically-inspired machine vision processor. FPT 2010: 273-278 - [c15]Qiang Liu, Tim Todman, Kuen Hung Tsoi, Wayne Luk:
Convex models for accelerating applications on FPGA-based clusters. FPT 2010: 495-498
2000 – 2009
- 2008
- [c14]Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, Bill S. H. Kwan, Chris C. C. Cheung, Anthony P. C. Chan, Philip Heng Wai Leong:
Map-reduce as a Programming Model for Custom Computing Machines. FCCM 2008: 149-159 - 2007
- [b1]Kuen Hung Tsoi:
A flexible arithmetic system for simulation. Chinese University of Hong Kong, Hong Kong, 2007 - [j1]Kuen Hung Tsoi, Ka Hei Leung, Philip Heng Wai Leong:
High performance physical random number generator. IET Comput. Digit. Tech. 1(4): 349-352 (2007) - 2005
- [c13]Kuen Hung Tsoi, Philip Heng Wai Leong:
Mullet - A Parallel Multiplier Generator. FPL 2005: 691-694 - [c12]Kuen Hung Tsoi:
Computer Arithmetic Synthesis Technologies on Reconfigurable Platforms. FPL 2005: 713-714 - [c11]Guanglie Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, Chris C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk:
Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. FPT 2005: 215-222 - [c10]Philip Heng Wai Leong, Kuen Hung Tsoi:
Field programmable gate array technology for robotics applications. ROBIO 2005: 295-298 - 2004
- [c9]Kuen Hung Tsoi, Chun Hok Ho, Jackson H. C. Yeung, Philip Heng Wai Leong:
An Arithmetic Library and Its Application to the N-body Problem. FCCM 2004: 68-78 - [c8]Ralf Ludewig, Oliver Soffke, Peter Zipf, Manfred Glesner, Kong-Pang Pun, Kuen Hung Tsoi, Kin-Hong Lee, Philip Heng Wai Leong:
IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter. FPL 2004: 526-535 - 2003
- [c7]Kuen Hung Tsoi, Ka Hei Leung, Philip Heng Wai Leong:
Compact FPGA-based True and Pseudo Random Number Generators. FCCM 2003: 51-61 - [c6]Chun Hok Ho, Kuen Hung Tsoi, Jackson H. C. Yeung, Yuet Ming Lam, Kin-Hong Lee, Philip Heng Wai Leong, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner:
Arbitrary function approximation in HDLs with application to the N-body problem. FPT 2003: 84-91 - [c5]Ray C. C. Cheung, Kong-Pang Pun, Steve C. L. Yuen, Kuen Hung Tsoi, Philip Heng Wai Leong:
An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC. FPT 2003: 110-117 - 2002
- [c4]Kuen Hung Tsoi, Kin-Hong Lee, Philip Heng Wai Leong:
A Massively Parallel RC4 Key Search Engine. FCCM 2002: 13-21 - [c3]Chun Hok Ho, Philip Heng Wai Leong, Kuen Hung Tsoi, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner:
Fly - A Modifiable Hardware Compiler. FPL 2002: 381-390 - 2001
- [c2]Ocean Y. H. Cheung, Kuen Hung Tsoi, Philip Heng Wai Leong, Monk-Ping Leong:
Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm IDEA. CHES 2001: 333-347 - 2000
- [c1]Monk-Ping Leong, Ocean Y. H. Cheung, Kuen Hung Tsoi, Philip Heng Wai Leong:
A Bit-Serial Implementation of the International Data Encryption Algorithm IDEA. FCCM 2000: 122-131
Coauthor Index
aka: Philip Heng Wai Leong
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