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Pejman Lotfi-Kamran
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2020 – today
- 2024
- [c23]Mohammad Bakhshalipour, Hamidreza Zare, Farid Samandi, Fatemeh Golshan, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Blenda: Dynamically-Reconfigurable Stacked DRAM. MICRO 2024: 1323-1337 - 2023
- [j28]Ali Ansari, Fatemeh Golshan, Rahil Barati, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
MANA: Microarchitecting a Temporal Instruction Prefetcher. IEEE Trans. Computers 72(3): 732-743 (2023) - [j27]Paria Darbani, Hakem Beitollahi, Pejman Lotfi-Kamran:
Rei: A Reconfigurable Interconnection Unit for Array-Based CNN Accelerators. IEEE Trans. Emerg. Top. Comput. 11(4): 895-906 (2023) - [c22]Saba Mostofi, Hajar Falahati, Negin Mahani, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Snake: A Variable-length Chain-based Prefetching for GPUs. MICRO 2023: 728-741 - 2022
- [j26]Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Chapter One - Introduction to data prefetching. Adv. Comput. 125: 1-17 (2022) - [j25]Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Chapter Two - Spatial prefetching. Adv. Comput. 125: 19-29 (2022) - [j24]Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Chapter Three - Temporal prefetching. Adv. Comput. 125: 31-41 (2022) - [j23]Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Chapter Four - Beyond spatial or temporal prefetching. Adv. Comput. 125: 43-53 (2022) - [j22]Mehran Shakerinava, Fatemeh Golshan, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Chapter Five - State-of-the-art data prefetchers. Adv. Comput. 125: 55-67 (2022) - [j21]Mehran Shakerinava, Fatemeh Golshan, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Chapter Six - Evaluation of data prefetchers. Adv. Comput. 125: 69-89 (2022) - [j20]Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Preface. Adv. Comput. 125: ix-x (2022) - [j19]Sina Darabi, Ehsan Yousefzadeh-Asl-Miandoab, Negar Akbarzadeh, Hajar Falahati, Pejman Lotfi-Kamran, Mohammad Sadrosadati, Hamid Sarbazi-Azad:
OSM: Off-Chip Shared Memory for GPUs. IEEE Trans. Parallel Distributed Syst. 33(12): 3415-3429 (2022) - [j18]Paria Darbani, Nezam Rohbani, Hakem Beitollahi, Pejman Lotfi-Kamran:
RASHT: A Partially Reconfigurable Architecture for Efficient Implementation of CNNs. IEEE Trans. Very Large Scale Integr. Syst. 30(7): 860-868 (2022) - 2021
- [j17]Hajar Falahati, Masoud Peyro, Hossein Amini, Mehran Taghian, Mohammad Sadrosadati, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Data-Aware Compression of Neural Networks. IEEE Comput. Archit. Lett. 20(2): 94-97 (2021) - [i6]Ali Ansari, Fatemeh Golshan, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
MANA: Microarchitecting an Instruction Prefetcher. CoRR abs/2102.01764 (2021) - 2020
- [j16]Fatemeh Golshan, Mohammad Bakhshalipour, Mehran Shakerinava, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Harnessing Pairwise-Correlating Data Prefetching With Runahead Metadata. IEEE Comput. Archit. Lett. 19(2): 130-133 (2020) - [c21]Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Divide and Conquer Frontend Bottleneck. ISCA 2020: 65-78 - [i5]Mohammad Bakhshalipour, Mehran Shakerinava, Fatemeh Golshan, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
A Survey on Recent Hardware Data Prefetching Approaches with An Emphasis on Servers. CoRR abs/2009.00715 (2020)
2010 – 2019
- 2019
- [j15]Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Code Layout Optimization for Near-Ideal Instruction Cache. IEEE Comput. Archit. Lett. 18(2): 124-127 (2019) - [j14]Mohammad Bakhshalipour, Seyedali Tabaeiaghdaei, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Evaluation of Hardware Data Prefetchers on Server Processors. ACM Comput. Surv. 52(3): 52:1-52:29 (2019) - [j13]Mohammad Bakhshalipour, Aydin Faraji, Seyed Armin Vakil-Ghahani, Farid Samandi, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Reducing Writebacks Through In-Cache Displacement. ACM Trans. Design Autom. Electr. Syst. 24(2): 16:1-16:21 (2019) - [c20]Mohammad Bakhshalipour, Mehran Shakerinava, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Bingo Spatial Data Prefetcher. HPCA 2019: 399-411 - 2018
- [j12]Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Chapter One - Dark Silicon and the History of Computing. Adv. Comput. 110: 1-33 (2018) - [j11]Armin Vakil-Ghahani, Sara Mahdizadeh-Shahri, Mohammad-Reza Lotfi-Namin, Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Cache Replacement Policy Based on Expected Hit Count. IEEE Comput. Archit. Lett. 17(1): 64-67 (2018) - [j10]Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Abbas Mazloumi, Farid Samandi, Mahmood Naderan-Tahan, Mehdi Modarressi, Hamid Sarbazi-Azad:
Fast Data Delivery for Many-Core Processors. IEEE Trans. Computers 67(10): 1416-1429 (2018) - [c19]Amir Yazdanbakhsh, Choungki Song, Jacob Sacks, Pejman Lotfi-Kamran, Hadi Esmaeilzadeh, Nam Sung Kim:
In-DRAM near-data approximate acceleration for GPUs. PACT 2018: 34:1-34:14 - [c18]Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Domino Temporal Data Prefetcher. HPCA 2018: 131-142 - [i4]Pouya Esmaili-Dokht, Mohammad Bakhshalipour, Behnam Khodabandeloo, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Scale-Out Processors & Energy Efficiency. CoRR abs/1808.04864 (2018) - [i3]Seyed Armin Vakil-Ghahani, Sara Mahdizadeh-Shahri, Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Making Belady-Inspired Replacement Policies More Effective Using Expected Hit Count. CoRR abs/1808.05024 (2018) - [i2]Mohammad Bakhshalipour, HamidReza Zare, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Die-Stacked DRAM: Memory, Cache, or MemCache? CoRR abs/1809.08828 (2018) - [i1]Hajar Falahati, Pejman Lotfi-Kamran, Mohammad Sadrosadati, Hamid Sarbazi-Azad:
ORIGAMI: A Heterogeneous Split Architecture for In-Memory Acceleration of Learning. CoRR abs/1812.11473 (2018) - 2017
- [j9]Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
An Efficient Temporal Data Prefetcher for L1 Caches. IEEE Comput. Archit. Lett. 16(2): 99-102 (2017) - [j8]Amir Yazdanbakhsh, Divya Mahajan, Hadi Esmaeilzadeh, Pejman Lotfi-Kamran:
AxBench: A Multiplatform Benchmark Suite for Approximate Computing. IEEE Des. Test 34(2): 60-68 (2017) - [c17]Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad:
Near-Ideal Networks-on-Chip for Servers. HPCA 2017: 277-288 - 2016
- [j7]Seyyed Hossein Seyyedaghaei Rezaei, Abbas Mazloumi, Mehdi Modarressi, Pejman Lotfi-Kamran:
Dynamic Resource Sharing for High-Performance 3-D Networks-on-Chip. IEEE Comput. Archit. Lett. 15(1): 5-8 (2016) - [j6]Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad:
An Efficient Hybrid-Switched Network-on-Chip for Chip Multiprocessors. IEEE Trans. Computers 65(5): 1656-1662 (2016) - 2015
- [j5]Pejman Lotfi-Kamran:
Per-packet global congestion estimation for fast packet delivery in networks-on-chip. J. Supercomput. 71(9): 3419-3439 (2015) - [c16]Amir Yazdanbakhsh, Jongse Park, Hardik Sharma, Pejman Lotfi-Kamran, Hadi Esmaeilzadeh:
Neural acceleration for GPU throughput processors. MICRO 2015: 482-493 - 2013
- [b1]Pejman Lotfi-Kamran:
Scale-Out Processors. EPFL, Switzerland, 2013 - 2012
- [j4]Boris Grot, Damien Hardy, Pejman Lotfi-Kamran, Babak Falsafi, Chrysostomos Nicopoulos, Yiannakis Sazeides:
Optimizing Data-Center TCO with Scale-Out Processors. IEEE Micro 32(5): 52-63 (2012) - [c15]Dragomir Milojevic, Sachin Idgunji, Djordje Jevdjic, Emre Ozer, Pejman Lotfi-Kamran, Andreas Panteli, Andreas Prodromou, Chrysostomos Nicopoulos, Damien Hardy, Babak Falsafi, Yiannakis Sazeides:
Thermal characterization of cloud workloads on a power-efficient server-on-chip. ICCD 2012: 175-182 - [c14]Pejman Lotfi-Kamran, Boris Grot, Michael Ferdman, Stavros Volos, Yusuf Onur Koçberber, Javier Picorel, Almutaz Adileh, Djordje Jevdjic, Sachin Idgunji, Emre Ozer, Babak Falsafi:
Scale-out processors. ISCA 2012: 500-511 - [c13]Pejman Lotfi-Kamran, Boris Grot, Babak Falsafi:
NOC-Out: Microarchitecting a Scale-Out Processor. MICRO 2012: 177-187 - 2011
- [c12]Michael Ferdman, Pejman Lotfi-Kamran, Ken Balet, Babak Falsafi:
Cuckoo directory: A scalable directory for many-core systems. HPCA 2011: 169-180 - [c11]Mohammad Hosseinabady, Pejman Lotfi-Kamran, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan:
Single-Event Transient Analysis in High Speed Circuits. ISED 2011: 112-117 - 2010
- [j3]Pejman Lotfi-Kamran, Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afzali-Kusha, Zainalabedin Navabi:
EDXY - A low cost congestion-aware routing algorithm for network-on-chips. J. Syst. Archit. 56(7): 256-264 (2010) - [c10]Pejman Lotfi-Kamran, Michael Ferdman, Daniel Crisan, Babak Falsafi:
TurboTag: lookup filtering to reduce coherence directory power. ISLPED 2010: 377-382
2000 – 2009
- 2009
- [c9]Amir-Mohammad Rahmani, I. Kamali, Pejman Lotfi-Kamran, Ali Afzali-Kusha, Saeed Safari:
Negative Exponential Distribution Traffic Pattern for Power/Performance Analysis of Network on Chips. VLSI Design 2009: 157-162 - 2008
- [c8]Pejman Lotfi-Kamran, Masoud Daneshtalab, Caro Lucas, Zainalabedin Navabi:
BARP-A Dynamic Routing Protocol for Balanced Distribution of Traffic in NoCs. DATE 2008: 1408-1413 - [c7]Pejman Lotfi-Kamran, Mehran Massoumi, Mohammad Mirzaei, Zainalabedin Navabi:
Enhanced TED: A New Data Structure for RTL Verification. VLSI Design 2008: 481-486 - [c6]Pejman Lotfi-Kamran, Amir-Mohammad Rahmani, Ali-Asghar Salehpour, Ali Afzali-Kusha, Zainalabedin Navabi:
Stall Power Reduction in Pipelined Architecture Processors. VLSI Design 2008: 541-546 - 2007
- [j2]Mohammad Hosseinabady, Pejman Lotfi-Kamran, Fabrizio Lombardi, Zainalabedin Navabi:
Low overhead DFT using CDFG by modifying controller. IET Comput. Digit. Tech. 1(4): 322-333 (2007) - [j1]Mohammad Hosseinabady, Pejman Lotfi-Kamran, Zainalabedin Navabi:
Low test application time resource binding for behavioral synthesis. ACM Trans. Design Autom. Electr. Syst. 12(2): 16 (2007) - [c5]Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Pejman Lotfi-Kamran, Zainalabedin Navabi:
A UML Based System Level Failure Rate Assessment Technique for SoC Designs. VTS 2007: 243-248 - 2006
- [c4]Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto:
Single-Event Upset Analysis and Protection in High Speed Circuits. ETS 2006: 29-34 - 2005
- [c3]Pejman Lotfi-Kamran, Mohammad Hosseinabady, Hamid Shojaei, Mehran Massoumi, Zainalabedin Navabi:
TED+: a data structure for microprocessor verification. ASP-DAC 2005: 567-572 - [c2]Arash Hooshmand, Saeed Shamshiri, Mohammad Alisafaee, Bijan Alizadeh, Pejman Lotfi-Kamran, Mostafa Naderi, Zainalabedin Navabi:
Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams. ISCAS (1) 2005: 424-427 - [c1]Mohammad Hosseinabady, Pejman Lotfi-Kamran, Pedram A. Riahi, Fabrizio Lombardi, Zainalabedin Navabi:
A Flow Graph Technique for DFT Controller Modification. SoCC 2005: 55-60
Coauthor Index
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