research-article

TurboTag: lookup filtering to reduce coherence directory power

Authors:

Pejman Lotfi-Kamran,

Michael Ferdman,

Babak FalsafiAuthors Info & Claims

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

Pages 377 - 382

https://doi.org/10.1145/1840845.1840929

Published: 18 August 2010 Publication History

Abstract

On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary lookups when running commercial server and scientific workloads. These workloads have large working sets that are beyond the reach of on-chip caches of modern processors. Limited to capturing a small part of the working set, private caches retain cache blocks only for a short period of time before replacing them with new blocks. Moreover, coherence enforcement is a known performance bottleneck of multi-threaded software, hence data-sharing in optimized high performance software is minimal. Consequently, the majority of the accesses to the coherence directory find no sharers in the directory because the data are not available in the on-chip private caches, effectively wasting power on the coherence checks. To improve energy-efficiency for future many-core systems, we propose TurboTag, a filtering mechanism to eliminate needless directory lookups. We analyze full-system traces of server and scientific workloads and find that over 69% of accesses to the directory find no sharers and can be entirely avoided. Taking advantage of this behavior, TurboTag achieves a 58% reduction in the directory's dynamic power consumption.

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Cited By

Derebasoglu EKadayif IOzturk O(2022)Coherency Traffic Reduction in Manycore Systems2022 25th Euromicro Conference on Digital System Design (DSD)10.1109/DSD57027.2022.00043(262-267)Online publication date: Aug-2022
https://doi.org/10.1109/DSD57027.2022.00043
Chen CHsia AZhan YLiu T(2018)Energy-efficient hybrid coherence protocol for multicore processorsCluster Computing10.5555/3287988.328800321:3(1521-1541)Online publication date: 1-Sep-2018
https://dl.acm.org/doi/10.5555/3287988.3288003
Chen CHsia AZhan YLiu T(2018)Energy-efficient hybrid coherence protocol for multicore processorsCluster Computing10.1007/s10586-018-1947-z21:3(1521-1541)Online publication date: 16-Feb-2018
https://doi.org/10.1007/s10586-018-1947-z
Show More Cited By

Index Terms

TurboTag: lookup filtering to reduce coherence directory power
1. Computer systems organization
  1. Architectures

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cover image ACM Conferences

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

August 2010

458 pages

ISBN:9781450301466

DOI:10.1145/1840845

General Chairs:
Vojin Oklobdzija
University of Texas, Dallas
,
Barry Pangle
Mentor Graphics
,
Naehyuck Chang
Seoul National University
,
Program Chairs:
Naresh Shanbhag
University of Illinois at Urbana-Champaign
,
Chris H. Kim
University of Minnesota

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 18 August 2010

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ISLPED'10: International Symposium on Low Power Electronics and Design

August 18 - 20, 2010

Texas, Austin, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

Derebasoglu EKadayif IOzturk O(2022)Coherency Traffic Reduction in Manycore Systems2022 25th Euromicro Conference on Digital System Design (DSD)10.1109/DSD57027.2022.00043(262-267)Online publication date: Aug-2022
https://doi.org/10.1109/DSD57027.2022.00043
Chen CHsia AZhan YLiu T(2018)Energy-efficient hybrid coherence protocol for multicore processorsCluster Computing10.5555/3287988.328800321:3(1521-1541)Online publication date: 1-Sep-2018
https://dl.acm.org/doi/10.5555/3287988.3288003
Chen CHsia AZhan YLiu T(2018)Energy-efficient hybrid coherence protocol for multicore processorsCluster Computing10.1007/s10586-018-1947-z21:3(1521-1541)Online publication date: 16-Feb-2018
https://doi.org/10.1007/s10586-018-1947-z
Patsilaras GTuck J(2017)ReDirectACM Transactions on Architecture and Code Optimization10.1145/316201514:4(1-23)Online publication date: 20-Dec-2017
https://dl.acm.org/doi/10.1145/3162015
Arteaga JZuckerman SGao G(2017)Generating Fine-Grain Multithreaded Applications Using a Multigrain ApproachACM Transactions on Architecture and Code Optimization10.1145/315528814:4(1-26)Online publication date: 13-Dec-2017
https://dl.acm.org/doi/10.1145/3155288
Swami SPalangappa PMohanram K(2017)ECSACM Transactions on Architecture and Code Optimization10.1145/315108314:4(1-29)Online publication date: 13-Dec-2017
https://dl.acm.org/doi/10.1145/3151083
Jain RPanda PSubramoney S(2017)Cooperative Multi-Agent Reinforcement Learning-Based Co-optimization of Cores, Caches, and On-chip NetworkACM Transactions on Architecture and Code Optimization10.1145/313217014:4(1-25)Online publication date: 14-Nov-2017
https://dl.acm.org/doi/10.1145/3132170
Lotfi-Kamran PModarressi MSarbazi-Azad H(2017)Near-Ideal Networks-on-Chip for Servers2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2017.16(277-288)Online publication date: Feb-2017
https://doi.org/10.1109/HPCA.2017.16
Menezo LPuente VGregorio J(2017)An adaptive cache coherence protocolJournal of Parallel and Distributed Computing10.1016/j.jpdc.2016.12.020102:C(163-174)Online publication date: 1-Apr-2017
https://dl.acm.org/doi/10.1016/j.jpdc.2016.12.020
Basu APuthoor SChe SBeckmann BJacob B(2016)Software Assisted Hardware Cache Coherence for Heterogeneous ProcessorsProceedings of the Second International Symposium on Memory Systems10.1145/2989081.2989092(279-288)Online publication date: 3-Oct-2016
https://dl.acm.org/doi/10.1145/2989081.2989092
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