Article

RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence

Author:

Andreas MoshovosAuthors Info & Claims

ISCA '05: Proceedings of the 32nd annual international symposium on Computer Architecture

Pages 234 - 245

https://doi.org/10.1109/ISCA.2005.42

Published: 01 May 2005 Publication History

Abstract

It has been shown that many requests miss in all remote nodes in shared memory multiprocessors. We are motivated by the observation that this behavior extends to much coarser grain areas of memory. We define a region to be a continuous, aligned memory area whose size is a power of two and observe that many requests find that no other node caches a block in the same region even for regions as large as 16K bytes. We propose RegionScout, a family of simple filter mechanisms that dynamically detect most non-shared regions. A node with a RegionScout filter can determine in advance that a request will miss in all remote nodes. RegionScout filters are implemented as a layered extension over existing snoop-based coherence systems. They require no changes to existing coherence protocols or caches and impose no constraints on what can be cached simultaneously. Their operation is completely transparent to software and the operating system. RegionScout filters require little additional storage and a single additional global signal. These characteristics are made possible by utilizing imprecise information about the regions cached in each node. Since they rely on dynamically collected information RegionScout filters can adapt to changing sharing patterns. We present two applications of RegionScout: In the first RegionScout is used to avoid broadcasts for non-shared regions thus reducing bandwidth. In the second RegionScout is used to avoid snoop induced tag lookups thus reducing energy.

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RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence

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Published In

cover image ACM Conferences

ISCA '05: Proceedings of the 32nd annual international symposium on Computer Architecture

June 2005

541 pages

ISBN:076952270X

ACM SIGARCH Computer Architecture News Volume 33, Issue 2
ISCA 2005
May 2005
531 pages
ISSN:0163-5964
DOI:10.1145/1080695
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SIGARCH: ACM Special Interest Group on Computer Architecture

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IEEE Computer Society

United States

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Published: 01 May 2005

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ISCA05: The 32nd Annual International Symposium on Computer Architecture 2005

June 4 - 8, 2005

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ISCA '05 Paper Acceptance Rate 45 of 194 submissions, 23%;

Overall Acceptance Rate 543 of 3,203 submissions, 17%

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Cited By

Sakalis CKaxiras SSjälander M(2022)Delay-on-Squash: Stopping Microarchitectural Replay Attacks in Their TracksACM Transactions on Architecture and Code Optimization10.1145/356369520:1(1-24)Online publication date: 17-Nov-2022
https://dl.acm.org/doi/10.1145/3563695
Caheny PAlvarez LValero MMoretó MCasas M(2018)Runtime-assisted cache coherence deactivation in task parallel programsProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.5555/3291656.3291703(1-12)Online publication date: 11-Nov-2018
https://dl.acm.org/doi/10.5555/3291656.3291703
Lin CCho SChang S(2018)An Adaptive Mechanism for Designing Efficient Snoop FiltersIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2018.281024126:7(1233-1240)Online publication date: 1-Jul-2018
https://dl.acm.org/doi/10.1109/TVLSI.2018.2810241
Caheny PAlvarez LValero MMoretó MCasas M(2018)Runtime-assisted cache coherence deactivation in task parallel programsProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.1109/SC.2018.00038(1-12)Online publication date: 11-Nov-2018
https://dl.acm.org/doi/10.1109/SC.2018.00038
Menezo LPuente VGregorio J(2017)An adaptive cache coherence protocolJournal of Parallel and Distributed Computing10.1016/j.jpdc.2016.12.020102:C(163-174)Online publication date: 1-Apr-2017
https://dl.acm.org/doi/10.1016/j.jpdc.2016.12.020
Huang CKumar RElver MGrot BNagarajan VHsu WYang CLipasti MLee H(2016)C3DThe 49th Annual IEEE/ACM International Symposium on Microarchitecture10.5555/3195638.3195681(1-12)Online publication date: 15-Oct-2016
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Chou CJaleel AQureshi MHsu WYang CLipasti MLee H(2016)CANDYThe 49th Annual IEEE/ACM International Symposium on Microarchitecture10.5555/3195638.3195680(1-13)Online publication date: 15-Oct-2016
https://dl.acm.org/doi/10.5555/3195638.3195680
Basu APuthoor SChe SBeckmann BJacob B(2016)Software Assisted Hardware Cache Coherence for Heterogeneous ProcessorsProceedings of the Second International Symposium on Memory Systems10.1145/2989081.2989092(279-288)Online publication date: 3-Oct-2016
https://dl.acm.org/doi/10.1145/2989081.2989092
Alvarez LVilanova LMoreto MCasas MGonzàlez MMartorell XNavarro NAyguadé EValero M(2015)Coherence protocol for transparent management of scratchpad memories in shared memory manycore architecturesACM SIGARCH Computer Architecture News10.1145/2872887.275041143:3S(720-732)Online publication date: 13-Jun-2015
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Alvarez LVilanova LMoreto MCasas MGonzàlez MMartorell XNavarro NAyguadé EValero MMarr DAlbonesi D(2015)Coherence protocol for transparent management of scratchpad memories in shared memory manycore architecturesProceedings of the 42nd Annual International Symposium on Computer Architecture10.1145/2749469.2750411(720-732)Online publication date: 13-Jun-2015
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