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TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors

Published: 12 August 2002 Publication History

Abstract

In our quest to bring down the power consumption in low-power chip-multiprocessors, we have found that TLB and snoop accesses account for about 40% of the energy wasted by all L1 data-cache accesses. We have investigated the prospects of using virtual caches to bring down the number of TLB accesses. A key observation is that while the energy wasted in the TLBs are cut, the energy associated with snoop accesses becomes higher. We then contribute with two techniques to reduce the number of snoop accesses and their energy cost. Virtual caches together with the proposed techniques are shown to reduce the energy wasted in the L1 caches and the TLBs by about 30%.

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  1. TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors

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    cover image ACM Conferences
    ISLPED '02: Proceedings of the 2002 international symposium on Low power electronics and design
    August 2002
    342 pages
    ISBN:1581134754
    DOI:10.1145/566408
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 12 August 2002

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    Author Tags

    1. CMP
    2. low-power
    3. snoop
    4. virtual caches

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    ISLPED02
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    ISLPED02: International Symposium on Power Design and Electronics
    August 12 - 14, 2002
    California, Monterey, USA

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    ISLPED '02 Paper Acceptance Rate 40 of 162 submissions, 25%;
    Overall Acceptance Rate 398 of 1,159 submissions, 34%

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    Cited By

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    • (2023)Fine-grain data classification to filter token coherence trafficJournal of Parallel and Distributed Computing10.1016/j.jpdc.2022.09.004171:C(40-53)Online publication date: 1-Jan-2023
    • (2022)CARAT CAKE: replacing paging via compiler/kernel cooperationProceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3503222.3507771(98-114)Online publication date: 28-Feb-2022
    • (2020)CARAT: a case for virtual memory through compiler- and runtime-based address translationProceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/3385412.3385987(329-345)Online publication date: 11-Jun-2020
    • (2018)Energy-efficient hybrid coherence protocol for multicore processorsCluster Computing10.5555/3287988.328800321:3(1521-1541)Online publication date: 1-Sep-2018
    • (2018)Domino CacheACM Transactions on Design Automation of Electronic Systems10.1145/317484823:3(1-23)Online publication date: 1-Feb-2018
    • (2012)Reducing memory reference energy with opportunistic virtual cachingProceedings of the 39th Annual International Symposium on Computer Architecture10.5555/2337159.2337194(297-308)Online publication date: 9-Jun-2012
    • (2012)Reducing memory reference energy with opportunistic virtual cachingACM SIGARCH Computer Architecture News10.1145/2366231.233719440:3(297-308)Online publication date: 9-Jun-2012
    • (2012)Counting stream registers: An efficient and effective snoop filter architecture2012 International Conference on Embedded Computer Systems (SAMOS)10.1109/SAMOS.2012.6404165(120-127)Online publication date: Jul-2012
    • (2012)Predicting Coherence Communication by Tracking Synchronization Points at Run TimeProceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2012.40(351-362)Online publication date: 1-Dec-2012
    • (2012)Reducing memory reference energy with opportunistic virtual caching2012 39th Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA.2012.6237026(297-308)Online publication date: Jun-2012
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