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ORCIDHamid Reza Ghasemi
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2010 – 2019
- 2016
[c11]Hadi Asghari Moghaddam
, Hamid Reza Ghasemi, Abhishek Arvind Sinkar, Indrani Paul, Nam Sung Kim:
VR-scale: runtime dynamic phase scaling of processor voltage regulators for improving power efficiency. DAC 2016: 151:1-151:6- 2015
- [c10]Hamid Reza Ghasemi, Ulya R. Karpuzcu, Nam Sung Kim:
Comparison of single-ISA heterogeneous versus wide dynamic range processors for mobile applications. ICCD 2015: 304-310 - 2014
- [j2]Abhishek A. Sinkar, Hamid Reza Ghasemi, Michael J. Schulte, Ulya R. Karpuzcu, Nam Sung Kim:
Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance Processors. IEEE Trans. Very Large Scale Integr. Syst. 22(4): 747-758 (2014) - [c9]Hamid Reza Ghasemi, Nam Sung Kim:
RCS: runtime resource and core scaling for power-constrained multi-core processors. PACT 2014: 251-262 - 2012
- [j1]Nam Sung Kim, Stark C. Draper, Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, Taejoon Park:
Analyzing the Impact of Joint Optimization of Cell Size, Redundancy, and ECC on Low-Voltage SRAM Array Total Area. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2333-2337 (2012) - [c8]Hamid Reza Ghasemi, Abhishek A. Sinkar, Michael J. Schulte, Nam Sung Kim:
Cost-effective power delivery to support per-core voltage domains for power-constrained processors. DAC 2012: 56-61 - 2011
- [c7]Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim:
Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors. HPCA 2011: 38-49 - 2010
- [c6]Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim:
Minimizing total area of low-voltage SRAM arrays through joint optimization of cell size, redundancy, and ECC. ICCD 2010: 112-117 - [c5]Jungseob Lee, Chi-Chao Wang, Hamid Reza Ghasemi, Lloyd Bircher, Yu Cao, Nam Sung Kim:
Workload-adaptive process tuning strategy for power-efficient multi-core processors. ISLPED 2010: 225-230
2000 – 2009
- 2008
- [c4]Somayeh Sardashti, Hamid Reza Ghasemi, Mehdi Semsarzadeh, Mahmoud Reza Hashemi:
High Performance Mathematical Quarter-Pixel Motion Estimation with Novel Rate Distortion Metric for H.264/AVC. CSICC 2008: 219-226 - 2006
- [c3]Somayeh Sardashti, Hamid Reza Ghasemi, Omid Fatemi:
Muli-Issue Multi-Threaded Stream Processor. ICME 2006: 2041-2044 - 2005
- [c2]Hamid Reza Ghasemi, Zainalabedin Navabi:
An Effective VHDL-AMS Simulation Algorithm with Event Partitioning. VLSI Design 2005: 762-767 - 2003
- [c1]Hamid Reza Ghasemi, Hossein Mohammadi, Behnam Robatmili, Nasser Yazdani:
Augmenting general purpose processors for network processing. FPT 2003: 416-419
Coauthor Index
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