poster

Workload-adaptive process tuning strategy for power-efficient multi-core processors

Authors:

Hamid Ghasemil,

Nam Sung KimAuthors Info & Claims

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

Pages 225 - 230

https://doi.org/10.1145/1840845.1840889

Published: 18 August 2010 Publication History

Abstract

As more devices are integrated with technology scaling, reducing the power consumption of both high-performance and low-power processors has become the first-class design constraint. Reducing power consumption while satisfying required performance is critical for increasing the operating time of mobile devices and lowering the operating cost of offices and data centers. Meanwhile, dynamic voltage and frequency scaling (DVFS) and clock-gating (CG) techniques have been widely used for two of the most powerful techniques to reduce the power consumption of such processors. Depending on performance and power demands, a processor runs at various performance and power states to trade power with performance. In this paper, we propose process tuning strategy to minimize the average power consumption of multi-core processors that use the DVFS and CG techniques, while providing the same maximum performance. The proposed optimization method incorporates with workload characteristics of commercial high-performance and low-power multi-core processors. The experimental results show that our optimized 32nm technologies for workstation, mobile, and server multi-core processors minimize the average power by up to 13, 18, and 9%, respectively.

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Cited By

M. Lordwin Cecil Prabhaker R. Saravana Ram (2020)Real-Time Task Schedulers for a High-Performance Multi-Core SystemAutomatic Control and Computer Sciences10.3103/S014641162004009454:4(291-301)Online publication date: 14-Sep-2020
https://doi.org/10.3103/S0146411620040094
Kadjo DOgras UAyoub RKishinevsky MGratz P(2014)Towards platform level power management in mobile systems2014 27th IEEE International System-on-Chip Conference (SOCC)10.1109/SOCC.2014.6948916(146-151)Online publication date: Sep-2014
https://doi.org/10.1109/SOCC.2014.6948916
Yeric G(2011)Technology roadmaps and low power SoC design2011 International Electron Devices Meeting10.1109/IEDM.2011.6131559(15.4.1-15.4.4)Online publication date: Dec-2011
https://doi.org/10.1109/IEDM.2011.6131559

Index Terms

Workload-adaptive process tuning strategy for power-efficient multi-core processors
1. Computer systems organization

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Published In

cover image ACM Conferences

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

August 2010

458 pages

ISBN:9781450301466

DOI:10.1145/1840845

General Chairs:
Vojin Oklobdzija
University of Texas, Dallas
,
Barry Pangle
Mentor Graphics
,
Naehyuck Chang
Seoul National University
,
Program Chairs:
Naresh Shanbhag
University of Illinois at Urbana-Champaign
,
Chris H. Kim
University of Minnesota

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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New York, NY, United States

Publication History

Published: 18 August 2010

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ISLPED'10: International Symposium on Low Power Electronics and Design

August 18 - 20, 2010

Texas, Austin, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

M. Lordwin Cecil Prabhaker R. Saravana Ram (2020)Real-Time Task Schedulers for a High-Performance Multi-Core SystemAutomatic Control and Computer Sciences10.3103/S014641162004009454:4(291-301)Online publication date: 14-Sep-2020
https://doi.org/10.3103/S0146411620040094
Kadjo DOgras UAyoub RKishinevsky MGratz P(2014)Towards platform level power management in mobile systems2014 27th IEEE International System-on-Chip Conference (SOCC)10.1109/SOCC.2014.6948916(146-151)Online publication date: Sep-2014
https://doi.org/10.1109/SOCC.2014.6948916
Yeric G(2011)Technology roadmaps and low power SoC design2011 International Electron Devices Meeting10.1109/IEDM.2011.6131559(15.4.1-15.4.4)Online publication date: Dec-2011
https://doi.org/10.1109/IEDM.2011.6131559

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