"The Impact of Logic Synthesis and Technology Mapping on Logic Locking ..."

Lilas Alrahis et al. (2024)

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DOI: 10.1109/VLSI-SOC62099.2024.10767809

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type: Conference or Workshop Paper

metadata version: 2024-12-10

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Lilas Alrahis, Mohammed Thari Nabeel, Johann Knechtel, Ozgur Sinanoglu:
The Impact of Logic Synthesis and Technology Mapping on Logic Locking Security. VLSI-SoC 2024: 1-6

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