"472MHz throughput asynchronous FIFO design on a Virtex-5 FPGA device."

Jeong-Gun Lee et al. (2011)

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DOI: 10.1587/ELEX.8.676

access: open

type: Journal Article

metadata version: 2021-02-12

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  - journals/ieiceee/LeeLOK11
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  - https://dblp.org/rec/journals/ieiceee/LeeLOK11
Jeong-Gun Lee, Deok-Young Lee, Myeong-Hoon Oh, Young Woong Ko:
472MHz throughput asynchronous FIFO design on a Virtex-5 FPGA device. IEICE Electron. Express 8(9): 676-683 (2011)

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