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ORCID12th IEEE Symposium on Computer Arithmetic 1995: Bath, England, UK
- 12th Symposium on Computer Arithmetic (ARITH-12 '95), July 19-21, 1995, Bath, England, UK. IEEE Computer Society 1995, ISBN 0-8186-7089-4
Table Methods
- Masayuki Ito, Naofumi Takagi, Shuzo Yajima:
Efficient Initial Approximation and Fast Converging Methods for Division and Square Root. 2-8 - Hannes Hassler, Naofumi Takagi:
Function Evaluation by Table Look-up and Addition. 10-16 - Debjit Das Sarma, David W. Matula:
Faithful Bipartite ROM Reciprocal Tables. 17-
Multiplication
- Hakim Bederr, Michael Nicolaidis, Alain Guyot:
Analytic approach for error masking elimination in on-line multipliers. 30-37 - Robert Michael Owens, Raminder Singh Bajwa, Mary Jane Irwin:
Reducing the number of counters needed for integer multiplication. 38-41 - Charles U. Martel, Vojin G. Oklobdzija, R. Ravi, Paul F. Stelling:
Design Strategies for Optimal Multiplier Circuits. 42-49 - Chung Nan Lyu, David W. Matula:
Redundant Binary Booth Recoding. 50-
System Design and Techniques
- Milos D. Ercegovac, Tomás Lang:
Sign detection and comparison networks with a small number of transitions. 59-66 - A. Houelle, Habib Mehrez, Nicolas Vaucher, Luis A. Montalvo, Alain Guyot:
Application of fast layout synthesis environment to dividers evaluation. 67-74 - Michael J. Flynn, Kevin J. Nowka, Gary Bewick, Eric M. Schwarz, Nhon T. Quach:
The SNAP Project: Towards Sub-Nanosecond Arithmetic. 75-
Integrated Circuits I
- Belle W. Y. Wei, He Du, Honglu Chen:
A complex-number multiplier using radix-4 digits. 84- - Song Cui, Neil Burgess, Michael J. Liebelt
, Kamran Eshraghian:
A GaAs IEEE Floating Point Standard Single Precision Multiplier. 91-97 - Gensoh Matsubara, Nobuhiro Ide, Haruyuki Tago, Seigo Suzuki, Nobuyuki Goto:
30-ns 55-b Radix 2 Division and Square Root Using a Self-Timed Circuit. 98-
Elementary Functions
- Vijay K. Jain, L. Lin:
High-speed double precision computation of nonlinear functions. 107-114 - Hercule Kwan, Robert Leonard Nelson Jr., Earl E. Swartzlander Jr.:
Cascaded Implementation of an Iterative Inverse--Square--Root Algorithm, with Overflow Lookahead. 115-
Division and Square Root
- Tomás Lang, Paolo Montuschi:
Very-high radix combined division and square root with prescaling and selection by rounding. 124-131 - Peter Soderquist, Miriam Leeser:
An Area/Performance Comparison of Subtractive and Multiplicative Divide/Square Root Implementations. 132-139 - Tim Coe, Ping Tak Peter Tang:
It Takes Six Ones To Reach a Flaw. 140-
Integrated Circuits II
- Robert K. Yu, Gregory B. Zyner:
167 MHz Radix-4 Floating Point Multiplier. 149-154 - J. Arjun Prabhu, Gregory B. Zyner:
167 MHz Radix-8 Divide and Square Root Using Overlapped Radix-2 Stages. 155-162 - Thomas W. Lynch, Ashraf Ahmed, Michael J. Schulte, Thomas K. Callaway, Robert Tisdale:
The K5 transcendental functions. 163-
CORDIC/Modular Arithmetic
- Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata:
Redundant CORDIC Rotator Based on Parallel Prediction. 172-179 - Feng Zhou, Peter Kornerup:
High Speed DCT/IDCT Using a Pipelined CORDIC Algorithm. 180-187 - Takafumi Hamano, Naofumi Takagi, Shuzo Yajima, Franco P. Preparata:
O(n)-depth circuit algorithm for modular exponentiation. 188-192 - Holger Orup:
Simplifying Quotient Determination in High-Radix Modular Multiplication. 193-
Logarithmic Number Systems
- Jean-Michel Muller, Arnaud Tisserand, Alexandre Scherbyna:
Semi-Logarithmic Number Systems. 201-207 - Rudi van Drunen, Lambert Spaanenburg, Paul G. Lucassen, J. A. G. Nijhuis, Jan Tijmen Udding:
Arithmetic for Relative Accuracy. 208-
Reliable Arithmetic
- Christoph Baumhof:
A New VLSI Vector Arithmetic Coprocessor for the PC. 210-215 - Warren E. Ferguson:
Exact Computation of a Sum or Difference with Applications to Argument Reduction. 216-221 - Michael J. Schulte, Earl E. Swartzlander Jr.:
Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor. 222-229 - Dominique Michelucci:
An epsilon-Arithmetic for Removing Degeneracies. 230-
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