default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID9. CHARME 1997: Montréal, Québec, Canada
- Hon Fung Li, David K. Probst:
Advances in Hardware Design and Verification, IFIP WG 10.5 International Conference on Correct Hardware Design and Verification Methods, 16-18 October 1997, Montréal, Québec, Canada. IFIP Conference Proceedings 105, Chapman & Hall 1997, ISBN 0-412-81330-0
Preface
- Allan Silburt:
ASIC/system hardware verification at Nortel: a view from the trenches. CHARME 1997: 1
Part One - Advanced Processor Verification
- Xiaoshan Li, Antonio Cau, Ben C. Moszkowski, Nick Coleman, Hussein Zedan:
Proving the correctness of the interlock mechanism in processor design. CHARME 1997: 5-22 - Werner Damm, Amir Pnueli:
Verifying out-of-order executions. CHARME 1997: 23-47 - Ganesh Gopalakrishnan, Rajnish Ghughal, Ravi Hosabettu, Abdelillah Mokkedem, Ratan Nalumasu:
Formal modeling and validation applied to a commercial coherent bus: a case study. CHARME 1997: 48-62
Part Two - Semantics of Hardware-Description Languages
- Dominique Borrione, F. Vestman, H. Bouamama:
An approach to Verilog-VHDL interoperability for synchronous designs. CHARME 1997: 65-87 - Subash Shankar, James R. Slagle:
A polymodal semantics for VHDL. CHARME 1997: 88-105 - Natividad Martínez Madrid, Peter T. Breuer, Carlos Delgado Kloos:
A semantic model for VHDL-AMS. CHARME 1997: 106-123
Part Three - Model Checking
- Carlos M. Roman, Gary De Palma, Robert P. Kurshan:
Model checking without hardware drivers. CHARME 1997: 127 - Willem Visser, Howard Barringer, Donal Fellows, Graham Gough, Alan R. Williams:
Efficient CTL* model checking for analysis of rainbow designs. CHARME 1997: 128-145 - Jürgen Ruf, Thomas Kropf:
Symbolic model checking for a discrete clocked temporal logic with intervals. CHARME 1997: 146-163
Part Four - Decision Graphs
- Gianpiero Cabodi, Paolo Camurati, Antonio Lioy, Massimo Poncino, Stefano Quer:
A parallel approach to symbolic traversal based on set partitioning. CHARME 1997: 167-184 - Stefan Höreth:
Implementation of a multiple-domain decision diagram package. CHARME 1997: 185-202 - David Déharbe, Anamaria Martins Moreira:
Using induction and BDDs to model check invariants. CHARME 1997: 203-213
Part Five - New Verification Techniques
- Roger B. Hughes:
CheckOff-M: model checking and its role in IP. CHARME 1997: 217 - Otmane Aït Mohamed, Xiaoyu Song, Eduard Cerny:
On the non-termination of MDGs-based abstract state enumeration. CHARME 1997: 218-235 - Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Paolo Prinetto, Matteo Sonza Reorda, Giovanni Squillero:
Simulation-based verification of network protocols performance. CHARME 1997: 236-251
Part Six - Issues in Formal Synthesis
- Steven D. Johnson, Paul S. Miner:
Integrated reasoning support in system design: design derivation and theorem proving. CHARME 1997: 255-272 - George Economakos, George K. Papakonstantinou, Kiamal Z. Pekmestzi, Panayotis Tsanakas:
Hardware compilation using attribute grammars. CHARME 1997: 273-290 - Matthias Mutz:
Automatic post-synthesis verification support for a high level synthesis step by using the HOL theorem proving system. CHARME 1997: 291-308
Panel
- Carlos M. Roman:
Is there a crisis in hardware verification? CHARME 1997: 309-310
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-11-13 23:36 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
