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2020 – today
- 2024
[j85]Wenhao Lu, Zehao Li, Junying Li, Yuncheng Lu, Tony Tae-Hyoung Kim:
Event-frame object detection under dynamic background condition. J. Electronic Imaging 33(4) (2024)- [j84]Yuncheng Lu
, Zehao Li, Tony Tae-Hyoung Kim:
HGRP: A 181-μ W Real-Time Hand Gesture Recognition Processor Based on Bi-Directional Convolution and Iteration-Free Feature Clustering. IEEE J. Solid State Circuits 59(6): 1962-1975 (2024) - [j83]Dong-Hyun Yoon, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A 2.5-GHz Dynamic Performance-Enhanced Nonlinear DAC-Based Direct-Digital Frequency Synthesizer in 65-nm CMOS Process. IEEE J. Solid State Circuits 59(7): 2185-2198 (2024) - [j82]Yuqi Su, Tony Tae-Hyoung Kim, Bongjin Kim:
FlexSpin: A CMOS Ising Machine With 256 Flexible Spin Processing Elements With 8-b Coefficients for Solving Combinatorial Optimization Problems. IEEE J. Solid State Circuits 59(8): 2659-2670 (2024) - [j81]Junjie Mu, Chengshuo Yu, Tony Tae-Hyoung Kim, Bongjin Kim:
A Scalable and Reconfigurable Bit-Serial Compute-Near-Memory Hardware Accelerator for Solving 2-D/3-D Partial Differential Equations. IEEE J. Solid State Circuits 59(8): 2706-2716 (2024) - [j80]Kyung-Chan An, Neelakantan Narasimman, Tony Tae-Hyoung Kim:
A High-Resolution Discrete-Time Second-Order ΣΔ ADC with Improved Tolerance to KT/C Noise Using Low Oversampling Ratio. Sensors 24(17): 5755 (2024) - [j79]Kyung-Chan An, Neelakantan Narasimman, Tony Tae-Hyoung Kim:
A 0.6-to-1.2 V Scaling-Friendly Discrete-Time OTA-Free Linear VCO-Based ΔΣ ADC Suitable for DVFS. IEEE Trans. Circuits Syst. I Regul. Pap. 71(4): 1481-1494 (2024) - [j78]Chengshuo Yu, Haoge Jiang, Junjie Mu, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim:
A Dual 7T SRAM-Based Zero-Skipping Compute- In-Memory Macro With 1-6b Binary Searching ADCs for Processing Quantized Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 71(8): 3672-3682 (2024) - [j77]Junjie Mu, Lu Lu, Ju Eon Kim, Byung-Kwon An, Vishal Sharma, Arya Jagath Lekshmi, Putu Andhita Dananjaya, Weng Hong Lai, Wen Siang Lew, Tony Tae-Hyoung Kim:
A 1-Mb RRAM Macro With 9.8 ns Read Access Time Utilizing Dynamic Reference Voltage for Reliable Sensing Operation. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2564-2568 (2024) - [j76]Chung-Hee Jang, Dong-Hyun Shin, Young-Kyu Kim, Tony Tae-Hyoung Kim, Sukho Lee, Kwang-Hyun Baek:
A Reconfigurable Step-Down Switched-Capacitor Power Converter Using Optimized Partial Series-Parallel (OPSP) Topology. IEEE Trans. Circuits Syst. II Express Briefs 71(6): 2941-2945 (2024) - [j75]Dong-Hyun Shin, Chung-Hee Jang, Young-Kyu Kim, Tony Tae-Hyoung Kim, Sukho Lee, Kwang-Hyun Baek:
An Inductance-Variation-Insensitive Buck Converter Using a Dynamic Ramp Compensation With Slope Sensing Technique. IEEE Trans. Circuits Syst. II Express Briefs 71(8): 3700-3704 (2024) - [c108]Zehao Li, Yuncheng Lu, Anh Tuan Do, Tony Tae-Hyoung Kim:
A 4.2pJ/Pixel 480 fps Stereo Vision Processor with Pixel Level Pipelined Architecture and Two-Path Aggregation Semi-Global Matching. CICC 2024: 1-2 - [c107]An Kyung-Chan, Li Jun-Ying, Yang Chu-Feng, Si En Timothy Ng, Shibi Varku, Wu Qinjie, Priyanka Kajal, Nripan Mathews, Arindam Basu, Tony Tae-Hyoung Kim:
A Dynamic Gesture Recognition Algorithm Using Single Halide Perovskite Photovoltaic Cell for Human-Machine Interaction. ICEIC 2024: 1-4 - [c106]Byung-Kwon An, Xueyong Zhang, Anh Tuan Do, Tony Tae-Hyoung Kim:
Time-based Sensing with Linear Current-to-Time Conversion for Multi-level Resistive Memory. ISCAS 2024: 1-5 - [c105]Zehao Li, Wenhao Lu, Yuncheng Lu, Junying Li, Yucen Shi, Yuanjin Zheng, Tony Tae-Hyoung Kim:
Live Demonstration: Real-Time Object Detection & Classification System in IoT with Dynamic Neuromorphic Vision Sensors. ISCAS 2024: 1 - [c104]Zehao Li, Wenhao Lu, Yuncheng Lu, Junying Li, Yucen Shi, Yuanjin Zheng, Tony Tae-Hyoung Kim:
An Energy-Efficient Object Detection System in IoT with Dynamic Neuromorphic Vision Sensors. ISCAS 2024: 1-5 - [c103]Yuncheng Lu, Kaixiang Cui, Yucen Shi, Zehao Li, Junying Li, Wenhao Lu, Yuanjin Zheng, Tony Tae-Hyoung Kim:
A Memory-Efficient High-Speed Event-based Object Tracking System. ISCAS 2024: 1-5 - [c102]Zhengzhe Wei, Boyi Dong, Yuqi Su, Yi Wang, Chuanshi Yang, Yuncheng Lu, Chao Wang, Tony Tae-Hyoung Kim, Yuanjin Zheng:
A 2.793µW Near-Threshold Neuronal Population Dynamics Simulator for Reliable Simultaneous Localization and Mapping. ISCAS 2024: 1-5 - 2023
- [j74]Yuncheng Lu, Van Loi Le, Tony Tae-Hyoung Kim:
A 184-μW Error-Tolerant Real-Time Hand Gesture Recognition System With Hybrid Tiny Classifiers Utilizing Edge CNN. IEEE J. Solid State Circuits 58(2): 530-542 (2023) - [j73]Chengshuo Yu, Junjie Mu, Yuqi Su, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim:
A Time-Domain Wavefront Computing Accelerator With a 32 × 32 Reconfigurable PE Array. IEEE J. Solid State Circuits 58(8): 2372-2382 (2023) - [j72]Xueyong Zhang, Byung-Kwon An, Tony Tae-Hyoung Kim:
A Robust Time-Based Multi-Level Sensing Circuit for Resistive Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 340-352 (2023) - [j71]Hyunjoon Kim, Junjie Mu, Chengshuo Yu, Tony Tae-Hyoung Kim, Bongjin Kim:
A 1-16b Reconfigurable 80Kb 7T SRAM-Based Digital Near-Memory Computing Macro for Processing Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 70(4): 1580-1590 (2023) - [j70]Yuzong Chen, Junjie Mu, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim:
BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 70(5): 2016-2027 (2023) - [j69]Xin Zhang, Yuncheng Lu, Bo Wang, Tony Tae-Hyoung Kim:
A Digital Bit-Reconfigurable Versatile Compute-In-Memory Macro for Machine Learning Acceleration. IEEE Trans. Circuits Syst. II Express Briefs 70(5): 1744-1748 (2023) - [c101]Yuncheng Lu, Xin Zhang, Zehao Li, Bo Wang, Tony Tae-Hyoung Kim:
SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor with Computing-In-Memory and Dead Neuron Pruning. A-SSCC 2023: 1-3 - [c100]Dong-Hyun Yoon, He Junsen, Kwang-Hyun Baek, Youngdon Choi, Jung-Hwan Choi, Tony Tae-Hyoung Kim:
A Time-Based PAM-4 Transceiver Using Single Path Decoder and Fast-Stochastic Calibration Techniques. A-SSCC 2023: 1-3 - [c99]Xin Zhang, Vishal Sharma, Yuncheng Lu, Yong-Jun Jo, Tony Tae-Hyoung Kim:
A 400MHz 249.1TOPS/W 64Kb Fully-Reconfigurable SRAM-Based Digital Compute-in-Memory Macro for Accelerating CNNs. A-SSCC 2023: 1-3 - [c98]Yong-Jun Jo, Boon Peng Yap, Dong-Hyun Yoon, Hyunjoon Kim, Yuanjin Zheng, Tony Tae-Hyoung Kim:
DenseCIM: Binary Weighted-Capacitor SRAM Computation-In-Memory with Column-by-Column Dynamic Range Calibration SAR ADC. CICC 2023: 1-2 - [c97]Yuqi Su, Tony Tae-Hyoung Kim, Bongjin Kim:
A Reconfigurable lsing Machine for Boolean Satisfiability Problems Featuring Many-Body Spin Interactions. CICC 2023: 1-2 - [c96]Chengshuo Yu, Junjie Mu, Kevin Tshun-Chuan Chai, Tony T. Kim, Bongjin Kim:
A Continuous-Time Ising Machine using Coupled Inverter Chains Featuring Fully-Parallel One-Shot Spin Updates. CICC 2023: 1-2 - [c95]He Junsen, Dong-Hyun Yoon, Tony Tae-Hyoung Kim:
An Effective Faulty TSV Detection Scheme for TSVs in High Bandwidth Memory. ISCAS 2023: 1-5 - [c94]Zhengzhe Wei, Junjie Mu, Zhongzhiguang Lu, Yuanjin Zheng, Tony Tae-Hyoung Kim, Bongjin Kim:
A Graph-Based Accelerator of Retinex Model with Bit-Serial Computing for Image Processing. ISCAS 2023: 1-5 - [c93]Qibang Zang, Wang Ling Goh, Lu Lu, Chengshuo Yu, Junjie Mu, Tony Tae-Hyoung Kim, Bongjin Kim, Dongrui Li, Anh Tuan Do:
282-to-607 TOPS/W, 7T-SRAM Based CiM with Reconfigurable Column SAR ADC for Neural Network Processing. ISCAS 2023: 1-5 - [c92]Byung-Kwon An, Xueyong Zhang, Anh Tuan Do, Tony Tae-Hyoung Kim:
Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive Memory. NEWCAS 2023: 1-5 - [c91]Junjie Mu, Chengshuo Yu, Tony Tae-Hyoung Kim, Bongjin Kim:
A Bit-Serial Computing Accelerator for Solving Coupled Partial Differential Equations. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j68]Tony Tae-Hyoung Kim, Bongjin Kim, Joo-Young Kim, Jaydeep P. Kulkarni:
Guest Editorial Revolution of AI and Machine Learning With Processing-in-Memory (PIM): From Systems, Architectures, to Circuits. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 333-337 (2022) - [j67]Donghyuk Kim, Chengshuo Yu, Shanshan Xie, Yuzong Chen, Joo-Young Kim, Bongjin Kim, Jaydeep P. Kulkarni, Tony Tae-Hyoung Kim:
An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 338-353 (2022) - [j66]Vishal Sharma, Ju Eon Kim, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim:
A Reconfigurable 16Kb AND8T SRAM Macro With Improved Linearity for Multibit Compute-In Memory of Artificial Intelligence Edge Devices. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 522-535 (2022) - [j65]Chengshuo Yu, Taegeun Yoo, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim:
A 65-nm 8T SRAM Compute-in-Memory Macro With Column ADCs for Processing Neural Networks. IEEE J. Solid State Circuits 57(11): 3466-3476 (2022) - [j64]Lu Lu, Taegeun Yoo, Tony Tae-Hyoung Kim:
A 6T SRAM Based Two-Dimensional Configurable Challenge-Response PUF for Portable Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 69(6): 2542-2552 (2022) - [j63]Vishal Sharma, Hyunjoon Kim, Tony Tae-Hyoung Kim:
A 64 Kb Reconfigurable Full-Precision Digital ReRAM-Based Compute-In-Memory for Artificial Intelligence Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 69(8): 3284-3296 (2022) - [j62]Lu Lu, Tony Tae-Hyoung Kim:
A High Reliable SRAM-Based PUF With Enhanced Challenge-Response Space. IEEE Trans. Circuits Syst. II Express Briefs 69(2): 589-593 (2022) - [j61]Dong-Hyun Yoon, Dong-Kyu Jung, Kiho Seong, Jae-Soub Han, Keun-Yong Chung, Ju Eon Kim, Tony Tae-Hyoung Kim, Kwang-Hyun Baek:
A 3.2-GHz 178-fsrms Jitter Subsampling PLL/DLL-Based Injection-Locked Clock Multiplier. IEEE Trans. Very Large Scale Integr. Syst. 30(7): 915-925 (2022) - [c90]Yuncheng Lu, Zehao Li, Xin Zhang, Tony Tae-Hyoung Kim:
A 181µW Real-Time 3-D Hand-Gesture Recognition System for Edge Applications. AICAS 2022: 502 - [c89]Yuncheng Lu, Zehao Li, Yuzong Chen, Tony Tae-Hyoung Kim:
A 181µW Real-Time 3-D Hand Gesture Recognition System based on Bi-directional Convolution and Computing-Efficient Feature Clustering. CICC 2022: 1-2 - [c88]Dong-Hyun Yoon, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A 2.5 GHz 104 mW 57.35 dBc SFDR Non-linear DAC-based Direct-Digital Frequency Synthesizer in 65 nm CMOS Process. ESSCIRC 2022: 241-244 - [c87]Junjie Mu, Chengshuo Yu, Tony Tae-Hyoung Kim, Bongjin Kim:
A Scalable Bit-Serial Computing Hardware Accelerator for Solving 2D/3D Partial Differential Equations Using Finite Difference Method. ESSCIRC 2022: 353-356 - [c86]Yuzong Chen, Junjie Mu, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim:
A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory. ISCAS 2022: 2556-2560 - [c85]Yuncheng Lu, Zehao Li, Xin Zhang, Tony Tae-Hyoung Kim:
A Low-Power Gesture Recognition System utilizing Hybrid Tiny Classifiers. ISOCC 2022: 245-246 - [c84]Yuqi Su, Tony Tae-Hyoung Kim, Bongjin Kim:
FlexSpin: A Scalable CMOS Ising Machine with 256 Flexible Spin Processing Elements for Solving Complex Combinatorial Optimization Problems. ISSCC 2022: 1-3 - 2021
- [j60]Neelakantan Narasimman, Tony Tae-Hyoung Kim:
An Ultra-Low-Voltage VCO-Based ΔΣ Modulator Using Self-compensated Current Reference for Variation Tolerance. Circuits Syst. Signal Process. 40(3): 1089-1110 (2021) - [j59]Hyunjoon Kim, Taegeun Yoo, Tony Tae-Hyoung Kim, Bongjin Kim:
Colonnade: A Reconfigurable SRAM-Based Digital Bit-Serial Compute-In-Memory Macro for Processing Neural Networks. IEEE J. Solid State Circuits 56(7): 2221-2233 (2021) - [j58]Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim:
A Reconfigurable 4T2R ReRAM Computing In-Memory Macro for Efficient Edge Applications. IEEE Open J. Circuits Syst. 2: 210-222 (2021) - [j57]Jae-Soub Han, Tae-Hyeok Eom, Seong-Wook Choi, Kiho Seong, Dong-Hyun Yoon, Tony Tae-Hyoung Kim, Kwang-Hyun Baek, Yong Shim:
A Reference-Sampling Based Calibration-Free Fractional-N PLL with a PI-Linked Sampling Clock Generator. Sensors 21(20): 6824 (2021) - [j56]Deepu John, Tony Tae-Hyoung Kim, Matthew L. Johnston:
Guest Editorial Special Issue on Selected Papers From ISCAS 2021. IEEE Trans. Biomed. Circuits Syst. 15(6): 1126-1128 (2021) - [j55]Chengshuo Yu, Taegeun Yoo, Hyunjoon Kim, Tony Tae-Hyoung Kim, Kevin Chai Tshun Chuan, Bongjin Kim:
A Logic-Compatible eDRAM Compute-In-Memory With Embedded ADCs for Processing Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 68(2): 667-679 (2021) - [j54]Weng-Geng Ho, Kwen-Siong Chong, Tony Tae-Hyoung Kim, Bah-Hwee Gwee:
A Power-Aware Toggling-Frequency Actuator in Data-Toggling SRAM for Secure Data Protection. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 2122-2126 (2021) - [j53]Yong-Jun Jo, Ju Eon Kim, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A 0.007 mm2 0.6 V 6 MS/s Low-Power Double Rail-to-Rail SAR ADC in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3088-3092 (2021) - [j52]M. Sultan M. Siddiqui, Zhao Chuan Lee, Tony Tae-Hyoung Kim:
A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI. IEEE Trans. Very Large Scale Integr. Syst. 29(10): 1707-1719 (2021) - [c83]Yuncheng Lu, Zehao Li, Tony Tae-Hyoung Kim:
An Ultra-Low-power Real-Time Hand-Gesture Recognition System for Edge Applications. AICAS 2021: 1 - [c82]Lu Lu, Tony Tae-Hyoung Kim:
A Programmable 6T SRAM-Based PUF with Dynamic Stability Data Masking. A-SSCC 2021: 1-3 - [c81]Dong-Hyun Yoon, Dong-Kyu Jung, Kiho Seong, Tae-Hyeok Eom, Jae-Soub Han, Ju Eon Kim, Tony Tae-Hyoung Kim, Kwang-Hyun Baek:
A 3.2 GHz 178fsrms Jitter Injection Locked Clock Multiplier Using Sub-Sampling FTL and DLL for In-Band Noise Improvement. A-SSCC 2021: 1-3 - [c80]Chengshuo Yu, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim:
A Zero-Skipping Reconfigurable SRAM In-Memory Computing Macro with Binary-Searching ADC. ESSCIRC 2021: 131-134 - [c79]Kyung-Chan An, Neelakantan Narasimman, Tony Tae-Hyoung Kim:
A 0.6-to-1.2 V Scaling Friendly Discrete-Time OTA-Free ΔΣ-ADC for IoT Applications. ESSCIRC 2021: 219-222 - [c78]Chengshuo Yu, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim:
A Zero-Skipping Reconfigurable SRAM In-Memory Computing Macro with Binary-Searching ADC. ESSDERC 2021: 131-134 - [c77]Yuzong Chen, Lu Lu, Yuncheng Lu, Tony Tae-Hyoung Kim:
A Multi-Functional 4T2R ReRAM Macro Enabling 2-Dimensional Access and Computing In-Memory. ISCAS 2021: 1-5 - [c76]Lu Lu, Yuzong Chen, Tony Tae-Hyoung Kim:
A Configurable Randomness Enhanced RRAM PUF with Biased Current Sensing Scheme. ISCAS 2021: 1-5 - [c75]Vishal Sharma, Ju Eon Kim, Yong-Jun Jo, Yuzong Chen, Tony Tae-Hyoung Kim:
AND8T SRAM Macro with Improved Linearity for Multi-Bit In-Memory Computing. ISCAS 2021: 1-5 - [c74]Yuncheng Lu, Van Loi Le, Tony Tae-Hyoung Kim:
9.7 A 184 µ W Real-Time Hand-Gesture Recognition System with Hybrid Tiny Classifiers for Smart Wearable Devices. ISSCC 2021: 156-158 - 2020
- [j51]Ju Eon Kim, Taegeun Yoo, Dong-Kyu Jung, Dong-Hyun Yoon, Kiho Seong, Tony Tae-Hyoung Kim, Kwang-Hyun Baek:
A 0.5 V 8-12 Bit 300 KSPS SAR ADC With Adaptive Conversion Time Detection-and-Control for High Immunity to PVT Variations. IEEE Access 8: 101359-101368 (2020) - [j50]Kiho Seong, Dong-Kyu Jung, Dong-Hyun Yoon, Jae-Soub Han, Ju Eon Kim, Tony Tae-Hyoung Kim, Woojoo Lee, Kwang-Hyun Baek:
Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems. Sensors 20(8): 2430 (2020) - [j49]Siyu Liu, Weitao Song, Xinqin Liao, Tony Tae-Hyoung Kim, Yuanjin Zheng:
Development of a Handheld Volumetric Photoacoustic Imaging System With a Central-Holed 2D Matrix Aperture. IEEE Trans. Biomed. Eng. 67(9): 2482-2489 (2020) - [j48]Anh-Tuan Do, Seyed Mohammad Ali Zeinolabedin, Tony Tae-Hyoung Kim:
Energy-Efficient Data-Aware SRAM Design Utilizing Column-Based Data Encoding. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 2154-2158 (2020) - [j47]Lu Lu, Taegeun Yoo, Van Loi Le, Tony Tae-Hyoung Kim:
A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines. IEEE Trans. Very Large Scale Integr. Syst. 28(6): 1345-1356 (2020) - [j46]Van Loi Le, Taegeun Yoo, Ju Eon Kim, Ngoc Le Ba, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A 137-μW 1.78-mm2 30-Frames/s Real-Time Gesture Recognition SoC for Smart Devices. IEEE Trans. Very Large Scale Integr. Syst. 28(8): 1909-1919 (2020) - [j45]Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim:
Reconfigurable 2T2R ReRAM Architecture for Versatile Data Storage and Computing In-Memory. IEEE Trans. Very Large Scale Integr. Syst. 28(12): 2636-2649 (2020) - [c73]Lu Lu, Ju Eon Kim, Vishal Sharma, Tony Tae-Hyoung Kim:
ReRAM Device and Circuit Co-Design Challenges in Nano-scale CMOS Technology. APCCAS 2020: 213-216 - [c72]Chengshuo Yu, Taegeun Yoo, Tony Tae-Hyoung Kim, Kevin Tshun Chuan Chai, Bongjin Kim:
A 16K Current-Based 8T SRAM Compute-In-Memory Macro with Decoupled Read/Write and 1-5bit Column ADC. CICC 2020: 1-4 - [c71]Qian Chen, Yuqi Su, Hyunjoon Kim, Taegeun Yoo, Tony Tae-Hyoung Kim, Bongjin Kim:
A 16×128 Stochastic-Binary Processing Element Array for Accelerating Stochastic Dot-Product Computation Using 1-16 Bit-Stream Length. DATE 2020: 678-681 - [c70]Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim:
Reconfigurable 2T2R ReRAM with Split Word-Lines for TCAM Operation and In-Memory Computing. ISCAS 2020: 1-5 - [c69]Anh Tuan Do, Tony Tae-Hyoung Kim, Xin Liu, Jun Zhou:
Design and Characterization of Radiation-Hardened MCU for Space Application using Error Correction SRAM and Glitch Removal Clock Buffer Cell. ISCAS 2020: 1-4 - [c68]Weng-Geng Ho, Kwen-Siong Chong, Tony Tae-Hyoung Kim, Bah-Hwee Gwee:
A Secure Data-Toggling SRAM for Confidential Data Protection. ISCAS 2020: 1 - [c67]Van Loi Le, Taegeun Yoo, Ju Eon Kim, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A Low-Power Smart Gesture Sensing SoC with On-chip Image Sensor for Smart Devices. ISOCC 2020: 171-172 - [c66]Taegeun Yoo, Tony Tae-Hyoung Kim, Bongjin Kim, Chengshuo Yu, Kevin Chai Tshun Chuan:
Design of Current-Mode 8T SRAM Compute-In-Memory Macro for Processing Neural Networks. ISOCC 2020: 175-176
2010 – 2019
- 2019
- [j44]Zhao Chuan Lee, M. Sultan M. Siddiqui, Zhi-Hui Kong, Tony Tae-Hyoung Kim:
An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI. IEEE J. Solid State Circuits 54(7): 2091-2101 (2019) - [j43]Ngoc Le Ba, Sechang Oh, Dennis Sylvester, Tony Tae-Hyoung Kim:
A 256 pixel, 21.6 μW infrared gesture recognition processor for smart devices. Microelectron. J. 86: 49-56 (2019) - [j42]Achiranshu Garg, Zhao Chuan Lee, Lu Lu, Tony Tae-Hyoung Kim:
Improving uniformity and reliability of SRAM PUFs utilizing device aging phenomenon for unique identifier generation. Microelectron. J. 90: 29-38 (2019) - [j41]Weng-Geng Ho, Kwen-Siong Chong, Tony Tae-Hyoung Kim, Bah-Hwee Gwee:
A Secure Data-Toggling SRAM for Confidential Data Protection. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(11): 4186-4199 (2019) - [j40]Anh-Tuan Do, Seyed Mohammad Ali Zeinolabedin, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim:
An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With 0.175µW/Channel in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 27(1): 126-137 (2019) - [j39]Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber:
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 253-280 (2019) - [c65]Siyu Liu, Kai Tang, Haoran Jin, Ruochong Zhang, Tony Tae-Hyoung Kim, Yuanjin Zheng:
Continuous wave laser excitation based portable optoacoustic imaging system for melanoma detection. BioCAS 2019: 1-4 - [c64]JunTae Choi, JunYoung Kweon, YunHeub Song, Tony Tae-Hyoung Kim:
Novel current-mirror based time dependent sense scheme for MLC PRAM. ICEIC 2019: 1-3 - [c63]Van Loi Le, Taegeun Yoo, Ju Eon Kim, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A 213.7-µW Gesture Sensing System-On-Chip With Self-Adaptive Motion Detection and Noise-Tolerant Outermost-Edge-Based Feature Extraction in 65 nm. ESSCIRC 2019: 123-126 - [c62]Hyunjoon Kim, Qian Chen, Taegeun Yoo, Tony Tae-Hyoung Kim, Bongjin Kim:
A 1-16b Precision Reconfigurable Digital In-Memory Computing Macro Featuring Column-MAC Architecture and Bit-Serial Computation. ESSCIRC 2019: 345-348 - [c61]Lu Lu, Tony Tae-Hyoung Kim:
A Sequence-Dependent Configurable PUF Based on 6T SRAM for Enhanced Challenge Response Space. ISCAS 2019: 1-5 - [c60]Taegeun Yoo, Hyunjoon Kim, Qian Chen, Tony Tae-Hyoung Kim, Bongjin Kim:
A Logic Compatible 4T Dual Embedded DRAM Array for In-Memory Computation of Deep Neural Networks. ISLPED 2019: 1-6 - [c59]Tony Tae-Hyoung Kim:
Overview of Memory Design for Next Generation Applications. ISOCC 2019: 162-163 - [c58]Hyunjoon Kim, Qian Chen, Taegeun Yoo, Tony Tae-Hyoung Kim, Bongjin Kim:
A Bit-Precision Reconfigurable Digital In-Memory Computing Macro for Energy-Efficient Processing of Artificial Neural Networks. ISOCC 2019: 166-167 - [c57]JunYoung Kweon, Yun-Heup Song, Tony Tae-Hyoung Kim:
Modelling of Phase Change Memory(PCM) cell for Circuit Simulation. ISOCC 2019: 170-171 - [c56]Tony Tae-Hyoung Kim:
Tutorial 1A: Design of ultra-low power SRAM for IoT, security and computation-in-memory. SoCC 2019: 1-2 - 2018
- [j38]Karim Rawy, Taegeun Yoo, Tony Tae-Hyoung Kim:
An 88% Efficiency 0.1-300-µW Energy Harvesting System With 3-D MPPT Using Switch Width Modulation for IoT Smart Nodes. IEEE J. Solid State Circuits 53(10): 2751-2762 (2018) - [j37]Van Loi Le, Juhui Li, Alan Chang, Tony Tae-Hyoung Kim:
A 0.4-V, 0.138-fJ/Cycle Single-Phase-Clocking Redundant-Transition-Free 24T Flip-Flop With Change-Sensing Scheme in 40-nm CMOS. IEEE J. Solid State Circuits 53(10): 2806-2817 (2018) - [j36]Van Loi Le, Tony Tae-Hyoung Kim:
An Area and Energy Efficient Ultra-Low Voltage Level Shifter With Pass Transistor and Reduced-Swing Output Buffer in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 65-II(5): 607-611 (2018) - [j35]Ngoc Le Ba, Tony Tae-Hyoung Kim:
An Area Efficient 1024-Point Low Power Radix-22 FFT Processor With Feed-Forward Multiple Delay Commutators. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3291-3299 (2018) - [j34]Dong-Kyu Jung, Yun-Hwan Jung, Taegeun Yoo, Dong-Hyun Yoon, Bo-Yun Jung, Tony Tae-Hyoung Kim, Kwang-Hyun Baek:
A 12-bit Multi-Channel R-R DAC Using a Shared Resistor String Scheme for Area-Efficient Display Source Driver. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3688-3697 (2018) - [c55]Lu Lu, Taegeun Yoo, Van Loi Le, Tony Tae-Hyoung Kim:
An Ultra-low Power 8T SRAM with Vertical Read Word Line and Data Aware Write Assist. A-SSCC 2018: 1-2 - [c54]Karim Rawy, Ruchi Sharma, Hong-Joon Yoon, Usman Khan, Sang-Woo Kim, Tony T. Kim:
An 88% Efficiency 2.4μW to 15.6μW Triboelectric Nanogenerator Energy Harvesting System Based on a Single-Comparator Control Algorithm. A-SSCC 2018: 33-36 - [c53]Taegeun Yoo, Van Loi Le, Ju Eon Kim, Ngoc Le Ba, Kwang-Hyun Baek, Tony T. Kim:
A 137-μW Area-Efficient Real-Time Gesture Recognition System for Smart Wearable Devices. A-SSCC 2018: 277-280 - [c52]JunYoung Kweon, JunTae Choi, Yun-Heup Song, Tony Tae-Hyoung Kim:
Leakage Control System Using Data Estimation of Resistive Memory. ISOCC 2018: 196-197 - [c51]M. Sultan M. Siddiqui, Ruchi Sharma, Van Loi Le, Taegeun Yoo, Ik-Joon Chang, Tony Tae-Hyoung Kim:
A Radiation Hardened SRAM with Self-refresh and Compact Error Correction. ISOCC 2018: 235-236 - [c50]Kyunghyun Lim, Minsoo Choi, Myat Thu Linn Aung, Kyunghwan Kim, Ji-Seong Kim, Rock-Hyun Baek, Ho-Jin Song, Tony Tae-Hyoung Kim, Byungsub Kim:
Experimental Verification of a Simple, Intuitive, and Accurate Closed-Form Transfer Function Model for Diverse High-Speed Interconnects. ISOCC 2018: 239-240 - 2017
- [j33]Bo Wang, Jun Zhou, Tony Tae-Hyoung Kim:
A 0.4 V 12T 2RW dual-port SRAM with suppressed common-row-access disturbance. Microelectron. J. 69: 78-85 (2017) - [j32]Abhik Das, Yuan Gao, Tony Tae-Hyoung Kim:
A 220-mV Power-on-Reset Based Self-Starter With 2-nW Quiescent Power for Thermoelectric Energy Harvesting Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(1): 217-226 (2017) - [j31]Karim Rawy, Felix Kalathiparambil, Dominic Maurath, Tony Tae-Hyoung Kim:
A Self-Adaptive Time-Based MPPT With 96.2% Tracking Efficiency and a Wide Tracking Range of 10 µA to 1 mA for IoT Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2334-2345 (2017) - [j30]Myat Thu Linn Aung, Takefumi Yoshikawa, Chuan Seng Tan, Tony Tae-Hyoung Kim:
Yield Enhancement of Face-to-Face Cu-Cu Bonding With Dual-Mode Transceivers in 3DICs. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1023-1031 (2017) - [j29]Ngoc Le Ba, Tony Tae-Hyoung Kim:
Design of Temperature-Aware Low-Voltage 8T SRAM in SOI Technology for High-Temperature Operation (25 %C-300 %C). IEEE Trans. Very Large Scale Integr. Syst. 25(8): 2383-2387 (2017) - [c49]Jun Zhou, Tony Tae-Hyoung Kim, Yong Lian:
Near-threshold processor design techniques for power-constrained computing devices. ASICON 2017: 920-923 - [c48]Karim Rawy, Taegeun Yoo, Tony T. Kim:
An 88% efficiency MPPT for PV energy harvesting system with novel switch width modulation for output power 100nW to 0.3mW. A-SSCC 2017: 117-120 - [c47]M. Sultan M. Siddiqui, Zhao Chuan Lee, Tony Tae-Hyoung Kim:
A 16kb column-based split cell-VSS, data-aware write-assisted 9T ultra-low voltage SRAM with enhanced read sensing margin in 28nm FDSOI. A-SSCC 2017: 165-168 - [c46]Van Loi Le, Juhui Li, Alan Chang, Tony T. Kim:
An 82% energy-saving change-sensing flip-flop in 40nm CMOS for ultra-low power applications. A-SSCC 2017: 197-200 - [c45]Neelakantan Narasimman, Dipankar Nag, Kevin Tshun Chuan Chai, Tony T. Kim:
A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation. CICC 2017: 1-4 - [c44]Mini Jayakrishnan, Alan Chang, Tony T. Kim:
Library pruning and sigma corner libraries for power efficient variation tolerant processor pipelines. VLSI-SoC 2017: 1-6 - 2016
- [j28]Seyed Mohammad Ali Zeinolabedin, Nader Karimi, Shadrokh Samavi, Tony Tae-Hyoung Kim:
Structuring of Contourlet Transform for Pipeline-Based Implementation. Circuits Syst. Signal Process. 35(3): 953-976 (2016) - [j27]Anh-Tuan Do, Zhao Chuan Lee, Bo Wang, Ik-Joon Chang, Xin Liu, Tony Tae-Hyoung Kim:
0.2 V 8T SRAM With PVT-Aware Bitline Sensing and Column-Based Data Randomization. IEEE J. Solid State Circuits 51(6): 1487-1498 (2016) - [j26]Seyed Mohammad Ali Zeinolabedin, Jun Zhou, Tony Tae-Hyoung Kim:
A Power and Area Efficient Ultra-Low Voltage Laplacian Pyramid Processing Engine With Adaptive Data Compression. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10): 1690-1700 (2016) - [j25]Bo Wang, Qi Li, Tony Tae-Hyoung Kim:
Read Bitline Sensing and Fast Local Write-Back Techniques in Hierarchical Bitline Architecture for Ultralow-Voltage SRAMs. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2165-2173 (2016) - [j24]Myat Thu Linn Aung, Eric Teck Heng Lim, Takefumi Yoshikawa, Tony Tae-Hyoung Kim:
2.31-Gb/s/ch Area-Efficient Crosstalk Canceled Hybrid Capacitive Coupling Interconnect for 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2703-2711 (2016) - [c43]Karthik Gopal Jayaraman, Karim Rawy, Tony T. Kim:
A 0.6-V power efficient digital LDO with 99.7% current efficiency utilizing load current aware clock modulation for fast transient response. APCCAS 2016: 103-106 - [c42]Myat Thu Linn Aung, Tony T. Kim:
Self-contained built-in-self-test/repair transceivers for interconnects in 3DICs. APCCAS 2016: 640-641 - [c41]Seyed Mohammad Ali Zeinolabedin, Anh-Tuan Do, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim:
Live demonstration: A 128-channel spike sorting processor featuring 0.175 μW and 0.0033 mm2 per Channel in 65-nm CMOS. APCCAS 2016: 734-735 - [c40]Anh-Tuan Do, Seyed Mohammad Ali Zeinolabedin, Tony Tae-Hyoung Kim:
A 0.3 pJ/access 8T data-aware SRAM utilizing column-based data encoding for ultra-low power applications. A-SSCC 2016: 173-176 - [c39]Abhik Das, Yuan Gao, Tony T. Kim:
An isolated PoR based pulse generator for TEG energy harvesting with minimum startup of 150 mV and maximum series resistance of 600 Ω. A-SSCC 2016: 297-300 - [c38]Neelakantan Narasimman, Tony T. Kim:
A 0.3 V, 49 fJ/conv.-step VCO-based delta sigma modulator with self-compensated current reference for variation tolerance. ESSCIRC 2016: 237-240 - [c37]Zhao Chuan Lee, M. Sultan M. Siddiqui, Zhi-Hui Kong, Tony Tae-Hyoung Kim:
An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI. ESSCIRC 2016: 437-440 - [c36]Karim Rawy, Felix Kalathiparambil George, Dominic Maurath, Tony T. Kim:
A time-based self-adaptive energy-harvesting MPPT with 5.1-µW power consumption and a wide tracking range of 10-µA to 1-mA. ESSCIRC 2016: 503-506 - [c35]Weng-Geng Ho, Kyaw Zwa Lwin Ne, N. Prashanth Srinivas, Kwen-Siong Chong, Tony Tae-Hyoung Kim, Bah-Hwee Gwee:
Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM. ISCAS 2016: 698-701 - [c34]Neelakantan Narasimman, Tony T. Kim:
An ultra-low voltage, VCO-based ADC with digital background calibration. ISCAS 2016: 1458-1461 - [c33]Sechang Oh, Ngoc Le Ba, Suyoung Bang, Junwon Jeong, David T. Blaauw, Tony T. Kim, Dennis Sylvester:
A 260µW infrared gesture recognition system-on-chip for smart devices. VLSI Circuits 2016: 1-2 - [c32]Seyed Mohammad Ali Zeinolabedin, Anh-Tuan Do, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim:
A 128-channel spike sorting processor featuring 0.175 µW and 0.0033 mm2 per channel in 65-nm CMOS. VLSI Circuits 2016: 1-2 - 2015
- [j23]Bo Wang, Jun Zhou, Tony Tae-Hyoung Kim:
SRAM devices and circuits optimization toward energy efficiency in multi-Vth CMOS. Microelectron. J. 46(3): 265-272 (2015) - [j22]Bo Wang, Truc Quynh Nguyen, Anh-Tuan Do, Jun Zhou, Minkyu Je, Tony Tae-Hyoung Kim:
Design of an Ultra-low Voltage 9T SRAM With Equalized Bitline Leakage and CAM-Assisted Energy Efficiency Improvement. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(2): 441-448 (2015) - [j21]Xin Liu, Jun Zhou, Chao Wang, Kah-Hyong Chang, Jianwen Luo, Jingjing Lan, Lei Liao, Yat-Hei Lam, Yongkui Yang, Bo Wang, Xin Zhang, Wang Ling Goh, Tony Tae-Hyoung Kim, Minkyu Je:
An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing. IEEE Trans. Circuits Syst. II Express Briefs 62-II(12): 1149-1153 (2015) - [j20]Tony Tae-Hyoung Kim, Pong-Fei Lu, Keith A. Jenkins, Chris H. Kim:
A Ring-Oscillator-Based Reliability Monitor for Isolated Measurement of NBTI and PBTI in High-k/Metal Gate Technology. IEEE Trans. Very Large Scale Integr. Syst. 23(7): 1360-1364 (2015) - [j19]Seyed Mohammad Ali Zeinolabedin, Jun Zhou, Xin Liu, Tony Tae-Hyoung Kim:
An Area- and Energy-Efficient FIFO Design Using Error-Reduced Data Compression and Near-Threshold Operation for Image/Video Applications. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2408-2416 (2015) - [c31]Tony T. Kim, Jun Zhou, Yong Lian:
Opportunities and challenges: Ultra-low voltage digital IC design techniques. ASICON 2015: 1-4 - [c30]Seyed Mohammad Ali Zeinolabedin, Jun Zhou, Xin Liu, Tony T. Kim:
A 0.5V power and area efficient Laplacian Pyramid processing engine using FIFO with adaptive data compression. ESSCIRC 2015: 104-107 - [c29]Abhik Das, Yuan Gao, Tony Tae-Hyoung Kim:
A 76% efficiency boost converter with 220mV self-startup and 2nW quiescent power for high resistance thermo-electric energy harvesting. ESSCIRC 2015: 237-240 - [c28]Abhik Das, Yuan Gao, Tony Tae-Hyoung Kim:
An output feedback-based start-up technique with automatic disabling for battery-less energy harvesters. ISCAS 2015: 233-236 - [c27]Seyed Mohammad Ali Zeinolabedin, Anh-Tuan Do, Kiat Seng Yeo, Tony Tae-Hyoung Kim:
Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits. ISCAS 2015: 794-797 - [c26]Anh-Tuan Do, Kiat Seng Yeo, Tony Tae-Hyoung Kim:
A 32kb 9T SRAM with PVT-tracking read margin enhancement for ultra-low voltage operation. ISCAS 2015: 2553-2556 - 2014
- [j18]Anh-Tuan Do, Chun Yin, Kavitha Velayudhan, Zhao Chuan Lee, Kiat Seng Yeo, Tony Tae-Hyoung Kim:
0.77 fJ/bit/search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance. IEEE J. Solid State Circuits 49(7): 1487-1498 (2014) - [j17]Xin Liu, Jun Zhou, Yongkui Yang, Bo Wang, Jingjing Lan, Chao Wang, Jianwen Luo, Wang Ling Goh, Tony Tae-Hyoung Kim, Minkyu Je:
A 457 nW Near-Threshold Cognitive Multi-Functional ECG Processor for Long-Term Cardiac Monitoring. IEEE J. Solid State Circuits 49(11): 2422-2434 (2014) - [j16]Tony Tae-Hyoung Kim, Ngoc Le Ba:
Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C. IEEE J. Solid State Circuits 49(11): 2534-2546 (2014) - [j15]Xiaofei Wang, John Keane, Tony Tae-Hyoung Kim, Pulkit Jain, Qianying Tang, Chris H. Kim:
Silicon Odometers: Compact In Situ Aging Sensors for Robust System Design. IEEE Micro 34(6): 74-85 (2014) - [j14]Myat Thu Linn Aung, Eric Teck Heng Lim, Takefumi Yoshikawa, Tony Tae-Hyoung Kim:
A 3-Gb/s/ch Simultaneous Bidirectional Capacitive Coupling Transceiver for 3DICs. IEEE Trans. Circuits Syst. II Express Briefs 61-II(9): 706-710 (2014) - [c25]Anh-Tuan Do, Zhao Chuan Lee, Bo Wang, Ik-Joon Chang, Tony Tae-Hyoung Kim:
0.2 V 8T SRAM with improved bitline sensing using column-based data randomization. A-SSCC 2014: 141-144 - [c24]Achiranshu Garg, Tony Tae-Hyoung Kim:
Design of SRAM PUF with improved uniformity and reliability utilizing device aging effect. ISCAS 2014: 1941-1944 - [c23]Seyed Mohammad Ali Zeinolabedin, Jun Zhou, Xin Liu, Tony T. Kim:
An area- and power-efficient FIFO with error-reduced data compression for image/video processing. ISCAS 2014: 2277-2280 - 2013
- [j13]Ki Chul Chun, Hui Zhao, Jonathan D. Harms, Tony Tae-Hyoung Kim, Jianping Wang, Chris H. Kim:
A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory. IEEE J. Solid State Circuits 48(2): 598-610 (2013) - [j12]Achiranshu Garg, Tony Tae-Hyoung Kim:
SRAM Array Structures for Energy Efficiency Enhancement. IEEE Trans. Circuits Syst. II Express Briefs 60-II(6): 351-355 (2013) - [j11]Zhao Chuan Lee, Kam Chew Leong, Zhi-Hui Kong, Tony Tae-Hyoung Kim:
NBTI/PBTI-Aware WWL Voltage Control for Half-Selected Cell Stability Improvement. IEEE Trans. Circuits Syst. II Express Briefs 60-II(9): 602-606 (2013) - [c22]Anh Tuan Do, Chun Yin, Kiat Seng Yeo, Tony Tae-Hyoung Kim:
Design of a power-efficient CAM using automated background checking scheme for small match line swing. ESSCIRC 2013: 209-212 - [c21]Anh-Tuan Do, Karthik G. Jayaraman, Pushpapraj Singh, Chua Geng Li, Kiat Seng Yeo, Tony Tae-Hyoung Kim:
Design and array implementation a cantilever-based non-volatile memory utilizing vibrational reset. ESSDERC 2013: 284-287 - [c20]Myat Thu Linn Aung, Eric Teck Heng Lim, Takefumi Yoshikawa, Tony Tae-Hyoung Kim:
Design of self-biased fully differential receiver and crosstalk cancellation for capacitive coupled vertical interconnects in 3DICs. ISCAS 2013: 966-969 - [c19]Anh-Tuan Do, Karthik G. Jayaraman, Vincent Pott, Chua Geng Li, Pushpapraj Singh, Kiat Seng Yeo, Tony Tae-Hyoung Kim:
An improved read/write scheme for anchorless NEMS-CMOS non-volatile memory. ISCAS 2013: 1456-1459 - [c18]Yuan Lin Yeoh, Bo Wang, Xiangyao Yu, Tony T. Kim:
A 0.4V 7T SRAM with write through virtual ground and ultra-fine grain power gating switches. ISCAS 2013: 3030-3033 - 2012
- [j10]Myat Thu Linn Aung, Eric Teck Heng Lim, Takefumi Yoshikawa, Tony Tae-Hyoung Kim:
Design of Simultaneous Bi-Directional Transceivers Utilizing Capacitive Coupling for 3DICs in Face-to-Face Configuration. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(2): 257-265 (2012) - [j9]Tony Tae-Hyoung Kim, Wei Zhang, Chris H. Kim:
An SRAM Reliability Test Macro for Fully Automated Statistical Measurements of VMIN Degradation. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(3): 584-593 (2012) - [j8]Anh-Tuan Do, Truc Quynh Nguyen, Kiat Seng Yeo, Tony Tae-Hyoung Kim:
Sensing Margin Enhancement Techniques for Ultra-Low-Voltage SRAMs Utilizing a Bitline-Boosting Current and Equalized Bitline Leakage. IEEE Trans. Circuits Syst. II Express Briefs 59-II(12): 868-872 (2012) - [c17]Qi Li, Bo Wang, Tony T. Kim:
A 5.61 pJ, 16 kb 9T SRAM with single-ended equalized bitlines and fast local write-back for cell stability improvement. ESSDERC 2012: 201-204 - [c16]Tony T. Kim, Pong-Fei Lu, Chris H. Kim:
Design of ring oscillator structures for measuring isolated NBTI and PBTI. ISCAS 2012: 1580-1583 - [c15]Zhao Chuan Lee, Kim Ming Ho, Zhi-Hui Kong, Tony T. Kim:
NBTI/PBTI-aware wordline voltage control with no boosted supply for stability improvement of half-selected SRAM cells. ISOCC 2012: 200-203 - [c14]Tony T. Kim, Bo Wang, Anh-Tuan Do:
High energy efficient ultra-low voltage SRAM design: Device, circuit, and architecture. ISOCC 2012: 367-370 - 2011
- [c13]Myat Thu Linn Aung, Eric Teck Heng Lim, Takefumi Yoshikawa, Tony Tae-Hyoung Kim:
Design of capacitive-coupling-based simultaneously bi-directional transceivers for 3DIC. 3DIC 2011: 1-4 - [c12]Tony Tae-Hyoung Kim, Zhi-Hui Kong:
Impacts of NBTI/PBTI on SRAM VMIN and design techniques for SRAM VMIN improvement. ISOCC 2011: 163-166 - [c11]Qi Li, Tony T. Kim:
Analysis of SRAM hierarchical bitlines for optimal performance and variation tolerance. ISOCC 2011: 412-415 - 2010
- [j7]John Keane, Tony Tae-Hyoung Kim, Xiaofei Wang, Chris H. Kim:
On-chip reliability monitors for measuring circuit degradation. Microelectron. Reliab. 50(8): 1039-1053 (2010) - [j6]John Keane, Tony Tae-Hyoung Kim, Chris H. Kim:
An On-Chip NBTI Sensor for Measuring pMOS Threshold Voltage Degradation. IEEE Trans. Very Large Scale Integr. Syst. 18(6): 947-956 (2010) - [c10]Qi Li, Tony T. Kim:
A 9T subthreshold SRAM bitcell with data-independent bitline leakage for improved bitline swing and variation tolerance. APCCAS 2010: 260-263
2000 – 2009
- 2009
- [j5]Tony Tae-Hyoung Kim, Jason Liu, Chris H. Kim:
A Voltage Scalable 0.26 V, 64 kb 8T SRAM With Vmin Lowering Techniques and Deep Sleep Mode. IEEE J. Solid State Circuits 44(6): 1785-1795 (2009) - [c9]Tony Tae-Hyoung Kim, Wei Zhang, Chris H. Kim:
An SRAM reliability test macro for fully-automated statistical measurements of Vmin degradation. CICC 2009: 231-234 - 2008
- [j4]Tony Tae-Hyoung Kim, Jason Liu, John Keane, Chris H. Kim:
A 0.2 V, 480 kb Subthreshold SRAM With 1 k Cells Per Bitline for Ultra-Low-Voltage Computing. IEEE J. Solid State Circuits 43(2): 518-529 (2008) - [j3]Tony Tae-Hyoung Kim, Randy Persaud, Chris H. Kim:
Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits. IEEE J. Solid State Circuits 43(4): 874-880 (2008) - [j2]John Keane, Hanyong Eom, Tony Tae-Hyoung Kim, Sachin S. Sapatnekar, Chris H. Kim:
Stack Sizing for Optimal Current Drivability in Subthreshold Circuits. IEEE Trans. Very Large Scale Integr. Syst. 16(5): 598-602 (2008) - [c8]Tony Tae-Hyoung Kim, Jason Liu, Chris H. Kim:
A voltage scalable 0.26V, 64kb 8T SRAM with Vmin lowering techniques and deep sleep mode. CICC 2008: 407-410 - [c7]Tony Tae-Hyoung Kim, Jason Liu, John Keane, Chris H. Kim:
Circuit techniques for ultra-low power subthreshold SRAMs. ISCAS 2008: 2574-2577 - [c6]Pulkit Jain, Tony Tae-Hyoung Kim, John Keane, Chris H. Kim:
A multi-story power delivery technique for 3D integrated circuits. ISLPED 2008: 57-62 - 2007
- [j1]Tony Tae-Hyoung Kim, John Keane, Hanyong Eom, Chris H. Kim:
Utilizing Reverse Short-Channel Effect for Optimal Subthreshold Circuit Design. IEEE Trans. Very Large Scale Integr. Syst. 15(7): 821-829 (2007) - [c5]Tony Tae-Hyoung Kim, Jason Liu, Chris H. Kim:
An 8T Subthreshold SRAM Cell Utilizing Reverse Short Channel Effect for Write Margin and Read Performance Improvement. CICC 2007: 241-244 - [c4]John Keane, Tony Tae-Hyoung Kim, Chris H. Kim:
An on-chip NBTI sensor for measuring PMOS threshold voltage degradation. ISLPED 2007: 189-194 - [c3]Tony Tae-Hyoung Kim, Jason Liu, John Keane, Chris H. Kim:
A High-Density Subthreshold SRAM with Data-Independent Bitline Leakage and Virtual Ground Replica Scheme. ISSCC 2007: 330-606 - 2006
- [c2]John Keane, Hanyong Eom, Tony Tae-Hyoung Kim, Sachin S. Sapatnekar, Chris H. Kim:
Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing. DAC 2006: 425-428 - [c1]Tony Tae-Hyoung Kim, Hanyong Eom, John Keane, Chris H. Kim:
Utilizing reverse short channel effect for optimal subthreshold circuit design. ISLPED 2006: 127-130
Coauthor Index
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