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ORCIDVijay D'Silva
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2010 – 2019
- 2017
[j2]Vijay D'Silva, Caterina Urban:
Abstract Interpretation as Automated Deduction. J. Autom. Reason. 58(3): 363-390 (2017)- 2016
- [c14]Vijay D'Silva, Caterina Urban:
Büchi, Lindenbaum, Tarski: A Program Analysis Appetizer. IJCAI 2016: 4150-4154 - 2015
- [c13]Vijay D'Silva, Caterina Urban:
Abstract Interpretation as Automated Deduction. CADE 2015: 450-464 - [c12]Vijay D'Silva, Caterina Urban:
Conflict-Driven Conditional Termination. CAV (2) 2015: 271-286 - [c11]Kevin Zhijie Chen, Warren He, Devdatta Akhawe, Vijay D'Silva, Prateek Mittal, Dawn Song:
ASPIRE: Iterative Specification Synthesis for Security. HotOS 2015 - [c10]Vijay D'Silva, Mathias Payer, Dawn Xiaodong Song:
The Correctness-Security Gap in Compiler Optimization. IEEE Symposium on Security and Privacy Workshops 2015: 73-87 - 2013
- [c9]Vijay D'Silva:
Generalizing Simulation to Abstract Domains. CONCUR 2013: 485-499 - [c8]Chia Yuan Cho, Vijay D'Silva, Dawn Song:
BLITZ: Compositional bounded model checking for real-world programs. ASE 2013: 136-146 - [c7]Kevin Zhijie Chen, Noah M. Johnson, Vijay D'Silva, Shuaifu Dai, Kyle MacNamara, Thomas R. Magrino, Edward XueJun Wu, Martin C. Rinard, Dawn Xiaodong Song:
Contextual Policy Enforcement in Android Applications with Permission Event Graphs. NDSS 2013 - 2010
- [c6]Vijay D'Silva:
Propositional Interpolation and Abstract Interpretation. ESOP 2010: 185-204
2000 – 2009
- 2009
- [j1]Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran
:
Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis. ACM Trans. Design Autom. Electr. Syst. 14(2): 19:1-19:41 (2009) - 2008
- [c5]Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran:
A Formal Approach To The Protocol Converter Problem. DATE 2008: 294-299 - 2007
- [c4]Vijay D'Silva, Sampada Sonalkar, S. Ramesh:
Existential abstractions for distributed reactive systems via syntactic transformations. EMSOFT 2007: 240-248 - 2004
- [c3]S. Ramesh, Sampada Sonalkar, Vijay D'Silva, Naveen Chandra, B. Vijayalakshmi:
A Toolset for Modelling and Verification of GALS Systems. CAV 2004: 506-509 - [c2]Vijay D'Silva, S. Ramesh, Arcot Sowmya:
Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures. DATE 2004: 390-395 - [c1]Vijay D'Silva, S. Ramesh, Arcot Sowmya:
Bridge Over Troubled Wrappers: Automated Interface Synthesis. VLSI Design 2004: 189-194
Coauthor Index
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