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A formal approach to the protocol converter problem

Published: 10 March 2008 Publication History

Abstract

In the absence of a single module interface standard, integration of pre-designed modules in System-on-Chip design often requires the use of protocol converters. Existing approaches to automatic synthesis of protocol converters mostly lack formal foundations and either employ abstractions that ignore crucial low level behaviors, or grossly simplify the structure of the protocols considered. We present a state-machine based formal model for bus based communication protocols, and precisely define protocol compatibility, and correct protocol conversion. Our model is expressive enough to capture features of commercial protocols such as bursts, pipelined transfers, wait state insertion, and data persistence, in cycle accurate detail. We show that the most general, correct converter for a pair of protocols, can be described as the greatest fixed point of a function for updating buffer states. This characterization yields a natural algorithm for automatic synthesis of a provably correct converter by iterative computation of the fixed point. We report our experience with automatic converter synthesis between widely used commercial bus protocols, such as AMBA AHB, ASB, APB, and OCP, considering features which are beyond the scope of current techniques.

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Cited By

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  • (2015)Automated Synthesis of Protocol Converters with BALM-IIRevised Selected Papers of the SEFM 2015 Collocated Workshops on Software Engineering and Formal Methods - Volume 950910.1007/978-3-662-49224-6_23(281-296)Online publication date: 7-Sep-2015
  • (2012)Correct-by-construction multi-component SoC designProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2492871(647-652)Online publication date: 12-Mar-2012
  • (2012)Inferring Assertion for Complementary SynthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2012.219073531:8(1288-1292)Online publication date: 1-Aug-2012
  • Show More Cited By

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cover image ACM Conferences
DATE '08: Proceedings of the conference on Design, automation and test in Europe
March 2008
1575 pages
ISBN:9783981080131
DOI:10.1145/1403375
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 10 March 2008

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DATE '08: Design, Automation and Test in Europe
March 10 - 14, 2008
Munich, Germany

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

View all
  • (2015)Automated Synthesis of Protocol Converters with BALM-IIRevised Selected Papers of the SEFM 2015 Collocated Workshops on Software Engineering and Formal Methods - Volume 950910.1007/978-3-662-49224-6_23(281-296)Online publication date: 7-Sep-2015
  • (2012)Correct-by-construction multi-component SoC designProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2492871(647-652)Online publication date: 12-Mar-2012
  • (2012)Inferring Assertion for Complementary SynthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2012.219073531:8(1288-1292)Online publication date: 1-Aug-2012
  • (2012)Correct-by-construction multi-component SoC design2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.1109/DATE.2012.6176551(647-652)Online publication date: Mar-2012
  • (2011)Inferring assertion for complementary synthesisProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132424(404-411)Online publication date: 7-Nov-2011
  • (2011)A Halting Algorithm to Determine the Existence of the DecoderIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2011.215979230:10(1556-1563)Online publication date: 1-Oct-2011
  • (2011)Inferring assertion for complementary synthesisProceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design10.1109/ICCAD.2011.6105361(404-411)Online publication date: 7-Nov-2011
  • (2010)A halting algorithm to determine the existence of decoderProceedings of the 2010 Conference on Formal Methods in Computer-Aided Design10.5555/1998496.1998516(91-100)Online publication date: 20-Oct-2010
  • (2010)High-fidelity Markovian power model for protocolsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1870991(267-270)Online publication date: 8-Mar-2010
  • (2010)The 'Best' Valid Safe Protocol ConverterProceedings of the 2010 Fourth International Conference on Secure Software Integration and Reliability Improvement10.1109/SSIRI.2010.21(237-243)Online publication date: 9-Jun-2010
  • Show More Cited By

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