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Ho-Jin Park

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2010 – 2019

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2017
[j2]
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Quoc-Hoang Duong, Huy-Hieu Nguyen, Jeong-Woon Kong, Hyun-Seok Shin, Yu-Seok Ko, Hwa-Yeol Yu, Yong-Hee Lee, Chun-Hyeon Bea, Ho-Jin Park:
Multiple-Loop Design Technique for High-Performance Low-Dropout Regulator. IEEE J. Solid State Circuits 52(10): 2533-2549 (2017)
2016
[c34]
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Kyoungjin Lee, Haneul Kim, Jehyung Yoon, Hyoung-Seok Oh, Byeong-Ha Park, Ho-Jin Park, Yoonmyung Lee:
A high efficiency wide-load-range asynchronous boost converter with time-based dual-mode control for SSD applications. A-SSCC 2016: 13-16
[c33]
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Quoc-Hoang Duong, Jeong-Woon Kong, Hyeon-Seok Shin, Huy-Hieu Nguyen, Pan-Jong Kim, Yu-Seok Ko, Hwa-Yeoul Yu, Ho-Jin Park:
Multiple-loop design technique for high-performance low dropout regulator. A-SSCC 2016: 217-220
[c32]
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Yong-Jin Lee, Min-Yong Jung, Shashank Singh, Tae-Hwang Kong, Dae-Yong Kim, Kwang-Ho Kim, Sang-Ho Kim, Jae-Jin Park, Ho-Jin Park, Gyu-Hyeong Cho:
8.3 A 200mA digital low-drop-out regulator with coarse-fine dual loop in mobile application processors. ISSCC 2016: 150-151
2015
[j1]
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Hyeok-Ki Hong, Wan Kim, Hyun-Wook Kang, Sun-Jae Park, Michael Choi, Ho-Jin Park, Seung-Tak Ryu:
A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC. IEEE J. Solid State Circuits 50(2): 543-555 (2015)
[c31]
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Hyeok-Ki Hong, Hyun-Wook Kang, Dong-Shin Jo, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu:
26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement technique. ISSCC 2015: 1-3
[c30]
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Ba-Ro-Saim Sung, Dong-Shin Jo, Il-Hoon Jang, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu:
26.4 A 21fJ/conv-step 9 ENOB 1.6GS/S 2× time-interleaved FATI SAR ADC with background offset and timing-skew calibration in 45nm CMOS. ISSCC 2015: 1-3
2014
[c29]
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Kiduk Kim, Sanghyub Kang, Yoon-Kyung Choi, Kyung-Hoon Lee, Choong-Hoon Lee, Jin-chul Lee, Michael Choi, Kyungjun Ko, Joonwoo Jung, Namgu Park, Ho-Jin Park, Gyoocheol Hwang:
A fully-differential capacitive touch controller with input common-mode feedback for symmetric display noise cancellation. VLSIC 2014: 1-2
2013
[c28]
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Hyeok-Ki Hong, Hyun-Wook Kang, Barosaim Sung, Choong-Hoon Lee, Michael Choi, Ho-Jin Park, Seung-Tak Ryu:
An 8.6 ENOB 900MS/s time-interleaved 2b/cycle SAR ADC with a 1b/cycle reconfiguration for resolution enhancement. ISSCC 2013: 470-471
2012
[c27]
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Hyeok-Ki Hong, Wan Kim, Sun-Jae Park, Michael Choi, Ho-Jin Park, Seung-Tak Ryu:
A 7b 1GS/s 7.2mW nonbinary 2b/cycle SAR ADC with register-to-DAC direct control. CICC 2012: 1-4
[c26]
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Young-min Park, Tae-In Kwon, Kang-Il Cho, Yong-Sik Kwak, Gil-Cho Ahn, Chang-Seob Shin, Myung-Jin Lee, Seung-Bin You, Ho-Jin Park:
A 1.1 V 82.3dB audio ΔΣ ADC using asynchronous SAR type quantizer. ICECS 2012: 637-640
2010
[c25]
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Young-Ju Kim, Kyung-Hoon Lee, Seung-Hak Ji, Yi-Gi Kwon, Seung-Hoon Lee, Kyoung-Jun Moon, Michael Choi, Ho-Jin Park, Byeong-Ha Park:
A 10b 120MS/s 45nm CMOS ADC using A re-configurable three-stage switched op-amp. CICC 2010: 1-4

2000 – 2009

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2009
[c24]
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Il-Woo Lee, Ho-Jin Park, Kwang-Roh Park:
Service Platform and Social Networking Service Based on Peer-to-Peer Networking. CCNC 2009: 1-2
[c23]
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Sunwoo Kwon, Pavan Kumar Hanumolu, Sang-Ho Kim, Sung-No Lee, Seung-Bin You, Ho-Jin Park, Jae-Whui Kim, Un-Ku Moon:
An 11mW 100MHz 16X-OSR 64dB-SNDR hybrid CT/DT ΔΣ ADC with relaxed DEM timing. CICC 2009: 171-174
[c22]
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Young-Ju Kim, Hee-Cheol Choi, Kyung-Hoon Lee, Gil-Cho Ahn, Seung-Hoon Lee, Ju-Hwa Kim, Kyoung-Jun Moon, Michael Choi, Kyoung-Ho Moon, Ho-Jin Park, Byeong-Ha Park:
A 9.43-ENOB 160MS/s 1.2V 65nm CMOS ADC based on multi-stage amplifiers. CICC 2009: 271-274
2008
[c21]
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Moo-Yeol Choi, Sung-No Lee, Seung-Bin You, Wang-Seup Yeum, Ho-Jin Park, Jae-Whui Kim, Hae-Seung Lee:
A 101-dB SNR hybrid delta-sigma audio ADC using post integration time control. CICC 2008: 89-92
[c20]
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Tae-Hwan Oh, Ho-Young Lee, Ju-Hwa Kim, Ho-Jin Park, Kyoung-Ho Moon, Jae-Whui Kim, Hae-Seung Lee:
A 16b 10MS/s digitally self-calibrated ADC with time constant control. CICC 2008: 113-116
[c19]
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Il-Woo Lee, Moon-Ok Choi, Ho-Jin Park:
A Peer-to-Peer Service Platform Architecture for Extended Home Services. ICN 2008: 285-289
[c18]
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Il-Woo Lee, Moon-Ok Choi, Ho-Jin Park, Kwang-Roh Park:
Social Networking Service Based on Peer-to-Peer Network. ICSNC 2008: 235-238
2007
[c17]
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Young-Ju Kim, Hee-Cheol Choi, Si-Wook Yoo, Seung-Hoon Lee, Dae-Young Chung, Kyoung-Ho Moon, Ho-Jin Park, Jae-Whui Kim:
A Re-configurable 0.5V to 1.2V, 10MS/s to 100MS/s, Low-Power 10b 0.13um CMOS Pipeline ADC. CICC 2007: 185-188
[c16]
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Ho-Young Lee, Tae-Hwan Oh, Ho-Jin Park, Hae-Seung Lee, Mark Spaeth, Jae-Whui Kim:
A 14-b 30MS/s 0.75mm² Pipelined ADC with On-Chip Digital Self-Calibration. CICC 2007: 313-316
2006
[c15]
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Yong-Hee Lee, Moo-Yeol Choi, Seung-Bin You, Wang-Seup Yeum, Ho-Jin Park, Jae-Whui Kim:
A 4mW per-Channel 101dB-DR Stereo Audio DAC with Transformed Quantization Structure. CICC 2006: 145-148
[c14]
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Il-Woo Lee, Ho-Jin Park, Kwang-Roh Park, Sang-Ha Kim:
Developments and Performance Evaluation of Digital-Home Service Delivery & Management Systems. ICN/ICONS/MCL 2006: 23
[c13]
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Il-Woo Lee, Ho-Jin Park, Kwang-Roh Park, Sang-Ha Kim:
A Proposed Platform & Performance Estimation of Digital-Home Service Delivery/Management Systems. ITNG 2006: 713-719
[c12]
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Il-Woo Lee, Ho-Jin Park, Kwang-Roh Park, Sang-Ha Kim:
A Study on Architecture and Performance of Service Delivery Platform in Home Networks. Parallel and Distributed Computing and Networks 2006: 244-249
2005
[c11]
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Ho-Jin Park, Hwa-Sung Kim, Sang-Ho Lee, Youngjin Kim:
Handover Mechanism for Differentiated QoS in High-Speed Portable Internet. ICOIN 2005: 904-911
2004
[c10]
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Soo-Hyoung Lee, Jae-Young Shin, Ho-Young Lee, Ho-Jin Park, Kristian L. Lund, Karsten Nielsen, Jae-Whui Kim:
A 2W, 92% efficiency and 0.01% THD+N class-D audio power amplifier for mobile applications, based on the novel SCOM architecture. CICC 2004: 291-294
[c9]
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Jong-Hoon Lee, Ho-Jin Park:
A new enhanced management approach for heterogeneous service gateways. Communications, Internet, and Information Technology 2004: 122-126
[c8]
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Hyung-Seop Hong, Ho-Jin Park:
The proposal of the home device management mechanism on the heterogeneous residential gateway platform. Communications, Internet, and Information Technology 2004: 620-622
[c7]
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Tae-Hwan Oh, Ho-Young Lee, Ho-Jin Park, Jae-Whui Kim:
A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADC. ISCAS (1) 2004: 9-12
2003
[c6]
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Il-Woo Lee, Ho-Jin Park, Dae-Ung Kim, Sang-Ha Kim:
A Study on B2C Based Electronic Commerce Payment System using the Telephone Number. ISCC 2003: 620-624
2001
[c5]
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Ho-Jin Park, Young-Il Choi, Byung-Sun Lee, Kyung Pyo Jun:
Open Software Architecture for Multiservice Switching System. ICN (2) 2001: 380-389
2000
[c4]
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Sung-Sik Hwang, Ki-Mo Joo, Ho-Jin Park, Jae-Whui Kim, Philip Chung:
A DLL based 10-320 MHz clock synchronizer. ISCAS 2000: 265-268
[c3]
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Seung-Bin You, Ku-Whan Lee, Hee-Cheol Choi, Ho-Jin Park, Jae-Whui Kim, Philip Chung:
A 3.3 V 14-bit 10 MSPS calibration-free CMOS pipelined A/D converter. ISCAS 2000: 435-438
[c2]
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Hee-Cheol Choi, Ho-Jin Park, Shin-Kyu Bae, Jae-Whui Kim, Philip Chung:
A 1.4 V 10-bit 20 MSPS pipelined A/D converter. ISCAS 2000: 439-442
[c1]
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Jaejin Park, Ho-Jin Park, Jae-Whui Kim, Sangnam Seo, Philip Chung:
A 1 mW 10-bit 500KSPS SAR A/D converter. ISCAS 2000: 581-584

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