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ORCIDSebastian Siegfried Prebeck
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2020 – today
- 2024
[b1]Sebastian Siegfried Prebeck:
HW-Acceleration for Edge-AI. Technical University of Munich, Germany, 2024- [c14]Endri Kaja, Nicolas Gerlin, Bihan Zhao, Daniela Sanchez Lopera, Jad Al Halabi, Azam Sher Khan, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker:
An Automated Exhaustive Fault Analysis Technique guided by Processor Formal Verification Methods. ISQED 2024: 1-8 - 2023
- [c13]Saranyu Chattopadhyay
, Keerthikumara Devarajegowda, Bihan Zhao, Florian Lonsing, Brandon A. D'Agostino, Ioanna Vavelidou, Vijay Deep Bhatt, Sebastian Prebeck, Wolfgang Ecker, Caroline Trippel, Clark W. Barrett, Subhasish Mitra:
G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators. DAC 2023: 1-6 - [c12]Nicolas Gerlin, Endri Kaja, Fabian Vargas, Li Lu, Anselm Breitenreiter, Junchao Chen, Markus Ulbricht, Maribel Gomez, Ares Tahiraga, Sebastian Prebeck, Eyck Jentzsch, Milos Krstic, Wolfgang Ecker:
Bits, Flips and RISCs. DDECS 2023: 140-149 - [c11]Mounika Vaddeboina, Endri Kaja, Alper Yilmayer, Sebastian Prebeck, Wolfgang Ecker:
Parallel Golomb-Rice Decoder with 8-bit Unary Decoding for Weight Compression in TinyML Applications. DSD 2023: 227-234 - [c10]Johannes Schreiner, Vasundhara Raje Gontia, Sebastian Prebeck, Wolfgang Ecker:
Generator IP-reuse and Automated Infrastructure Generation for Model-based Full-Chip Generation. MBMV 2023: 1-12 - 2022
- [j1]Daniela Sanchez Lopera, Lorenzo Servadei, Sebastian Siegfried Prebeck, Wolfgang Ecker:
Early RTL delay prediction using neural networks. Microprocess. Microsystems 94: 104671 (2022) - [c9]Sebastian Prebeck, Sathya Ashok, Mounika Vaddeboina, Keerthikumara Devarajegowda, Wolfgang Ecker:
A Scalable, Configurable and Programmable Vector Dot-Product Unit for Edge AI. MBMV 2022: 1-9 - [c8]Sebastian Siegfried Prebeck, Wafic Lawand, Mounika Vaddeboina, Wolfgang Ecker:
A Smart HW-Accelerator for Non-uniform Linear Interpolation of ML-Activation Functions. SAMOS 2022: 267-282 - 2021
- [c7]Oliver Bringmann, Wolfgang Ecker, Ingo Feldner, Adrian Frischknecht, Christoph Gerum, Timo Hämäläinen, Muhammad Abdullah Hanif, Michael J. Klaiber, Daniel Mueller-Gritschneder, Paul Palomero Bernardo, Sebastian Siegfried Prebeck, Muhammad Shafique:
Automated HW/SW co-design for edge AI: state, challenges and steps ahead. CODES+ISSS 2021: 11-20 - [c6]Keerthikumara Devarajegowda, Endri Kaja, Sebastian Siegfried Prebeck, Wolfgang Ecker:
ISA Modeling with Trace Notation for Context Free Property Generation. DAC 2021: 619-624 - [c5]Endri Kaja, Nicolas Gerlin, Mounika Vaddeboina, Luis Rivas, Sebastian Siegfried Prebeck, Zhao Han, Keerthikumara Devarajegowda, Wolfgang Ecker:
Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models. DFT 2021: 1-6 - [c4]Daniela Sanchez Lopera, Lorenzo Servadei, Vishwa Priyanka Kasi, Sebastian Siegfried Prebeck, Wolfgang Ecker:
RTL Delay Prediction Using Neural Networks. NorCAS 2021: 1-7 - [c3]Zhao Han, Deyan Wang, Gabriel Rutsch, Bowen Li, Sebastian Siegfried Prebeck, Daniela Sanchez Lopera, Keerthikumara Devarajegowda, Wolfgang Ecker:
Aspect-Oriented Design Automation with Model Transformation. VLSI-SoC 2021: 1-6 - [c2]Zhao Han, Gabriel Rutsch, Deyan Wang, Bowen Li, Sebastian Siegfried Prebeck, Daniela Sanchez Lopera, Keerthikumara Devarajegowda, Wolfgang Ecker:
Transformative Hardware Design Following the Model-Driven Architecture Vision. VLSI-SoC (Selected Papers) 2021: 49-70 - 2020
- [c1]Michael Werner, Igli Zeraliu, Zhao Han, Sebastian Siegfried Prebeck, Lorenzo Servadei, Wolfgang Ecker:
Optimized HW/FW Generation from an Abstract Register Interface Model. DSD 2020: 35-39
Coauthor Index
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