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2020 – today
- 2024
[j73]Ramesh Karri, Janusz Rajski, Rob Aitken, Subhasish Mitra, Mark M. Tehranipoor:
VLSI Test and Trust Roundtable. IEEE Des. Test 41(6): 84-94 (2024)- [j72]Akash Levy
, Luke R. Upton, Michael D. Scott, Dennis Rich, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Boris Murmann, Priyanka Raina:
EMBER: Efficient Multiple-Bits-Per-Cell Embedded RRAM Macro for High-Density Digital Storage. IEEE J. Solid State Circuits 59(7): 2081-2092 (2024) - [c182]Erik Jan Marinissen, Harish Dattatraya Dixit, Ronald Shawn Blanton, Aaron Kuo, Wei Li, Subhasish Mitra, Chris Nigh, Ruben Purdy, Ben Kaczer, Dishant Sangani, Pieter Weckx, Philippe J. Roussel, Georges G. E. Gielen:
Silent Data Corruption: Test or Reliability Problem? ETS 2024: 1-7 - [c181]Chris Nigh, Ruben Purdy, Wei Li, Subhasish Mitra, R. D. Shawn Blanton:
Faulty Function Extraction for Defective Circuits. ETS 2024: 1-6 - [c180]Kartik Prabhu, Robert M. Radway, Y. Jeffrey, Kai Bartolone, Massimo Giordano, Fabian Peddinghaus, Yonatan Urman, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Priyanka Raina:
MINOTAUR: An Edge Transformer Inference and Training Accelerator with 12 MBytes On-Chip Resistive RAM and Fine-Grained Spatiotemporal Power Gating. VLSI Technology and Circuits 2024: 1-2 - [c179]Nathaniel Safron, Tzu-Ang Chao, Shengman Li, Shreyam Natani, San Lin Liew, Carlo Gilardi, Hsin-Yuan Chiu, Sheng-Kai Su, Andrew Bechdolt, Gilad Zeevi, Zichen Zhang, Matthias Passlack, Vincent D.-H. Hou, Harshil Kashyap, Chao-Hsin Chien, Prabhakar Bandaru, Andrew C. Kummel, H.-S. Philip Wong, Subhasish Mitra, Gregory Pitner, Iuliana P. Radu:
High Performance Transistor of Aligned Carbon Nanotubes in a Nanosheet Structure. VLSI Technology and Circuits 2024: 1-2 - [i17]Tathagata Srimani, Robert M. Radway, Masoud Mohseni, Kerem Yunus Çamsari, Subhasish Mitra:
Next-generation Probabilistic Computing Hardware with 3D MOSAICs, Illusion Scale-up, and Co-design. CoRR abs/2409.11422 (2024) - [i16]Suhyeong Choi, Carlo Gilardi, Paul Gutwin, Robert M. Radway, Tathagata Srimani, Subhasish Mitra:
Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock. CoRR abs/2409.16608 (2024) - 2023
- [j71]Gert Cauwenberghs, Jason Cong, X. Sharon Hu, Siddharth Joshi, Subhasish Mitra, Wolfgang Porod, H.-S. Philip Wong:
Micro/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities. Proc. IEEE 111(6): 561-574 (2023) - [j70]Mohammad Rahmani Fadiheh, Alex Wezel, Johannes Müller, Jörg Bormann, Sayak Ray, Jason M. Fung, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz:
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors. IEEE Trans. Computers 72(1): 222-235 (2023) - [c178]Saranyu Chattopadhyay, Keerthikumara Devarajegowda, Bihan Zhao, Florian Lonsing, Brandon A. D'Agostino, Ioanna Vavelidou, Vijay Deep Bhatt, Sebastian Prebeck, Wolfgang Ecker, Caroline Trippel, Clark W. Barrett, Subhasish Mitra:
G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators. DAC 2023: 1-6 - [c177]Dennis Rich, Anna Kasperovich, Mohamadali Malakoutian, Robert M. Radway, Shiho Hagiwara, Takahide Yoshikawa, Srabanti Chowdhury, Subhasish Mitra:
Thermal Scaffolding for Ultra-Dense 3D Integrated Circuits. DAC 2023: 1-6 - [c176]Tathagata Srimani, Robert M. Radway, Jinwoo Kim, Kartik Prabhu, Dennis Rich, Carlo Gilardi, Priyanka Raina, Max M. Shulaker, Sung Kyu Lim, Subhasish Mitra:
Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits. DATE 2023: 1-6 - [c175]Luke R. Upton, Akash Levy, Michael D. Scott, Dennis Rich, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Priyanka Raina, Boris Murmann:
EMBER: A 100 MHz, 0.86 mm2, Multiple-Bits-per-Cell RRAM Macro in 40 nm CMOS with Compact Peripherals and 1.0 pJ/bit Read Circuitry. ESSCIRC 2023: 469-472 - [c174]Anjiang Wei, Akash Levy, Pu Yi, Robert M. Radway, Priyanka Raina, Subhasish Mitra, Sara Achour:
PBA: Percentile-Based Level Allocation for Multiple-Bits-Per-Cell RRAM. ICCAD 2023: 1-9 - [c173]Lizy K. John, Felipe M. G. França, Subhasish Mitra, Zachary Susskind, Priscila M. V. Lima, Igor D. S. Miranda, Eugene B. John, Diego L. C. Dutra, Maurício Breternitz:
Dendrite-inspired Computing to Improve Resilience of Neural Networks to Faults in Emerging Memory Technologies. ICRC 2023: 1-5 - [c172]Luke R. Upton, Guénolé Lallement, Michael D. Scott, Joyce Taylor, Robert M. Radway, Dennis Rich, Mark Nelson, Subhasish Mitra, Boris Murmann:
Testbench on a Chip: A Yield Test Vehicle for Resistive Memory Devices. ISQED 2023: 1-7 - [c171]Andrew M. Bartolo, Mohamed M. Sabry Aly, George Michelogiannakis, Subhasish Mitra:
MC-ELMM: Multi-Chip Endurance-Limited Memory Management. MEMSYS 2023: 23:1-23:16 - [c170]Amrith Lotlikar, Nishal P. Shah, Alex R. Gogliettino, Ramandeep Vilkhu, Sasidhar Madugula, Lauren E. Grosberg, Pawel Hottowy, Alexander Sher, Alan M. Litke, E. J. Chichilnisky, Subhasish Mitra:
Partitioned Temporal Dithering for Efficient Epiretinal Electrical Stimulation. NER 2023: 1-5 - [c169]Praful K. Vasireddy, Alex R. Gogliettino, Jeff B. Brown, Ramandeep S. Vilkhu, Sasidhar Madugula, A. J. Phillips, Subhasish Mitra, Pawel Hottowy, Alexander Sher, Alan M. Litke, Nishal P. Shah, E. J. Chichilnisky:
Efficient Modeling and Calibration of Multi-Electrode Stimuli for Epiretinal Implants. NER 2023: 1-4 - [c168]Gregory Pitner, Nathaniel Safron, Tzu-Ang Chao, Shengman Li, Sheng-Kai Su, Gilad Zeevi, Qing Lin, Hsin-Yuan Chiu, Matthias Passlack, Zichen Zhang, D. Mahaveer Sathaiya, Aslan Wei, Carlo Gilardi, Edward Chen, San Lin Liew, Vincent D.-H. Hou, Chung-Wei Wu, Jeff Wu, Zhiwei Lin, Jeffrey Fagan, Ming Zheng, Han Wang, Subhasish Mitra, H.-S. Philip Wong, Iuliana P. Radu:
Building high performance transistors on carbon nanotube channel. VLSI Technology and Circuits 2023: 1-2 - [c167]Tathagata Srimani, Andrew C. Yu, Robert M. Radway, Dennis Rich, Mark Nelson, Simon S. Wong, Denis Murphy, Samuel Fuller, Gage Hills, Subhasish Mitra, Max M. Shulaker:
Foundry Monolithic 3D BEOL Transistor + Memory Stack: Iso-performance and Iso-footprint BEOL Carbon Nanotube FET+RRAM vs. FEOL Silicon FET+RRAM. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j69]Kartik Prabhu, Albert Gural, Zainab F. Khan, Robert M. Radway, Massimo Giordano, Kalhan Koul, Rohan Doshi, John W. Kustin, Timothy Liu, Gregorio B. Lopes, Victor Turbiner, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Guénolé Lallement, Boris Murmann, Subhasish Mitra, Priyanka Raina:
CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference. IEEE J. Solid State Circuits 57(4): 1013-1026 (2022) - [j68]Lita Yang, Robert M. Radway, Yu-Hsin Chen, Tony F. Wu, Huichu Liu, Elnaz Ansari, Vikas Chandra, Subhasish Mitra, Edith Beigné:
Three-Dimensional Stacked Neural Network Accelerator Architectures for AR/VR Applications. IEEE Micro 42(6): 116-124 (2022) - [c166]Wei Li, Chris Nigh, Danielle Duvalsaint, Subhasish Mitra, Ronald D. Blanton:
PEPR: Pseudo-Exhaustive Physically-Aware Region Testing. ITC 2022: 314-323 - [i15]Richard A. Gottscho, Edlyn V. Levine, Tsu-Jae King Liu, Paul C. McIntyre, Subhasish Mitra, Boris Murmann, Jan M. Rabaey, Sayeef S. Salahuddin, Willy C. Shih, H.-S. Philip Wong:
Innovating at Speed and at Scale: A Next Generation Infrastructure for Accelerating Semiconductor Technologies. CoRR abs/2204.02216 (2022) - 2021
- [j67]Samuel Pagliarini, Joseph Sweeney, Ken Mai, R. D. Shawn Blanton, Larry T. Pileggi, Subhasish Mitra:
Split-Chip Design to Prevent IP Reverse Engineering. IEEE Des. Test 38(4): 109-118 (2021) - [c165]Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni, Deepraj Soni, Peng Wei, Xiaofan Zhang, Yuan Zhou, Luca P. Carloni, Deming Chen, Jason Cong, Ramesh Karri, Zhiru Zhang, Caroline Trippel, Clark W. Barrett, Subhasish Mitra:
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition. FMCAD 2021: 42-52 - [c164]Massimo Giordano, Kartik Prabhu, Kalhan Koul, Robert M. Radway, Albert Gural, Rohan Doshi, Zainab F. Khan, John W. Kustin, Timothy Liu, Gregorio B. Lopes, Victor Turbiner, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Guénolé Lallement, Boris Murmann, Subhasish Mitra, Priyanka Raina:
CHIMERA: A 0.92 TOPS, 2.2 TOPS/W Edge AI Accelerator with 2 MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference. VLSI Circuits 2021: 1-2 - [i14]Karthik Ganesan, Florian Lonsing, Srinivasa Shashank Nuthakki, Eshan Singh, Mohammad Rahmani Fadiheh, Wolfgang Kunz, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra:
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection. CoRR abs/2106.10392 (2021) - [i13]Mohammad Rahmani Fadiheh, Alex Wezel, Johannes Müller, Jörg Bormann, Sayak Ray, Jason M. Fung, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz:
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors. CoRR abs/2108.01979 (2021) - [i12]Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni, Deepraj Soni, Peng Wei, Xiaofan Zhang, Yuan Zhou, Luca P. Carloni, Deming Chen, Jason Cong, Ramesh Karri, Zhiru Zhang, Caroline Trippel, Clark W. Barrett, Subhasish Mitra:
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition. CoRR abs/2108.06081 (2021) - 2020
- [j66]H.-S. Philip Wong, Kerem Akarvardar, Dimitri A. Antoniadis, Jeffrey Bokor, Chenming Hu, Tsu-Jae King Liu, Subhasish Mitra, James D. Plummer, Sayeef S. Salahuddin:
A Density Metric for Semiconductor Technology [Point of View]. Proc. IEEE 108(4): 478-482 (2020) - [j65]H.-S. Philip Wong, Kerem Akarvardar, Dimitri A. Antoniadis, Jeffrey Bokor, Chenming Hu, Tsu-Jae King Liu, Subhasish Mitra, James D. Plummer, Sayeef S. Salahuddin, Lei Deng, Xin-Guo Li, Song Han, Luping Shi, Yuan Xie, Elias Yaacoub, Mohamed-Slim Alouini, Ahmed Douik, Hayssam Dahrouj, Tareq Y. Al-Naffouri:
Scanning the Issue. Proc. IEEE 108(4): 483-484 (2020) - [c163]Jianqi Chen, Monir Zaman, Yiorgos Makris, R. D. Shawn Blanton, Subhasish Mitra, Benjamin Carrión Schäfer:
DECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY. DAC 2020: 1-6 - [c162]Mohammad Rahmani Fadiheh, Johannes Müller, Raik Brinkmann, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz:
A Formal Approach for Detecting Vulnerabilities to Transient Execution Attacks in Out-of-Order Processors. DAC 2020: 1-6 - [c161]Eshan Singh, Florian Lonsing, Saranyu Chattopadhyay, Maxwell Strange, Peng Wei, Xiaofan Zhang, Yuan Zhou, Deming Chen, Jason Cong, Priyanka Raina, Zhiru Zhang, Clark W. Barrett, Subhasish Mitra:
A-QED Verification of Hardware Accelerators. DAC 2020: 1-6 - [c160]Keerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz:
Gap-free Processor Verification by S2QED and Property Generation. DATE 2020: 526-531 - [c159]Florian Lonsing, Subhasish Mitra, Clark W. Barrett:
A Theoretical Framework for Symbolic Quick Error Detection. FMCAD 2020: 1-10 - [c158]Karthik Ganesan, Thomas A. Flores, Binh Q. Le, Dante G. Muratore, Neal A. Patel, Subhasish Mitra, Boris Murmann, Daniel Palanker:
Sensory Particles with Optical Telemetry. ISCAS 2020: 1-5 - [c157]Roman Gauchi, Valentin Egloff, Maha Kooli, Jean-Philippe Noël, Bastien Giraud, Pascal Vivet, Subhasish Mitra, Henri-Pierre Charles:
Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization. ISLPED 2020: 121-126 - [c156]David Atienza, Subhasish Mitra, Manan Suri:
Message from the Technical Program Co-Chairs. VLSID 2020: i - [i11]Florian Lonsing, Subhasish Mitra, Clark W. Barrett:
A Theoretical Framework for Symbolic Quick Error Detection. CoRR abs/2006.05449 (2020)
2010 – 2019
- 2019
- [j64]Rajesh K. Gupta, Subhasish Mitra, Puneet Gupta:
Variability Expeditions: A Retrospective. IEEE Des. Test 36(1): 65-67 (2019) - [j63]Mindy D. Bishop, H.-S. Philip Wong, Subhasish Mitra, Max M. Shulaker:
Monolithic 3-D Integration. IEEE Micro 39(6): 16-27 (2019) - [j62]Mohamed M. Sabry Aly, Tony F. Wu, Andrew Bartolo, Yash H. Malviya, William Hwang, Gage Hills, Igor L. Markov, Mary Wootters, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra:
The N3XT Approach to Energy-Efficient Abundant-Data Computing. Proc. IEEE 107(1): 19-48 (2019) - [j61]Dante Gabriel Muratore, Pulkit Tandon, Mary Wootters, E. J. Chichilnisky, Subhasish Mitra, Boris Murmann:
A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording. IEEE Trans. Biomed. Circuits Syst. 13(6): 1128-1140 (2019) - [j60]Keith A. Campbell, David Lin, Leon He, Liwei Yang, Swathi T. Gurumani, Kyle Rupnow, Subhasish Mitra, Deming Chen:
Hybrid Quick Error Detection: Validation and Debug of SoCs Through High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(7): 1345-1358 (2019) - [c155]Eric Cheng, Daniel Mueller-Gritschneder, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Deming Chen, Hyungmin Cho, Yanjing Li, Uzair Sharif, Kevin Skadron, Mircea Stan, Ulf Schlichtmann, Subhasish Mitra:
Cross-Layer Resilience: Challenges, Insights, and the Road Ahead. DAC 2019: 198 - [c154]Mohammad Rahmani Fadiheh, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra, Wolfgang Kunz:
Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking. DATE 2019: 994-999 - [c153]Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra:
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. DATE 2019: 1000-1005 - [c152]Georges G. E. Gielen, Nektar Xama, Karthik Ganesan, Subhasish Mitra:
Review of Methodologies for Pre- and Post-Silicon Analog Verification in Mixed-Signal SOCs. DATE 2019: 1006-1009 - [c151]Florian Lonsing, Karthik Ganesan, Makai Mann, Srinivasa Shashank Nuthakki, Eshan Singh, Mario Srouji, Yahan Yang, Subhasish Mitra, Clark W. Barrett:
Unlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED: Invited Paper. ICCAD 2019: 1-8 - [c150]Dante G. Muratore, Pulkit Tandon, Mary Wootters, E. J. Chichilnisky, Subhasish Mitra, Boris Murmann:
A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording. ISCAS 2019: 1-5 - [c149]Tony F. Wu, Binh Q. Le, Robert M. Radway, Andrew Bartolo, William Hwang, Seungbin Jeong, Haitong Li, Pulkit Tandon, Elisa Vianello, Pascal Vivet, Etienne Nowak, Mary Wootters, H.-S. Philip Wong, Mohamed M. Sabry Aly, Edith Beigné, Subhasish Mitra:
A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques. ISSCC 2019: 226-228 - [c148]Nishal P. Shah, Sasidhar Madugula, Lauren E. Grosberg, Gonzalo E. Mena, Pulkit Tandon, Pawel Hottowy, Alexander Sher, Alan M. Litke, Subhasish Mitra, E. J. Chichilnisky:
Optimization of Electrical Stimulation for a High-Fidelity Artificial Retina. NER 2019: 714-718 - [c147]Roman Gauchi, Maha Kooli, Pascal Vivet, Jean-Philippe Noël, Edith Beigné, Subhasish Mitra, Henri-Pierre Charles:
Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture. VLSI-SoC 2019: 166-171 - [i10]Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra:
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. CoRR abs/1902.01494 (2019) - 2018
- [j59]Tony F. Wu, Haitong Li, Ping-Chen Huang, Abbas Rahimi, Gage Hills, Bryce Hodson, William Hwang, Jan M. Rabaey, H.-S. Philip Wong, Max M. Shulaker, Subhasish Mitra:
Hyperdimensional Computing Exploiting Carbon Nanotube FETs, Resistive RAM, and Their Monolithic 3D Integration. IEEE J. Solid State Circuits 53(11): 3183-3196 (2018) - [j58]Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra:
Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(9): 1839-1852 (2018) - [c146]Gage Hills, Daniel Bankman, Bert Moons, Lita Yang, Jake Hillard, Alex Kahng, Rebecca Park, Marian Verhelst, Boris Murmann, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra:
TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs. DAC 2018: 74:1-74:10 - [c145]Mohammad Rahmani Fadiheh, Joakim Urdahl, Srinivasa Shashank Nuthakki, Subhasish Mitra, Clark W. Barrett, Dominik Stoffel, Wolfgang Kunz:
Symbolic quick error detection using symbolic initial state for pre-silicon verification. DATE 2018: 55-60 - [c144]Daniel Mueller-Gritschneder, Martin Dittrich, Josef Weinzierl, Eric Cheng, Subhasish Mitra, Ulf Schlichtmann:
ETISS-ML: A multi-level instruction set simulator with RTL-level fault injection support for the evaluation of cross-layer resiliency techniques. DATE 2018: 609-612 - [c143]William Hwang, Weier Wan, Subhasish Mitra, H.-S. Philip Wong:
Coming Up N3XT, After 2D Scaling of Si CMOS. ISCAS 2018: 1-5 - [c142]Tony F. Wu, Haitong Li, Ping-Chen Huang, Abbas Rahimi, Jan M. Rabaey, H.-S. Philip Wong, Max M. Shulaker, Subhasish Mitra:
Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study. ISSCC 2018: 492-494 - [c141]Subhasish Mitra:
Abundant-data computing: The N3XT 1, 000X. VLSI-DAT 2018: 1 - [i9]Abbas Rahimi, Tony F. Wu, Haitong Li, Jan M. Rabaey, H.-S. Philip Wong, Max M. Shulaker, Subhasish Mitra:
Hyperdimensional Computing Nanosystem. CoRR abs/1811.09557 (2018) - [i8]Mohammad Rahmani Fadiheh, Dominik Stoffel, Clark W. Barrett, Subhasish Mitra, Wolfgang Kunz:
Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking. CoRR abs/1812.04975 (2018) - 2017
- [j57]Michael J. Flynn, Subhasish Mitra:
Edward J. McCluskey 1929-2016. IEEE Des. Test 34(2): 94-98 (2017) - [j56]Dennis Sylvester, Dejan Markovic, Roman Genov, Atsushi Kawasumi, Subhasish Mitra:
Introduction to the January Special Issue on the 2016 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 52(1): 3-7 (2017) - [j55]Bryan Chin, Subhasish Mitra:
Hot Chips 28. IEEE Micro 37(2): 5-6 (2017) - [j54]Hyungmin Cho, Eric Cheng, Thomas Shepherd, Chen-Yong Cher, Subhasish Mitra:
System-Level Effects of Soft Errors in Uncore Components. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1497-1510 (2017) - [j53]Haitong Li, Tony F. Wu, Subhasish Mitra, H.-S. Philip Wong:
Resistive RAM-Centric Computing: Design and Modeling Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2263-2273 (2017) - [c140]Subhasish Mitra, Deming Chen:
ASP-DAC 2017 keynote speech I: In memory of Edward J. McCluskey: The next wave of pioneering innovations. ASP-DAC 2017: 1 - [c139]Eshan Singh, Clark W. Barrett, Subhasish Mitra:
E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods. CAV (2) 2017: 104-125 - [c138]William Hwang, Mohamed M. Sabry Aly, Yash H. Malviya, Mingyu Gao, Tony F. Wu, Christos Kozyrakis, H.-S. Philip Wong, Subhasish Mitra:
3D nanosystems enable embedded abundant-data computing: special session paper. CODES+ISSS 2017: 29:1-29:2 - [c137]Ameya Patil, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young:
A Systems Approach to Computing in Beyond CMOS Fabrics: Invited. DAC 2017: 18:1-18:2 - [c136]Eric Cheng, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Keith A. Campbell, Deming Chen, Chen-Yong Cher, Hyungmin Cho, Binh Q. Le, Klas Lilja, Shahrzad Mirkhani, Kevin Skadron, Mircea Stan, Lukasz G. Szafaryn, Christos Vezyrtzis, Subhasish Mitra:
Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights. ICCD 2017: 593-596 - [c135]Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler:
Very Low Voltage (VLV) Design. ICCD 2017: 601-604 - [i7]Eshan Singh, Clark W. Barrett, Subhasish Mitra:
E-QED: Electrical Bug Localization During Post-Silicon Validation Enabled by Quick Error Detection and Formal Methods. CoRR abs/1707.07671 (2017) - [i6]Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra:
Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience). CoRR abs/1709.09921 (2017) - [i5]Eshan Singh, David Lin, Clark W. Barrett, Subhasish Mitra:
Logic Bug Detection and Localization Using Symbolic Quick Error Detection. CoRR abs/1711.06541 (2017) - 2016
- [j52]Eshan Singh, David Lin, Clark W. Barrett, Subhasish Mitra:
Symbolic Quick Error Detection for Pre-Silicon and Post-Silicon Validation: Frequently Asked Questions. IEEE Des. Test 33(6): 55-62 (2016) - [j51]Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra:
TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(4): 521-534 (2016) - [j50]Georges G. E. Gielen, Jelle Van Rethy, Jorge Marin, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra:
Time-Based Sensor Interface Circuits in CMOS and Carbon Nanotube Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(5): 577-586 (2016) - [c134]Rubén Braojos, David Atienza, Mohamed M. Sabry Aly, Tony F. Wu, H.-S. Philip Wong, Subhasish Mitra, Giovanni Ansaloni:
Nano-engineered architectures for ultra-low power wireless body sensor nodes. CODES+ISSS 2016: 23:1-23:10 - [c133]Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra:
Clear: cross-layer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores. DAC 2016: 68:1-68:6 - [c132]Subhasish Mitra:
Cross-layer resilience. ETS 2016: 1 - [c131]Antoine Dupret, Subhasish Mitra:
Session 24 overview: Ultra-efficient computing: Application-inspired and analog-assisted digital. ISSCC 2016: 414-415 - [c130]Subhasish Mitra:
Transforming nanodevices into nanosystems: The N3XT 1, 000X. LATS 2016: 6 - [c129]Max Marcel Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra:
Transforming nanodevices to next generation nanosystems. SAMOS 2016: 288-292 - [i4]Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra:
CLEAR: Cross-Layer Exploration for Architecting Resilience - Combining Hardware and Software Techniques to Tolerate Soft Errors in Processor Cores. CoRR abs/1604.03062 (2016) - 2015
- [j49]Mohamed M. Sabry, Mingyu Gao, Gage Hills, Chi-Shuen Lee, Greg Pitner, Max M. Shulaker, Tony F. Wu, Mehdi Asheghi, Jeffrey Bokor, Franz Franchetti, Kenneth E. Goodson, Christos Kozyrakis, Igor L. Markov, Kunle Olukotun, Larry T. Pileggi, Eric Pop, Jan M. Rabaey, Christopher Ré, H.-S. Philip Wong, Subhasish Mitra:
Energy-Efficient Abundant-Data Computing: The N3XT 1, 000x. Computer 48(12): 24-33 (2015) - [j48]Lucas Francisco Wanner, Liangzhen Lai, Abbas Rahimi, Mark Gottscho, Pietro Mercati, Chu-Hsiang Huang, Frederic Sala, Yuvraj Agarwal, Lara Dolecek, Nikil D. Dutt, Puneet Gupta, Rajesh K. Gupta, Ranjit Jhala, Rakesh Kumar, Sorin Lerner, Subhasish Mitra, Alexandru Nicolau, Tajana Simunic Rosing, Mani B. Srivastava, Steven Swanson, Dennis Sylvester, Yuanyuan Zhou:
NSF expedition on variability-aware software: Recent results and contributions. it Inf. Technol. 57(3): 181-198 (2015) - [j47]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli:
New Logic Synthesis as Nanotechnology Enabler. Proc. IEEE 103(11): 2168-2195 (2015) - [j46]Gage Hills, Jie Zhang, Max Marcel Shulaker, Hai Wei, Chi-Shuen Lee, Arjun Balasingam, H.-S. Philip Wong, Subhasish Mitra:
Rapid Co-Optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(7): 1082-1095 (2015) - [c128]Luca Gaetano Amarù, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli:
Multiple Independent Gate FETs: How many gates do we need? ASP-DAC 2015: 243-248 - [c127]Keith A. Campbell, David Lin, Subhasish Mitra, Deming Chen:
Hybrid quick error detection (H-QED): accelerator validation and debug using high-level synthesis principles. DAC 2015: 53:1-53:6 - [c126]Hyungmin Cho, Chen-Yong Cher, Thomas Shepherd, Subhasish Mitra:
Understanding soft errors in uncore components. DAC 2015: 89:1-89:6 - [c125]Shahrzad Mirkhani, Subhasish Mitra, Chen-Yong Cher, Jacob A. Abraham:
Efficient soft error vulnerability estimation of complex designs. DATE 2015: 103-108 - [c124]David Lin, Eswaran S, Sharad Kumar, Eric Rentschler, Subhasish Mitra:
Quick error detection tests with fast runtimes for effective post-silicon validation and debug. DATE 2015: 1168-1173 - [c123]Max M. Shulaker, Tony F. Wu, Mohamed M. Sabry, Hai Wei, H.-S. Philip Wong, Subhasish Mitra:
Monolithic 3D integration: a path from concept to reality. DATE 2015: 1197-1202 - [c122]Georges G. E. Gielen, Jelle Van Rethy, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra:
Time-based sensor interface circuits in carbon nanotube technology. ISCAS 2015: 2924-2927 - [c121]David Lin, Eshan Singh, Clark W. Barrett, Subhasish Mitra:
A structured approach to post-silicon validation and debug using symbolic quick error detection. ITC 2015: 1-10 - [i3]Hyungmin Cho, Chen-Yong Cher, Thomas Shepherd, Subhasish Mitra:
Understanding Soft Errors in Uncore Components. CoRR abs/1504.01381 (2015) - [i2]Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra:
TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits. CoRR abs/1505.02211 (2015) - [i1]Gage Hills, Jie Zhang, Max Marcel Shulaker, Hai Wei, Chi-Shuen Lee, Arjun Balasingam, H.-S. Philip Wong, Subhasish Mitra:
Rapid Co-optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations. CoRR abs/1507.05679 (2015) - 2014
- [j45]Augusto Vega, Simha Sethumadhavan, Subhasish Mitra:
Guest Editorial: Robust and energy-secure systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(2): 165-168 (2014) - [j44]Marc Snir, Robert W. Wisniewski, Jacob A. Abraham, Sarita V. Adve, Saurabh Bagchi, Pavan Balaji, James F. Belak, Pradip Bose, Franck Cappello, Bill Carlson, Andrew A. Chien, Paul Coteus, Nathan DeBardeleben, Pedro C. Diniz, Christian Engelmann, Mattan Erez, Saverio Fazzari, Al Geist, Rinku Gupta, Fred Johnson, Sriram Krishnamoorthy, Sven Leyffer, Dean Liberty, Subhasish Mitra, Todd S. Munson, Rob Schreiber, Jon Stearley, Eric Van Hensbergen:
Addressing failures in exascale computing. Int. J. High Perform. Comput. Appl. 28(2): 129-173 (2014) - [j43]Shashikanth Bobba, Jie Zhang, Pierre-Emmanuel Gaillardon, H.-S. Philip Wong, Subhasish Mitra, Giovanni De Micheli:
System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits. ACM J. Emerg. Technol. Comput. Syst. 10(4): 33:1-33:19 (2014) - [j42]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hai Wei, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Sensor-to-Digital Interface Built Entirely With Carbon Nanotube FETs. IEEE J. Solid State Circuits 49(1): 190-201 (2014) - [j41]David Lin, Ted Hong, Yanjing Li, Eswaran S, Sharad Kumar, Farzan Fallah, Nagib Hakim, Donald S. Gardner, Subhasish Mitra:
Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(10): 1573-1590 (2014) - [c120]Shahrzad Mirkhani, Hyungmin Cho, Subhasish Mitra, Jacob A. Abraham:
Rethinking error injection for effective resilience. ASP-DAC 2014: 390-393 - [c119]David Lin, Subhasish Mitra:
QED post-silicon validation and debug: Frequently asked questions. ASP-DAC 2014: 478-482 - [c118]Gage Hills, Max M. Shulaker, Hai Wei, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra:
Robust design and experimental demonstrations of carbon nanotube digital circuits. CICC 2014: 1-4 - [c117]Vikas Chandra, Subhasish Mitra, Chen-Yong Cher, Silvia Melitta Müller:
Cross layer resiliency in real world. DATE 2014: 1 - [c116]David Lin, Subhasish Mitra:
QED post-silicon validation and debug: Invited abstract. ISIC 2014: 62 - [c115]Subhasish Mitra:
Carbon nanotube computer: transforming scientific discoveries into working systems. ISPD 2014: 117-118 - [c114]Jacqueline Woods, Sridhar Iyengar, Amit Sinha, Subhasish Mitra, Stacy Cannady:
A new era of computing: Are you "ready now" to build a smarter and secured enterprise? ISQED 2014: 1 - [c113]Michael Purtell, Subhasish Mitra:
Welcome message. ITC 2014: 1-2 - [c112]Subhasish Mitra, Pradip Bose, Eric Cheng, Chen-Yong Cher, Hyungmin Cho, Rajiv V. Joshi, Young Moon Kim, Charles R. Lefurgy, Yanjing Li, Kenneth P. Rodbell, Kevin Skadron, James H. Stathis, Lukasz G. Szafaryn:
The resilience wall: Cross-layer solution strategies. VLSI-DAT 2014: 1-11 - 2013
- [j40]Puneet Gupta, Yuvraj Agarwal, Lara Dolecek, Nikil D. Dutt, Rajesh K. Gupta, Rakesh Kumar, Subhasish Mitra, Alexandru Nicolau, Tajana Simunic Rosing, Mani B. Srivastava, Steven Swanson, Dennis Sylvester:
Underdesigned and Opportunistic Computing in Presence of Hardware Variability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(1): 8-23 (2013) - [j39]Daesung Lee, W. Scott Lee, Chen Chen, Farzan Fallah, J. Provine, Soogine Chong, John Watkins, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Combinational Logic Design Using Six-Terminal NEM Relays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 653-666 (2013) - [c111]Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Matthias Sauer, Bernd Becker, Subhasish Mitra:
Detection of early-life failures in high-K metal-gate transistors and ultra low-K inter-metal dielectrics. CICC 2013: 1-4 - [c110]Hyungmin Cho, Shahrzad Mirkhani, Chen-Yong Cher, Jacob A. Abraham, Subhasish Mitra:
Quantitative evaluation of soft error injection techniques for robust system design. DAC 2013: 101:1-101:10 - [c109]Gage Hills, Jie Zhang, Charles Mackin, Max M. Shulaker, Hai Wei, H.-S. Philip Wong, Subhasish Mitra:
Rapid exploration of processing and design guidelines to overcome carbon nanotube variations. DAC 2013: 105:1-105:10 - [c108]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Sacha: the Stanford carbon nanotube controlled handshaking robot. DAC 2013: 124:1-124:3 - [c107]David Lin, Ted Hong, Yanjing Li, Farzan Fallah, Donald S. Gardner, Nagib Hakim, Subhasish Mitra:
Overcoming post-silicon validation challenges through quick error detection (QED). DATE 2013: 320-325 - [c106]Hai Wei, Max M. Shulaker, Gage Hills, Hong-Yu Chen, Chi-Shuen Lee, Luckshitha Liyanage, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra:
Carbon nanotube circuits: opportunities and challenges. DATE 2013: 619-624 - [c105]Subhasish Mitra:
Carbon nanotube imperfection-immune digital VLSI. ISLPED 2013: 144 - [c104]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Experimental demonstration of a fully digital capacitive sensor interface built entirely using carbon-nanotube FETs. ISSCC 2013: 112-113 - [c103]Yanjing Li, Eric Cheng, Samy Makar, Subhasish Mitra:
Self-repair of uncore components in robust system-on-chips: An OpenSPARC T2 case study. ITC 2013: 1-10 - [c102]Matthias Sauer, Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Subhasish Mitra, Bernd Becker:
Early-life-failure detection using SAT-based ATPG. ITC 2013: 1-10 - 2012
- [j38]Giovanni De Micheli, Subhasish Mitra, Maciej Ogorzalek:
Editorial. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(4): 653-657 (2012) - [j37]Jie Zhang, Albert Lin, Nishant Patil, Hai Wei, Lan Wei, H.-S. Philip Wong, Subhasish Mitra:
Carbon Nanotube Robust Digital VLSI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 453-471 (2012) - [j36]Hyungmin Cho, Larkhoon Leem, Subhasish Mitra:
ERSA: Error Resilient System Architecture for Probabilistic Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 546-558 (2012) - [c101]Subhasish Mitra, David Lin, Nagib Hakim, Donald S. Gardner:
Bug localization techniques for effective post-silicon validation. ASP-DAC 2012: 291 - [c100]Chen Chen, W. Scott Lee, J. Provine, Soogine Chong, Roozbeh Parsa, Daesung Lee, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Nano-Electro-Mechanical (NEM) relays and their application to FPGA routing. ASP-DAC 2012: 639 - [c99]David Lin, Ted Hong, Farzan Fallah, Nagib Hakim, Subhasish Mitra:
Quick detection of difficult bugs for effective post-silicon validation. DAC 2012: 561-566 - [c98]Chen Chen, W. Scott Lee, Roozbeh Parsa, Soogine Chong, J. Provine, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Nano-Electro-Mechanical relays for FPGA routing: Experimental demonstration and a design technique. DATE 2012: 1361-1366 - [c97]S. M. Sadegh Tabatabaei Yazdi, Hyungmin Cho, Yifan Sun, Subhasish Mitra, Lara Dolecek:
Probabilistic analysis of Gallager B faulty decoder. ICC 2012: 7019-7023 - [c96]Nikil D. Dutt, Mani B. Srivastava, Rajesh Gupta, Subhasish Mitra:
Tutorial T6: Variability-resistant Software and Hardware for Nano-Scale Computing. VLSI Design 2012: 22-24 - 2011
- [j35]John K. Ousterhout, Parag Agrawal, David Erickson, Christos Kozyrakis, Jacob Leverich, David Mazières, Subhasish Mitra, Aravind Narayanan, Diego Ongaro, Guru M. Parulkar, Mendel Rosenblum, Stephen M. Rumble, Eric Stratmann, Ryan Stutsman:
The case for RAMCloud. Commun. ACM 54(7): 121-130 (2011) - [j34]Subhasish Mitra, Kevin Brelsford, Young Moon Kim, Hsiao-Heng Lee, Yanjing Li:
Robust System Design to Overcome CMOS Reliability Challenges. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(1): 30-41 (2011) - [j33]Subhasish Mitra, Hyungmin Cho, Ted Hong, Young Moon Kim, Hsiao-Heng Lee, Larkhoon Leem, Yanjing Li, David Lin, Evelyn Mintarno, Diana Mui, Sung-Boem Park, Nishant Patil, Hai Wei, Jie Zhang:
Robust System Design. IPSJ Trans. Syst. LSI Des. Methodol. 4: 2-30 (2011) - [j32]Igor Loi, Federico Angiolini, Shinobu Fujita, Subhasish Mitra, Luca Benini:
Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(1): 124-134 (2011) - [j31]Evelyn Mintarno, Joëlle Skaf, Rui Zheng, Jyothi Velamala, Yu Cao, Stephen P. Boyd, Robert W. Dutton, Subhasish Mitra:
Self-Tuning for Maximized Lifetime Energy-Efficiency in the Presence of Circuit Aging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(5): 760-773 (2011) - [j30]Jie Zhang, Nishant Patil, Arash Hazeghi, H.-S. Philip Wong, Subhasish Mitra:
Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(8): 1103-1113 (2011) - [c95]Hai Wei, Jie Zhang, Lan Wei, Nishant Patil, Albert Lin, Max M. Shulaker, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra:
Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated. ICCAD 2011: 227-230 - [c94]Chen Dong, Chen Chen, Subhasish Mitra, Deming Chen:
Architecture and performance evaluation of 3D CMOS-NEM FPGA. SLIP 2011: 1-8 - 2010
- [j29]Sung-Boem Park, Subhasish Mitra:
Post-silicon bug localization for processors using IFRA. Commun. ACM 53(2): 106-113 (2010) - [c93]Subhasish Mitra, Sanjit A. Seshia, Nicola Nicolici:
Post-silicon validation opportunities, challenges and recent advances. DAC 2010: 12-17 - [c92]Sung-Boem Park, Anne Bracy, Hong Wang, Subhasish Mitra:
BLoG: post-silicon bug localization in processors using bug localization graphs. DAC 2010: 368-373 - [c91]Jie Zhang, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra:
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement. DAC 2010: 889-892 - [c90]Evelyn Mintarno, Joëlle Skaf, Rui Zheng, Jyothi Velamala, Yu Cao, Stephen P. Boyd, Robert W. Dutton, Subhasish Mitra:
Optimized self-tuning for circuit aging. DATE 2010: 586-591 - [c89]Yashodhan Kanoria, Subhasish Mitra, Andrea Montanari:
Statistical static timing analysis using Markov chain Monte Carlo. DATE 2010: 813-818 - [c88]Subhasish Mitra, Kevin Brelsford, Pia N. Sanda:
Cross-layer resilience challenges: Metrics and optimization. DATE 2010: 1029-1034 - [c87]Jie Zhang, Nishant Patil, Albert Lin, H.-S. Philip Wong, Subhasish Mitra:
Carbon nanotube circuits: Living with imperfections and variations. DATE 2010: 1159-1164 - [c86]Larkhoon Leem, Hyungmin Cho, Jason Bau, Quinn A. Jacobson, Subhasish Mitra:
ERSA: Error Resilient System Architecture for probabilistic applications. DATE 2010: 1560-1565 - [c85]Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Efficient FPGAs using nanoelectromechanical relays. FPGA 2010: 273-282 - [c84]Larkhoon Leem, Hyungmin Cho, Hsiao-Heng Lee, Young Moon Kim, Yanjing Li, Subhasish Mitra:
Cross-layer error resilience for robust systems. ICCAD 2010: 177-180 - [c83]Ted Hong, Yanjing Li, Sung-Boem Park, Diana Mui, David Lin, Ziyad Abdel Kaleq, Nagib Hakim, Helia Naeimi, Donald S. Gardner, Subhasish Mitra:
QED: Quick Error Detection tests for effective post-silicon validation. ITC 2010: 154-163 - [c82]Subhasish Mitra:
Robust System Design. VLSI Design 2010: 434-439 - [c81]Young Moon Kim, Tze Wee Chen, Yoshio Kameda, Masayuki Mizuno, Subhasish Mitra:
Gate-oxide early-life failure identification using delay shifts. VTS 2010: 69-74 - [c80]Yanjing Li, Onur Mutlu, Donald S. Gardner, Subhasish Mitra:
Concurrent autonomous self-test for uncore components in system-on-chips. VTS 2010: 232-237
2000 – 2009
- 2009
- [j28]Yanjing Li, Young Moon Kim, Evelyn Mintarno, Donald S. Gardner, Subhasish Mitra:
Overcoming Early-Life Failure and Aging for Robust Systems. IEEE Des. Test Comput. 26(6): 28-39 (2009) - [j27]John K. Ousterhout, Parag Agrawal, David Erickson, Christos Kozyrakis, Jacob Leverich, David Mazières, Subhasish Mitra, Aravind Narayanan, Guru M. Parulkar, Mendel Rosenblum, Stephen M. Rumble, Eric Stratmann, Ryan Stutsman:
The case for RAMClouds: scalable high-performance storage entirely in DRAM. ACM SIGOPS Oper. Syst. Rev. 43(4): 92-105 (2009) - [j26]Jie Zhang, Nishant Patil, Subhasish Mitra:
Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1307-1320 (2009) - [j25]Sung-Boem Park, Ted Hong, Subhasish Mitra:
Post-Silicon Bug Localization in Processors Using Instruction Footprint Recording and Analysis (IFRA). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(10): 1545-1558 (2009) - [c79]Rui Zheng, Jyothi Velamala, Vijay Reddy, Varsha Balakrishnan, Evelyn Mintarno, Subhasish Mitra, Srikanth Krishnan, Yu Cao:
Circuit aging prediction for low-power operation. CICC 2009: 427-430 - [c78]Jie Zhang, Nishant Patil, Arash Hazeghi, Subhasish Mitra:
Carbon nanotube circuits in the presence of carbon nanotube density variations. DAC 2009: 71-76 - [c77]Nishant Patil, Albert Lin, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra:
Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions. DAC 2009: 304-309 - [c76]Subhasish Mitra, Jie Zhang, Nishant Patil, Hai Wei:
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors. DATE 2009: 436-441 - [c75]Sung-Boem Park, Subhasish Mitra:
IFRA: Post-silicon bug localization in processors. HLDVT 2009: 154-159 - [c74]Yanjing Li, Onur Mutlu, Subhasish Mitra:
Operating system scheduling for efficient online self-test in robust systems. ICCAD 2009: 201-208 - [c73]Soogine Chong, Kerem Akarvardar, Roozbeh Parsa, Jun-Bo Yoon, Roger T. Howe, Subhasish Mitra, H.-S. Philip Wong:
Nanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage. ICCAD 2009: 478-484 - [c72]Nishant Patil, Subhasish Mitra:
Imperfection-immune Carbon Nanotube digital VLSI. ICCD 2009: 1 - [c71]A. Hakan Baba, Subhasish Mitra:
Testing for Transistor Aging. VTS 2009: 215-220 - 2008
- [j24]Rohit Kapur, Subhasish Mitra, Thomas W. Williams:
Historical Perspective on Scan Compression. IEEE Des. Test Comput. 25(2): 114-120 (2008) - [j23]Naresh R. Shanbhag, Subhasish Mitra, Gustavo de Veciana, Michael Orshansky, Radu Marculescu, Jaijeet S. Roychowdhury, Douglas L. Jones, Jan M. Rabaey:
The Search for Alternative Computational Paradigms. IEEE Des. Test Comput. 25(4): 334-343 (2008) - [j22]Nishant Patil, Jie Deng, Albert Lin, H.-S. Philip Wong, Subhasish Mitra:
Design Methods for Misaligned and Mispositioned Carbon-Nanotube Immune Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10): 1725-1736 (2008) - [c70]Sung-Boem Park, Subhasish Mitra:
IFRA: instruction footprint recording and analysis for post-silicon bug localization in processors. DAC 2008: 373-378 - [c69]Dimitris Gizopoulos, Kaushik Roy, Subhasish Mitra, Pia N. Sanda:
Soft Errors: System Effects, Protection Techniques and Case Studies. DATE 2008 - [c68]Yanjing Li, Samy Makar, Subhasish Mitra:
CASP: Concurrent Autonomous Chip Self-Test Using Stored Test Patterns. DATE 2008: 885-890 - [c67]Subhasish Mitra:
Globally Optimized Robust Systems to Overcome Scaled CMOS Reliability Challenges. DATE 2008: 941-946 - [c66]Jie Zhang, Nishant Patil, Subhasish Mitra:
Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits. DATE 2008: 1009-1014 - [c65]Neeraj Suri, Christof Fetzer, Jacob A. Abraham, Stefan Poledna, Avi Mendelson, Subhasish Mitra:
Dependable Embedded Systems Special Day Panel: Issues and Challenges in Dependable Embedded Systems. DATE 2008: 1394-1395 - [c64]Subhasish Mitra, Ravishankar K. Iyer, Kishor S. Trivedi, James W. Tschanz:
Reliable system design: models, metrics and design techniques. ICCAD 2008: 3 - [c63]Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu Fujita, Luca Benini:
A low-overhead fault tolerance scheme for TSV-based 3D network on chip links. ICCAD 2008: 598-602 - [c62]Subhasish Mitra:
Soft Error Protection Techniques. IOLTS 2008: 45 - [c61]Subhasish Mitra:
Tutorial 4: Robust System Design in Scaled CMOS. ISQED 2008: 6 - [c60]Mridul Agarwal, Varsha Balakrishnan, Anshuman Bhuyan, Kyunglok Kim, Bipul C. Paul, Wenping Wang, Bo Yang, Yu Cao, Subhasish Mitra:
Optimized Circuit Failure Prediction for Aging: Practicality and Promise. ITC 2008: 1-10 - [c59]Hiroaki Inoue, Yanjing Li, Subhasish Mitra:
VAST: Virtualization-Assisted Concurrent Autonomous Self-Test. ITC 2008: 1-10 - [c58]Tze Wee Chen, Kyunglok Kim, Young Moon Kim, Subhasish Mitra:
Gate-Oxide Early Life Failure Prediction. VTS 2008: 111-118 - 2007
- [j21]Mehdi Baradaran Tahoori, Subhasish Mitra:
Application-Dependent Delay Testing of FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3): 553-563 (2007) - [c57]Nishant Patil, Jie Deng, H.-S. Philip Wong, Subhasish Mitra:
Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits. DAC 2007: 958-961 - [c56]Sanjit A. Seshia, Wenchao Li, Subhasish Mitra:
Verification-guided soft error resilience. DATE 2007: 1442-1447 - [c55]Subhasish Mitra, Pia N. Sanda, Norbert Seifert:
Soft Errors: Technology Trends, System Effects, and Protection Techniques. IOLTS 2007: 4 - [c54]Subhasish Mitra:
Circuit Failure Prediction Enables Robust System Design Resilient to Aging and Wearout. IOLTS 2007: 123 - [c53]Jie Deng, Nishant Patil, Koungmin Ryu, Alexander Badmaev, Chongwu Zhou, Subhasish Mitra, H.-S. Philip Wong:
Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections. ISSCC 2007: 70-588 - [c52]Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey:
California scan architecture for high quality and low power testing. ITC 2007: 1-10 - [c51]Subhasish Mitra, Mridul Agarwal:
Circuit failure prediction to overcome scaled CMOS reliability challenges. ITC 2007: 1-3 - [c50]Mridul Agarwal, Bipul C. Paul, Ming Zhang, Subhasish Mitra:
Circuit Failure Prediction and Its Application to Transistor Aging. VTS 2007: 277-286 - 2006
- [j20]Subhasish Mitra, Ondrej Novák, Hana Kubátová, Bashir M. Al-Hashimi, Erik Jan Marinissen, C. P. Ravikumar:
Conference Reports. IEEE Des. Test Comput. 23(4): 262-265 (2006) - [j19]Subhasish Mitra, Kee Sup Kim:
XPAND: An Efficient Test Stimulus Compression Technique. IEEE Trans. Computers 55(2): 163-173 (2006) - [j18]Ming Zhang, Subhasish Mitra, T. M. Mak, Norbert Seifert, Nicholas J. Wang, Quan Shi, Kee Sup Kim, Naresh R. Shanbhag, Sanjay J. Patel:
Sequential Element Design With Built-In Soft Error Resilience. IEEE Trans. Very Large Scale Integr. Syst. 14(12): 1368-1378 (2006) - [c49]T. M. Mak, Subhasish Mitra:
Should Logic SER be Solved at the Circuit Level? IOLTS 2006: 199 - [c48]Subhasish Mitra, Ming Zhang, Saad Waqas, Norbert Seifert, Balkaran S. Gill, Kee Sup Kim:
Combinational Logic Soft Error Correction. ITC 2006: 1-9 - [c47]Nishant Patil, Subhasish Mitra, Steven S. Lumetta:
Signature Analyzer Design for Yield Learning Support. ITC 2006: 1-10 - [c46]Mehdi Baradaran Tahoori, Subhasish Mitra:
Test Compression for FPGAs. ITC 2006: 1-9 - [c45]Bob Mungamuru, Hector Garcia-Molina, Subhasish Mitra:
How To Safeguard Your Sensitive Data. SRDS 2006: 199-211 - [c44]Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim:
Soft Error Resilient System Design through Error Correction. VLSI-SoC (Selected Papers) 2006: 143-156 - [c43]Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim:
Soft Error Resilient System Design through Error Correction. VLSI-SoC 2006: 332-337 - [c42]Ruifeng Guo, Subhasish Mitra, M. Enamul Amyeen, Jinkyu Lee, Srihari Sivaraj, Srikanth Venkataraman:
Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive. VTS 2006: 66-71 - 2005
- [j17]Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim:
Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim. Computer 38(2): 43-52 (2005) - [j16]Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher, Nishant Patil:
X-Tolerant Test Response Compaction. IEEE Des. Test Comput. 22(6): 566-574 (2005) - [j15]Ravishankar K. Iyer, Nithin Nakka, Zbigniew Kalbarczyk, Subhasish Mitra:
Recent Advances and New Avenues in Hardware-Level Reliability Support. IEEE Micro 25(6): 18-29 (2005) - [j14]Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey:
Optimized reseeding by seed ordering and encoding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(2): 264-270 (2005) - [j13]Mehdi Baradaran Tahoori, Subhasish Mitra:
Application-independent testing of FPGA interconnects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(11): 1774-1783 (2005) - [c41]David J. Leavins, Kee Sup Kim, Subhasish Mitra, Eddie J. Rodriguez:
Robust platform design in advanced VLSI technologies. CICC 2005: 23-30 - [c40]Subhasish Mitra, Tanay Karnik, Norbert Seifert, Ming Zhang:
Logic soft errors in sub-65nm technologies design and CAD challenges. DAC 2005: 2-4 - [c39]Erik H. Volkerink, Subhasish Mitra:
Response compaction with any number of unknowns using a new LFSR architecture. DAC 2005: 117-122 - [c38]T. M. Mak, Subhasish Mitra, Ming Zhang:
DFT Assisted Built-In Soft Error Resilience. IOLTS 2005: 69 - [c37]Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey:
Gate exhaustive testing. ITC 2005: 7 - [c36]Zoran Stanojevic, Ruifeng Guo, Subhasish Mitra, Srikanth Venkataraman:
Enabling yield analysis with X-compact. ITC 2005: 9 - [c35]Subhasish Mitra, Ming Zhang, T. M. Mak, Norbert Seifert, Victor Zia, Kee Sup Kim:
Logic soft errors: a major barrier to robust platform design. ITC 2005: 10 - [c34]R. D. (Shawn) Blanton, Subhasish Mitra:
Testing Nanometer Digital Integration Circuits: Myths, Reality and the Road Ahead. VLSI Design 2005: 8-9 - 2004
- [j12]Subhasish Mitra, Wei-Je Huang, Nirmal R. Saxena, Shu-Yi Yu, Edward J. McCluskey:
Reconfigurable Architecture for Autonomous Self-Repair. IEEE Des. Test Comput. 21(3): 228-240 (2004) - [j11]Vladimir Hahanov, Raimund Ubar, Subhasish Mitra:
Conference Reports. IEEE Des. Test Comput. 21(6): 594-595 (2004) - [j10]Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey:
Efficient Design Diversity Estimation for Combinational Circuits. IEEE Trans. Computers 53(11): 1483-1492 (2004) - [j9]Mehdi Baradaran Tahoori, Subhasish Mitra:
Techniques and algorithms for fault grading of FPGA interconnect test configurations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(2): 261-272 (2004) - [j8]Subhasish Mitra, Kee Sup Kim:
X-compact: an efficient response compaction technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(3): 421-432 (2004) - [c33]Mehdi Baradaran Tahoori, Subhasish Mitra:
Defect and Fault Tolerance of Reconfigurable Molecular Computing. FCCM 2004: 176-185 - [c32]Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher:
X-Tolerant Signature Analysis. ITC 2004: 432-441 - [c31]Mehdi Baradaran Tahoori, Subhasish Mitra:
Interconnect Delay Testing of Designs on Programmable Logic Devices. ITC 2004: 635-644 - [c30]Kenneth A. Brand, Erik H. Volkerink, Edward J. McCluskey, Subhasish Mitra:
Speed Clustering of Integrated Circuits. ITC 2004: 1128-1137 - [c29]Edward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, François-Fabien Ferhani, Edward Li, Subhasish Mitra:
ELF-Murphy Data on Defects and Test Sets. VTS 2004: 16-22 - [c28]Subhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger:
Delay Defect Screening using Process Monitor Structures. VTS 2004: 43-52 - 2003
- [j7]Kee Sup Kim, Subhasish Mitra, Paul G. Ryan:
Delay Defect Characteristics and Testing Strategies. IEEE Des. Test Comput. 20(5): 8-16 (2003) - [c27]Subhasish Mitra, Kee Sup Kim:
XMAX: X-Tolerant Architecture for MAXimal Test Compression. ICCD 2003: 326-330 - [c26]David M. Wu, Mike Lin, Subhasish Mitra, Kee Sup Kim, Anil Sabbavarapu, Talal Jaber, Pete Johnson, Dale March, Greg Parrish:
H-DFT: A Hybrid DFT Architecture For Low-Cost High Quality Structural Testing. ITC 2003: 1229-1238 - [c25]Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey:
Bist Reseeding with very few Seeds. VTS 2003: 69-76 - [c24]Mehdi Baradaran Tahoori, Subhasish Mitra:
Automatic Configuration Generation for FPGA Interconnect Testing. VTS 2003: 134-144 - [c23]Erik H. Volkerink, Subhasish Mitra:
Efficient Seed Utilization for Reseeding based Compression. VTS 2003: 232-240 - 2002
- [j6]Nahmsuk Oh, Subhasish Mitra, Edward J. McCluskey:
ED4I: Error Detection by Diverse Data and Duplicated Instructions. IEEE Trans. Computers 51(2): 180-199 (2002) - [j5]Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey:
A Design Diversity Metric and Analysis of Redundant Systems. IEEE Trans. Computers 51(5): 498-510 (2002) - [c22]Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey:
Testing Digital Circuits with Constraints. DFT 2002: 195-206 - [c21]Subhasish Mitra, Edward J. McCluskey:
Dependable Reconfigurable Computing Design Diversity and Self Repair. Evolvable Hardware 2002: 5 - [c20]Erik H. Volkerink, Ajay Khoche, Subhasish Mitra:
Packet-Based Input Test Data Compression Techniques. ITC 2002: 154-163 - [c19]Subhasish Mitra, Kee Sup Kim:
X-Compact: An Efficient Response Compaction Technique for Test Cost Reduction. ITC 2002: 311-320 - [c18]Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey:
Fault Grading FPGA Interconnect Test Configurations. ITC 2002: 608-617 - [c17]Ajay Khoche, Erik H. Volkerink, Jochen Rivoir, Subhasish Mitra:
Test Vector Compression Using EDA-ATE Synergies. VTS 2002: 97-102 - [c16]Subhasish Mitra, Edward J. McCluskey, Samy Makar:
Design for Testability and Testing of IEEE 1149.1 Tap Controller. VTS 2002: 247-252 - [c15]Edward J. McCluskey, Subhasish Mitra, Bob Madge, Peter C. Maxwell, Phil Nigh, Mike Rodgers:
Debating the Future of Burn-In. VTS 2002: 311-314 - 2001
- [c14]Wei-Je Huang, Subhasish Mitra, Edward J. McCluskey:
Fast Run-Time Fault Location in Dependable FPGA-Based Applications. DFT 2001: 206-214 - [c13]Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey:
Techniques for Estimation of Design Diversity for Combinational Logic Circuits. DSN 2001: 25-36 - [c12]Subhasish Mitra, Edward J. McCluskey:
Diversity Techniques for Concurrent Error Detection. ISQED 2001: 249-250 - [c11]Subhasish Mitra, Edward J. McCluskey:
Design Diversity for Concurrent Error Detection in Sequential Logic Circuts. VTS 2001: 178-183 - [c10]Subhasish Mitra, Edward J. McCluskey:
Design of Redundant Systems Protected Against Common-Mode Failures. VTS 2001: 190-197 - [c9]Chao-Wen Tseng, Subhasish Mitra, Edward J. McCluskey, Scott Davidson:
An Evaluation of Pseudo Random Testing for Detecting Real Defects. VTS 2001: 404-410 - 2000
- [j4]Nirmal R. Saxena, Santiago Fernández-Gomez, Wei-Je Huang, Subhasish Mitra, Shu-Yi Yu, Edward J. McCluskey:
Dependable Computing and Online Testing in Adaptive and Configurable Systems. IEEE Des. Test Comput. 17(1): 29-41 (2000) - [j3]Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey:
Efficient Multiplexer Synthesis Techniques. IEEE Des. Test Comput. 17(4): 90-97 (2000) - [j2]Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey:
Common-mode failures in redundant VLSI systems: a survey. IEEE Trans. Reliab. 49(3): 285-295 (2000) - [c8]Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen, Marly Roncken:
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits. ASYNC 2000: 73- - [c7]Subhasish Mitra, Edward J. McCluskey:
Combinational logic synthesis for diversity in duplex systems. ITC 2000: 179-188 - [c6]Subhasish Mitra, Edward J. McCluskey:
Which concurrent error detection scheme to choose ? ITC 2000: 985-994 - [c5]Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey:
Fault Escapes in Duplex Systems. VTS 2000: 453-458 - [c4]Subhasish Mitra, Edward J. McCluskey:
Word Voter: A New Voter Design for Triple Modular Redundant Systems. VTS 2000: 465-470
1990 – 1999
- 1999
- [j1]Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey:
An output encoding problem and a solution technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(6): 761-768 (1999) - [c3]Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey:
A design diversity metric and reliability analysis for redundant systems. ITC 1999: 662-671 - 1997
- [c2]Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey:
An output encoding problem and a solution technique. ICCAD 1997: 304-307 - [c1]Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey:
Scan Synthesis for One-Hot Signals. ITC 1997: 714-722
Coauthor Index
Max M. Shulaker
aka: Max Marcel Shulaker
aka: Max Marcel Shulaker
[c179] [j71] [c168] [i15] [j66] [j65] [j63] [j62] [c149] [j59] [c146] [c143] [c142] [i9] [j53] [c138] [c137] [j51] [j50] [c134] [c129] [j49] [j46] [c123] [c122] [i2] [i1] [j43] [j42] [c118] [j39] [c109] [c108] [c106] [c104] [j37] [c100] [c98] [j30] [c95] [c91] [c87] [c85] [c77] [c73] [j22] [c57] [c53]
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